公开(公告)号：US09893694B2

公开(公告)日：2018-02-13

申请号：US13717787

申请日：2012-12-18

申请人： Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V.

发明人： Bernd Edler ,  Harald Popp

IPC分类号： H03H7/30 ,  H03H7/40 ,  H03K5/159 ,  H03G3/00 ,  G10L19/02 ,  H03H17/02

CPC分类号： H03G3/00 ,  G10L19/0204 ,  H03H17/0266 ,  H03H2218/04

摘要： In order to process a subband signal of a plurality of real subband signals which are a representation of a real discrete-time signal generated by an analysis filter bank, a weighter for weighting a subband signal by a weighting factor determined for the subband signal is provided to obtain a weighted subband signal. In addition, a correction term is calculated by a correction term determiner, the correction term determiner being implemented to calculate the correction term using at least one other subband signal and using another weighting factor provided for the other subband signal, the two weighting factors differing. The correction term is then combined with the weighted subband signal to obtain a corrected subband signal, resulting in reduced aliasing, even if subband signals are weighted to a different extent.

公开(公告)号：US09685931B2

公开(公告)日：2017-06-20

申请号：US14471608

申请日：2014-08-28

申请人： QUALCOMM Incorporated

发明人： Mazhareddin Taghivand ,  Tong Zhang ,  Mohammad Mahdi Ghahramani

IPC分类号： H03K5/00 ,  H03H11/12 ,  H03H7/01 ,  H03H7/21 ,  H03H11/22 ,  H03H17/02

CPC分类号： H03H11/1204 ,  H03H7/0153 ,  H03H7/21 ,  H03H11/22 ,  H03H17/0273 ,  H03H2218/04

摘要： Certain aspects of the present disclosure provide circuits for generating high accuracy millimeter wave or radio frequency (RF) wideband in-phase (I) and quadrature (Q) oscillating signals having acceptable amplitude and phase mismatch over process, voltage, and temperature (PVT) variations with reduced cost, area, and power consumption. In one example apparatus, a polyphase filter having a first stage and a second stage is provided. Each stage comprises resistive elements and capacitive elements. Certain aspects of the present disclosure provide for intentional resistive and/or capacitive value mismatch between the resistive or capacitive values of one or multiple stages such that the phase mismatch between the resulting I and Q signals may be reduced without degrading the amplitude mismatch. Certain aspects of the present disclosure provide for replacing the resistive elements in at least one stage with transistors operating in the triode region, where the on-resistance is controlled by a feedback network.

公开(公告)号：US20150019608A1

公开(公告)日：2015-01-15

申请号：US14377092

申请日：2013-02-13

申请人： NEC CORPORATION

发明人： Atsufumi Shibayama ,  Junichi Abe

IPC分类号： H03H17/02 ,  G06F17/14

CPC分类号： H03H17/0248 ,  G06F17/14 ,  H03H17/0213 ,  H03H2218/04

摘要： Reduction of a circuit size and power consumption for performing digital filtering processing in a frequency domain is realized. The digital filter circuit includes: a complex conjugate generation unit for generating a second complex number signal including conjugate complex numbers of all complex numbers included in a first complex number signal of the frequency domain generated by converting a complex number signal of a time domain by Fourier transform; a filter coefficient generation unit for generating a first and a second frequency domain filter coefficient of a complex number from a first, a second and a third input filter coefficient of a complex number having been inputted; a first filtering unit for performing filtering processing to the first complex number signal by the first frequency domain filter coefficient, and outputting a third complex number signal; a second filtering unit for performing filtering processing to the second complex number signal by the second frequency domain filter coefficient, and outputting a fourth complex number signal; and a complex conjugate combining unit for combining the third complex number signal and the fourth complex number signal, and generating a fifth complex number signal.

摘要翻译： 实现了在频域中进行数字滤波处理的电路尺寸和功耗的降低。 数字滤波器电路包括：复共轭生成单元，用于生成包括通过将时域的复数信号转换为傅里叶变换产生的频域的第一复数信号中的所有复数的共轭复数的第二复数信号 转变; 滤波器系数生成单元，用于从已经输入的复数的第一，第二和第三输入滤波器系数产生复数的第一和第二频域滤波器系数; 第一滤波单元，用于通过第一频域滤波器系数对第一复数信号进行滤波处理，并输出第三复数信号; 第二滤波单元，用于通过第二频域滤波器系数对第二复数信号进行滤波处理，并输出第四复数信号; 以及用于组合第三复数信号和第四复数信号的复共轭组合单元，并且生成第五复数信号。

公开(公告)号：US08831081B2

公开(公告)日：2014-09-09

申请号：US13393066

申请日：2011-08-18

申请人： Junichi Abe ,  Hidemi Noguchi

发明人： Junichi Abe ,  Hidemi Noguchi

IPC分类号： H03H7/30 ,  H04B10/61 ,  H04B3/14 ,  H03H17/02 ,  H04L25/03

CPC分类号： H04B10/616 ,  H03H17/0202 ,  H03H2218/04 ,  H04B3/142 ,  H04L25/03038 ,  H04L25/03057 ,  H04L25/03159 ,  H04L25/03178 ,  H04L2025/03401 ,  H04L2025/03636

摘要： In order to solve a problem of achieving distortion compensation with high accuracy, a digital filter device includes a first distortion compensation filter unit for conducting distortion compensation of first waveform distortion included in an inputted signal through digital signal processing, a first filter coefficient setting unit for setting a filter coefficient of the first distortion compensation filter unit, a second distortion compensation filter unit for compensating second waveform distortion included in a signal outputted from the first distortion compensation filter unit, and a second filter coefficient setting unit for setting a filter coefficient of the second distortion compensation filter unit based on the filter coefficient set by the first filter coefficient setting unit.

摘要翻译： 为了以高精度解决失真补偿的问题，数字滤波器装置包括：第一失真补偿滤波器单元，用于通过数字信号处理对包含在输入信号中的第一波形失真进行失真补偿;第一滤波器系数设定单元， 设置第一失真补偿滤波器单元的滤波器系数;第二失真补偿滤波器单元，用于补偿从第一失真补偿滤波器单元输出的信号中包括的第二波形失真;以及第二滤波器系数设置单元，用于设置滤波器系数 第二失真补偿滤波器单元，其基于由第一滤波器系数设置单元设置的滤波器系数。

公开(公告)号：US20110231466A1

公开(公告)日：2011-09-22

申请号：US13028191

申请日：2011-02-15

申请人： Kung-Piao Huang

发明人： Kung-Piao Huang

IPC分类号： G06F17/10

CPC分类号： H03H17/0292 ,  H03H17/0664 ,  H03H2218/04 ,  H03H2220/04

摘要： A time-division (TD) decimation filter bank includes two decimation filter units. The first decimation filter unit operates at a system clock and receives a first-stage input data string. Each data in the first-stage input data string has a first part data and second part data. During the odd clock periods, the first part data are filtered and decimated in frequency. During the even clock periods, the second part data are filtered and decimated in frequency. The second decimation filter unit operates at the system clock and 2N clock periods are set as an operation-period unit, N≧2. The second decimation filter unit receives the outputs from the first decimation filter unit and receives several feedback data of the second decimation filter unit by TD, so that the received data are distributed into the 2N clock periods for filtering and decimation and outputting by TD.

摘要翻译： 时分（TD）抽取滤波器组包括两个抽取滤波器单元。 第一抽取滤波器单元在系统时钟下操作并接收第一级输入数据串。 第一级输入数据串中的每个数据具有第一部分数据和第二部分数据。 在奇数时钟周期期间，第一部分数据被滤波并抽取频率。 在偶数时钟周期期间，第二部分数据被频谱滤波和抽取。 第二抽取滤波器单元在系统时钟下操作，并且将2N个时钟周期设置为操作周期单元，N≥2。 第二抽取滤波器单元接收来自第一抽取滤波器单元的输出，并通过TD接收第二抽取滤波器单元的若干反馈数据，使得接收到的数据被分配到2N个时钟周期中，用于通过TD进行滤波和抽取和输出。

公开(公告)号：US20110153705A1

公开(公告)日：2011-06-23

申请号：US12643456

申请日：2009-12-21

申请人： Yea Zong Kuo ,  Jerry William Yancey

发明人： Yea Zong Kuo ,  Jerry William Yancey

IPC分类号： G06F17/17 ,  G06F17/10

CPC分类号： G06F17/15 ,  H03H17/0223 ,  H03H17/06 ,  H03H2218/04 ,  H03H2218/10

摘要： A finite impulse response filter comprises an input formatter, a plurality of sample registers, a plurality of coefficient registers, an arithmetic unit, a multiply accumulate unit, a crosspoint switch, an interpolator, a control unit, and an output formatter. The input formatter separates the in-phase portion of a complex-number discrete-time sample from the quadrature portion. The sample registers store a plurality of discrete-time samples. The coefficient registers store a plurality of coefficients. The arithmetic unit adds two of the discrete-time samples to create a sum. The multiply accumulate unit includes a multiplier that multiplies the sum by a coefficient to create a product, an adder that adds the product to a sum of products, and a register that stores the sum of products. The crosspoint switch allows communication between the first and second plurality of registers and the arithmetic unit and the multiply accumulate unit. The interpolator inserts a desired number of zeros into the time-sampled data stream to adjust the time-sampled data stream to an increasing sampling rate. The control unit controls the settings of the crosspoint switch, the arithmetic unit, and the multiply accumulate unit. The output formatter combines the in-phase sum of products and the quadrature sum of products to create a filtered complex-number discrete-time sample.

摘要翻译： 有限脉冲响应滤波器包括输入格式化器，多个采样寄存器，多个系数寄存器，运算单元，乘法累加单元，交叉点开关，内插器，控制单元和输出格式化器。 输入格式化器将复数离散时间采样的同相部分与正交部分分离。 采样寄存器存储多个离散时间采样。 系数寄存器存储多个系数。 算术单元增加两个离散时间样本以创建一个和。 乘法累加单元包括乘以乘以系数以创建乘积的乘法器，将乘积加到乘积之和的加法器和存储乘积之和的寄存器。 交叉点开关允许第一和第二多个寄存器与算术单元和乘法累加单元之间的通信。 插值器将期望数量的零插入到时间采样数据流中，以将时间采样数据流调整到增加的采样率。 控制单元控制交叉点开关，算术单元和乘法累加单元的设置。 输出格式化器将产品的同相和和产物的正交和组合以创建过滤的复数离散时间样本。

公开(公告)号：US20100174767A1

公开(公告)日：2010-07-08

申请号：US12726307

申请日：2010-03-17

申请人： Lars VILLEMOES

发明人： Lars VILLEMOES

IPC分类号： G06F17/10

CPC分类号： G10L19/02 ,  G10L19/0204 ,  H03H17/0266 ,  H03H17/0294 ,  H03H2218/04

摘要： A filter apparatus for filtering a time domain input signal to obtain a time domain output signal, which is a representation of the time domain input signal filtered using a filter characteristic having an non-uniform amplitude/frequency characteristic, comprises a complex analysis filter bank for generating a plurality of complex subband signals from the time domain input signals, a plurality of intermediate filters, wherein at least one of the intermediate filters of the plurality of the intermediate filters has a non-uniform amplitude/frequency characteristic, wherein the plurality of intermediate filters have a shorter impulse response compared to an impulse response of a filter having the filter characteristic, and wherein the non-uniform amplitude/frequency characteristics of the plurality of intermediate filters together represent the non-uniform filter characteristic, and a complex synthesis filter bank for synthesizing the output of the intermediate filters to obtain the time domain output signal.

摘要翻译： 一种用于对时域输入信号进行滤波以获得时域输出信号的滤波器装置，其是使用具有不均匀幅度/频率特性的滤波器特性滤波的时域输入信号的表示，包括复分析滤波器组，用于 从所述时域输入信号产生多个复数子带信号，多个中间滤波器，其中所述多个中间滤波器中的至少一个中间滤波器具有不均匀的幅度/频率特性，其中所述多个中间滤波器 与具有滤波器特性的滤波器的脉冲响应相比，滤波器具有更短的脉冲响应，并且其中多个中间滤波器的非均匀幅度/频率特性一起表示非均匀滤波器特性，并且复合成滤波器组 用于合成中间滤波器的输出以获得时间 域输出信号。

公开(公告)号：US20100013987A1

公开(公告)日：2010-01-21

申请号：US12375728

申请日：2007-06-26

申请人： Bernd Edler ,  Harald Popp

发明人： Bernd Edler ,  Harald Popp

IPC分类号： H04N11/02

CPC分类号： H03G3/00 ,  G10L19/0204 ,  H03H17/0266 ,  H03H2218/04

摘要： In order to process a subband signal of a plurality of real subband signals which are a representation of a real discrete-time signal generated by an analysis filter bank, a weighter for weighting a subband signal by a weighting factor determined for the subband signal is provided to obtain a weighted subband signal. In addition, a correction term is calculated by a correction term determiner, the correction term determiner being implemented to calculate the correction term using at least one other subband signal and using another weighting factor provided for the other subband signal, the two weighting factors differing. The correction term is then combined with the weighted subband signal to obtain a corrected subband signal, resulting in reduced aliasing, even if subband signals are weighted to a different extent.

摘要翻译： 为了处理作为由分析滤波器组产生的实际离散时间信号的表示的多个实际子带信号的子带信号，提供了对子带信号进行加权以对于子带信号确定的加权因子的加权器 以获得加权子带信号。 此外，校正项由校正项确定器计算，校正项确定器被实现为使用至少一个其他子带信号来计算校正项，并且使用为另一子带信号提供的另一加权因子，两个加权因子不同。 然后将校正项与加权子带信号组合以获得校正的子带信号，导致减少的混叠，即使子带信号被加权到不同程度。

公开(公告)号：US07555081B2

公开(公告)日：2009-06-30

申请号：US11263452

申请日：2005-10-31

申请人： D. Broadus Keele, Jr.

发明人： D. Broadus Keele, Jr.

IPC分类号： H04B1/10

CPC分类号： H03H17/06 ,  H03H17/0261 ,  H03H17/028 ,  H03H17/0621 ,  H03H2218/04

摘要： This invention provides a filter system which may be implemented with less hardware and software resources than traditional filters. In addition, the filter system structure reduces the complexities typically associated with filter design by permitting direct specification of the filter frequency response. Thus, the filter system may adaptively change the filter frequency response on the fly without incurring excessive time or computational costs. The filter system may provide a filtered signal output to any subsequent processing system, such as a voice recognition system or audio reproduction system.

摘要翻译： 本发明提供了一种过滤系统，其可以比传统过滤器更少的硬件和软件资源来实现。 此外，滤波器系统结构通过允许直接规定滤波器频率响应来降低通常与滤波器设计相关的复杂度。 因此，过滤系统可以在飞行中自适应地改变过滤器频率响应，而不会产生过多的时间或计算成本。 滤波器系统可以向诸如语音识别系统或音频再现系统的任何后续处理系统提供经滤波的信号输出。

公开(公告)号：US20060109941A1

公开(公告)日：2006-05-25

申请号：US11263452

申请日：2005-10-31

申请人： D. Keele

发明人： D. Keele

IPC分类号： H04B1/10

CPC分类号： H03H17/06 ,  H03H17/0261 ,  H03H17/028 ,  H03H17/0621 ,  H03H2218/04

摘要： This invention provides a filter system which may be implemented with less hardware and software resources than traditional filters. In addition, the filter system structure reduces the complexities typically associated with filter design by permitting direct specification of the filter frequency response. Thus, the filter system may adaptively change the filter frequency response on the fly without incurring excessive time or computational costs. The filter system may provide a filtered signal output to any subsequent processing system, such as a voice recognition system or audio reproduction system.