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    SEMICONDUCTOR DEVICE
    2.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20210375877A1

    公开(公告)日：2021-12-02

    申请号：US17165539

    申请日：2021-02-02

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jin Sub KIM ,  Jun Kwan KIM ,  Woo Choel NOH ,  Kyoung-Hee KIM ,  Ik Soo KIM ,  Yong Jin SHIN

    IPC: H01L27/108

    Abstract: A semiconductor device includes a lower electrode on a substrate, a capacitor dielectric film extending on the lower electrode along a side surface of the lower electrode that is perpendicular to the substrate, an upper electrode on the capacitor dielectric film, an interface layer including a hydrogen blocking film and a hydrogen bypass film on the upper electrode, the hydrogen blocking film including a conductive material, and a contact plug penetrating the interface layer and electrically connected to the upper electrode.

    SEMICONDUCTOR DEVICE
    3.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20250149452A1

    公开(公告)日：2025-05-08

    申请号：US19008197

    申请日：2025-01-02

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jinsub KIM ,  Kyoung-hee KIM ,  Munjun KIM ,  Jun Kwan KIM ,  Woo Choel NOH

    IPC: H01L23/532 ,  H01L21/768 ,  H01L23/522 ,  H10B12/00

    Abstract: A semiconductor device includes a substrate including a cell array region and a peripheral circuit region, capacitors on the cell array region of the substrate, peripheral transistors on the peripheral circuit region of the substrate, a first upper interlayer insulating layer on the capacitors and the peripheral transistors, a first upper contact electrically connected to at least one of the peripheral transistors, the first upper contact penetrating the first upper interlayer insulating layer, a first upper interconnection line provided on the first upper interlayer insulating layer and electrically connected to the first upper contact, a second upper interlayer insulating layer covering the first upper interconnection line, and a first blocking layer between the first upper interlayer insulating layer and the second upper interlayer insulating layer. The first blocking layer is absent between the first upper interconnection line and the first upper interlayer insulating layer.

    SEMICONDUCTOR DEVICE
    5.
    发明公开
    SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20240196598A1

    公开(公告)日：2024-06-13

    申请号：US18527470

    申请日：2023-12-04

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jun Kwan KIM ,  Dong Woo KIM ,  Mun Jun KIM ,  On Yu BAE ,  Yong Jin SHIN ,  Kyoung Min WOO

    IPC: H10B12/00

    CPC classification number: H10B12/34 ,  H10B12/033 ,  H10B12/053 ,  H10B12/315

    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate containing deuterium at a first concentration, an active pattern disposed on the substrate and extending in a first horizontal direction, a gate electrode disposed on the active pattern and extending in a second horizontal direction different from the first horizontal direction, a gate insulating layer disposed between the active pattern and the gate electrode, the gate insulating layer containing deuterium at a second concentration, a first interlayer insulating layer disposed on the gate electrode, a second interlayer insulating layer disposed on the first interlayer insulating layer, and a wiring pattern disposed inside the second interlayer insulating layer, the wiring pattern containing deuterium at a third concentration lower than the first concentration, wherein each of the first to third concentrations is a concentration of deuterium atoms contained in the same unit volume.

    SEMICONDUCTOR DEVICE
    6.
    发明公开
    SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20240178138A1

    公开(公告)日：2024-05-30

    申请号：US18378182

    申请日：2023-10-10

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Yong Jin SHIN ,  Dong Woo KIM ,  Mun Jun KIM ,  Jun Kwan KIM ,  On Yu BAE ,  Kyoung Min WOO

    IPC: H01L23/528 ,  H01L21/768 ,  H01L23/532

    CPC classification number: H01L23/528 ,  H01L21/76832 ,  H01L21/76841 ,  H01L23/53223 ,  H01L28/90

    Abstract: A semiconductor device includes a substrate having a cell region and a peripheral region surrounding the cell region, a lower electrode extending in a vertical direction on the cell region of the substrate, an upper electrode surrounding a sidewall and a top surface of the lower electrode, a capacitor dielectric layer disposed between the lower electrode and the upper electrode, a first barrier layer disposed on the upper electrode, the first barrier layer in contact with each of a sidewall and a top surface of the upper electrode, a first interlayer insulating layer covering the first barrier layer, the first interlayer insulating layer including a material different from the first barrier layer, and a first contact penetrating through the first barrier layer and the first interlayer insulating layer in the vertical direction, the first contact connected to the upper electrode.

    SEMICONDUCTOR DEVICE
    7.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20190157214A1

    公开(公告)日：2019-05-23

    申请号：US16027484

    申请日：2018-07-05

    Applicant: Samsung Electronics Co. Ltd.

    Inventor： Jun Kwan KIM ,  Sanghoon AHN ,  Kyu-Hee HAN ,  JaeWha PARK ,  Heesook PARK

    IPC: H01L23/532 ,  H01L23/522

    Abstract: Provided is a semiconductor device comprising a device region on a substrate, an interlayer dielectric layer on the device region, a first interface layer on a side of the interlayer dielectric layer, a low-k dielectric layer spaced apart from the interlayer dielectric layer across the first interface layer and having a dielectric constant less than that of the interlayer dielectric layer, and a conductive line in the low-k dielectric layer. The first interface layer comprises a first sub-interface layer in contact with the low-k dielectric layer, and a second sub-interface layer in contact with the interlayer dielectric layer. The second sub-interface layer has hydrogen permeability less than that of the first sub-interface layer.

    SEMICONDUCTOR DEVICE
    8.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20210242079A1

    公开(公告)日：2021-08-05

    申请号：US17215365

    申请日：2021-03-29

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Moon Keun KIM ,  Jae Wha PARK ,  Jun Kwan KIM ,  Hyo Jeong MOON ,  Seung Jong PARK ,  Seul Gi BAE

    IPC: H01L21/768 ,  H01L23/532 ,  H01L21/02 ,  H01L23/522

    Abstract: A method for fabricating a semiconductor device includes forming a first wiring layer, the first wiring layer including a first metal wiring and a first interlayer insulating film wrapping the first metal wiring on a substrate, forming a first via layer, the first via layer including a first via that is in electrical connection with the first metal wiring, and a second interlayer insulating film wrapping the first via on the first wiring layer, and forming a second wiring layer, the second wiring layer including a second metal wiring that is in electrical connection with the first via, and a third interlayer insulating film wrapping the second metal wiring on the first via layer, wherein the third interlayer insulating film contains deuterium and is formed through chemical vapor deposition using a first gas containing deuterium and a second gas containing hydrogen.

    METHOD FOR FABRICATING SEMICONDUCTOR DEVICE
    9.
    发明申请
    METHOD FOR FABRICATING SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20200027783A1

    公开(公告)日：2020-01-23

    申请号：US16271120

    申请日：2019-02-08

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Moon Keun KIM ,  Jae Wha PARK ,  Jun Kwan KIM ,  Hyo Jeong MOON ,  Seung Jong PARK ,  Seul Gi BAE

    IPC: H01L21/768 ,  H01L21/02 ,  H01L23/522 ,  H01L23/532

    Abstract: A method for fabricating a semiconductor device includes forming a first wiring layer, the first wiring layer including a first metal wiring and a first interlayer insulating film wrapping the first metal wiring on a substrate, forming a first via layer, the first via layer including a first via that is in electrical connection with the first metal wiring, and a second interlayer insulating film wrapping the first via on the first wiring layer, and forming a second wiring layer, the second wiring layer including a second metal wiring that is in electrical connection with the first via, and a third interlayer insulating film wrapping the second metal wiring on the first via layer, wherein the third interlayer insulating film contains deuterium and is formed through chemical vapor deposition using a first gas containing deuterium and a second gas containing hydrogen.

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