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Patent Agency Ranking
公开(公告)号：US10076801B2
公开(公告)日：2018-09-18
申请号：US15443347
申请日：2017-02-27
Applicant: Samsung Electronics Co., Ltd.
Inventor： Min-woo Song , Sung-il Cho , Se-gi Byun , Jin Yu
CPC classification number: B23K1/203 , B23K1/0016 , B23K1/008 , B23K1/19 , B23K2101/42 , B82Y30/00 , B82Y40/00 , C01B32/158 , H01L21/4853 , H01L21/4864 , H01L23/49838 , H01L23/4985 , H01L24/16 , H01L24/81 , H01L2224/16227 , H01L2224/81024 , H01L2224/81815 , H01L2224/81911 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06568 , H01L2924/15311 , Y10S977/742 , Y10S977/745 , Y10S977/75 , Y10S977/752 , Y10S977/842 , Y10S977/89 , Y10S977/932
Abstract: A method of manufacturing a semiconductor package including coating a flux on a connection pad provided on a first surface of a substrate, the flux including carbon nanotubes (CNTs), placing a solder ball on the connection pad coated with the flux, forming a solder layer attached to the connection pad from the solder ball through a reflow process, and mounting a semiconductor chip on the substrate such that the solder layer faces a connection pad in the semiconductor chip may be provided.
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2.发明申请公开(公告)号：US20190279904A1
公开(公告)日：2019-09-12
申请号：US16297950
申请日：2019-03-11
Applicant: Samsung Electronics Co., Ltd.
Inventor： Byong-gook Jeong , Byung-ho Kim , Youn-jo Mun , Jeong-cheol An , Sung-il Cho , Dae-sang Chun , Man-hee Han
IPC: H01L21/78 , H01L21/02 , H01L21/268
Abstract: A method of fabricating a semiconductor package includes providing a substrate on a stage, the substrate including semiconductor dies and a modified layer along a partition lane and sequentially having an adhesive film and a base film on a surface thereof so that bottom surfaces of the adhesive film and the base film face the stage and top surfaces of the adhesive film and the base film face away from the stage and the bottom surface of the adhesive film faces the top surface of the base film; separating the semiconductor dies from each other by applying a force to the substrate in a lateral direction; applying a gas pressure to a top surface of each of the semiconductor dies; and irradiating ultraviolet rays toward the adhesive film after applying the gas pressure on the top surface of each of the semiconductor dies.
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公开(公告)号：US20190103376A1
公开(公告)日：2019-04-04
申请号：US15937984
申请日：2018-03-28
Applicant: Samsung Electronics Co., Ltd.
Inventor： Man-Hee Han , Dae-Sang Chan , Sung-il Cho , Jung-Lae Jung
CPC classification number: H01L24/75 , B23K1/0016 , B23K1/0056 , B23K3/087 , B23K2101/40 , H01L24/16 , H01L24/81 , H01L24/95 , H01L2224/16225 , H01L2224/7501 , H01L2224/751 , H01L2224/75261 , H01L2224/75263 , H01L2224/75302 , H01L2224/75312 , H01L2224/75314 , H01L2224/75754 , H01L2224/7598 , H01L2224/81001 , H01L2224/81011 , H01L2224/81022 , H01L2224/81024 , H01L2224/81224 , H01L2224/81815 , H01L2924/00014 , H01L2224/13099
Abstract: A jig for bonding a semiconductor chip may include a pressurizing portion and at least one opening. The pressuring portion may be configured to pressurize an upper surface of the semiconductor chip bonded to a package substrate via a bump and a flux using a laser. The opening may be surrounded by the pressurizing portion. The laser irradiated to the bump and the flux may be transmitted through the opening. A vapor generated from the flux by the laser may be discharged through the opening. Thus, the contamination of the jig caused by the vapor may be prevented so that a transmissivity of the laser through the jig may be maintained.
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公开(公告)号：US09412712B2
公开(公告)日：2016-08-09
申请号：US14722742
申请日：2015-05-27
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jin-wook Jang , Se-jin Yoo , Sung-il Cho , Jae-ho Choi
IPC: H01L23/48 , H01L23/00 , H01L23/498 , H01L23/31 , H01L25/065
CPC classification number: H01L24/09 , H01L21/565 , H01L23/3128 , H01L23/3135 , H01L23/3142 , H01L23/315 , H01L23/481 , H01L23/49811 , H01L23/49838 , H01L23/49861 , H01L23/5389 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/81 , H01L25/0657 , H01L2224/0401 , H01L2224/05022 , H01L2224/05572 , H01L2224/131 , H01L2224/16146 , H01L2224/16227 , H01L2224/16237 , H01L2224/17181 , H01L2224/73204 , H01L2224/8192 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06565 , H01L2924/141 , H01L2924/143 , H01L2924/1431 , H01L2924/1434 , H01L2924/15311 , H01L2924/18161 , H01L2924/014
Abstract: A semiconductor package includes a wiring substrate including a plurality of solder pads; a chip including a plurality of chip pads connected to the solder pads through a plurality of solders; a sealing layer configured to seal the chip and the solders, at least one void being between the solders; and a solder extrusion prevention layer on one sidewall of the solder exposed by the at least one void.
Abstract translation: 半导体封装包括：包括多个焊盘的布线基板; 芯片，其包括通过多个焊料连接到焊盘的多个芯片焊盘; 密封层，其被构造成密封所述芯片和所述焊料，所述至少一个空隙在所述焊料之间; 以及在由所述至少一个空隙暴露的所述焊料的一个侧壁上的焊料挤出防止层。
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公开(公告)号：US10741448B2
公开(公告)日：2020-08-11
申请号：US16297950
申请日：2019-03-11
Applicant: Samsung Electronics Co., Ltd.
Inventor： Byong-gook Jeong , Byung-ho Kim , Youn-jo Mun , Jeong-cheol An , Sung-il Cho , Dae-sang Chun , Man-hee Han
IPC: H01L21/78 , H01L21/02 , H01L21/268
Abstract: A method of fabricating a semiconductor package includes providing a substrate on a stage, the substrate including semiconductor dies and a modified layer along a partition lane and sequentially having an adhesive film and a base film on a surface thereof so that bottom surfaces of the adhesive film and the base film face the stage and top surfaces of the adhesive film and the base film face away from the stage and the bottom surface of the adhesive film faces the top surface of the base film; separating the semiconductor dies from each other by applying a force to the substrate in a lateral direction; applying a gas pressure to a top surface of each of the semiconductor dies; and irradiating ultraviolet rays toward the adhesive film after applying the gas pressure on the top surface of each of the semiconductor dies.
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