-
公开(公告)号:US20170156629A1
公开(公告)日:2017-06-08
申请号:US15344319
申请日:2016-11-04
Applicant: Samsung Electronics Co., Ltd
Inventor: Hyun-hee Jo , Se-jin Yoo
IPC: A61B5/055 , G01R33/341 , G01R33/56 , A61B5/00 , G01R33/54
CPC classification number: A61B5/055 , A61B5/0555 , A61B5/4312 , A61B5/748 , A61B2576/02 , G01R33/546 , G01R33/5601 , G01R33/5608
Abstract: A medical imaging apparatus and method capable of simultaneously displaying sagittal plane images and axial plane images of both breasts and navigating through the images . The medical imaging apparatus includes a data acquirer configured to acquire first volume data including first sections of a left breast and a right breast of an object, an image processor configured to generate second volume data including second sections of the left breast and the right breast of the object, based on the first volume data, generate a sagittal plane image and an axial plane image of the first breast and the second breast, based on the first volume data or the second volume data. A display is configured to display a user interface (UI) screen image including the sagittal plane image and the axial plane image.
-
2.
公开(公告)号:US09412712B2
公开(公告)日:2016-08-09
申请号:US14722742
申请日:2015-05-27
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jin-wook Jang , Se-jin Yoo , Sung-il Cho , Jae-ho Choi
IPC: H01L23/48 , H01L23/00 , H01L23/498 , H01L23/31 , H01L25/065
CPC classification number: H01L24/09 , H01L21/565 , H01L23/3128 , H01L23/3135 , H01L23/3142 , H01L23/315 , H01L23/481 , H01L23/49811 , H01L23/49838 , H01L23/49861 , H01L23/5389 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/81 , H01L25/0657 , H01L2224/0401 , H01L2224/05022 , H01L2224/05572 , H01L2224/131 , H01L2224/16146 , H01L2224/16227 , H01L2224/16237 , H01L2224/17181 , H01L2224/73204 , H01L2224/8192 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06565 , H01L2924/141 , H01L2924/143 , H01L2924/1431 , H01L2924/1434 , H01L2924/15311 , H01L2924/18161 , H01L2924/014
Abstract: A semiconductor package includes a wiring substrate including a plurality of solder pads; a chip including a plurality of chip pads connected to the solder pads through a plurality of solders; a sealing layer configured to seal the chip and the solders, at least one void being between the solders; and a solder extrusion prevention layer on one sidewall of the solder exposed by the at least one void.
Abstract translation: 半导体封装包括:包括多个焊盘的布线基板; 芯片,其包括通过多个焊料连接到焊盘的多个芯片焊盘; 密封层,其被构造成密封所述芯片和所述焊料,所述至少一个空隙在所述焊料之间; 以及在由所述至少一个空隙暴露的所述焊料的一个侧壁上的焊料挤出防止层。
-