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公开(公告)号：US20230080023A1
公开(公告)日：2023-03-16
申请号：US17897727
申请日：2022-08-29
Applicant: Samsung Electronics Co., Ltd.
Inventor： Taehwan JANG , Hyeokshin KWON , Jaeho SHIN
Abstract: A multi-mode resonator for a quantum computing element is included. In one general aspect, an apparatus including a multi-mode electromagnetic resonator includes a structure configured with a cavity therein that extends lengthwise in a first direction, the cavity including a first side surface and a second side surface facing each other, iris regions are at positions along the first direction on the first side surface of the cavity, the iris regions are arranged to overlap respective electromagnetic fields that form in the cavity in a target mode when electromagnetic energy is supplied to the cavity.
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公开(公告)号：US20220149501A1
公开(公告)日：2022-05-12
申请号：US17515055
申请日：2021-10-29
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jaehyeong LEE , Hyeokshin KWON , Jaeho SHIN , Taehwan JANG , Insu JEON
Abstract: A qubit memory of a quantum computer is provided. The qubit memory according to an embodiment includes a first readout unit, a first transmon, and a first data storage unit storing quantum information, and the first data storage unit includes a first superconducting waveguide layer, an insulating layer, and a superconductor layer sequentially stacked on a substrate. In one example, the first superconducting waveguide layer may include a superconducting resonator.
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公开(公告)号：US20220068424A1
公开(公告)日：2022-03-03
申请号：US17318234
申请日：2021-05-12
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jeongho LEE , Kwangjin LEE , Hee Hyun NAM , Jaeho SHIN , Youngkwang YOO
Abstract: Disclosed is a method of performing, at a controller, an access to a memory device, which includes transmitting, at the controller, a first command signal, a first address signal, and a first swizzling signal to the memory device, selecting first data bits stored in a memory cell array of the memory device based on the first command signal and the first address signal, and sequentially outputting, at the memory device, at least a part of the first data bits to the controller in a burst manner, based on the first swizzling signal.
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公开(公告)号：US20240260483A1
公开(公告)日：2024-08-01
申请号：US18507672
申请日：2023-11-13
Applicant: Samsung Electronics Co., Ltd.
Inventor： Daeseok HAN , Jaehyeong LEE , Jinhyoun KANG , Daeyun KIM , Jaeho SHIN , Daeho YANG
CPC classification number: H10N60/124 , H10N60/0941 , H10N60/805
Abstract: A device including a Josephson junction device including a first superconductor layer, a first oxide layer disposed on a first upper surface of the first superconductor layer, a second superconductor layer disposed to partially overlap the first superconductor layer, a second oxide layer disposed on a second upper surface of the second superconductor layer, and a third superconductor layer including a first portion facing the first upper surface of the first superconductor layer and a second portion facing the second upper surface of the second superconductor layer, and a first thickness of a first portion of the first oxide layer between a lower surface of the first portion of the third superconductor layer and a third upper surface of the first superconductor layer is less than a second thickness of a second portion of the first oxide layer.
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Patent Agency Ranking
公开(公告)号：US20230004849A1
公开(公告)日：2023-01-05
申请号：US17683797
申请日：2022-03-01
Applicant: Samsung Electronics Co., Ltd.
Inventor： Taehwan JANG , Jinhyoun KANG , Hyeokshin KWON , Jaeho SHIN , Jaehyeong LEE , Insu JEON , Sungho HAN
IPC: G06N10/40
Abstract: An active circulator includes: an active filter; and a power divider serially connected to the active filter, wherein three or more combinations of the active filter and the power divider are connected to form a loop.
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公开(公告)号：US20240289046A1
公开(公告)日：2024-08-29
申请号：US18535515
申请日：2023-12-11
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Sangoak WOO , Jaeho SHIN , Hyun Jae OH
IPC: G06F3/06
CPC classification number: G06F3/065 , G06F3/0622 , G06F3/0679
Abstract: An electronic device includes an input handling circuit, a control circuit, and a data transfer circuit. The input handling circuits receives a first request including an address from a first memory device, aligns the address with an access unit of a second memory device, requests a determination for the aligned address, and transmits a second request to the second memory device based on a determination result. The control circuit determines, based on the request, whether a duplicate address with the aligned address is present to generate the determination result and updates a bitmask based on the determination result. The data transfer circuit receives the second request from the second memory device and transfers data based on the bitmask. The bitmask includes one or more bits, each corresponding to the first request and indicating a location corresponding to the first request within an access unit of the second memory device.
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公开(公告)号：US20240260487A1
公开(公告)日：2024-08-01
申请号：US18488645
申请日：2023-10-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jaehyeong LEE , Jinhyoun KANG , Insu JEON , Jaeho SHIN
IPC: H10N69/00
CPC classification number: H10N69/00
Abstract: A qubit chip device includes: a substrate; a superconducting qubit on the substrate; and a readout circuit on the substrate and electrically connected to the superconducting qubit, the readout circuit including: a signal line on a surface of the substrate; a ground plate on the surface of the substrate, the ground plate including a pattern forming a coplanar waveguide along the signal line and offset from the signal line; and a conductive bridge embedded in the substrate and connecting two portions of the ground plate in a direction crossing the signal line.
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公开(公告)号：US20240237558A9
公开(公告)日：2024-07-11
申请号：US18194539
申请日：2023-03-31
Inventor： Jaehyeong LEE , Gilho LEE , Jinhyoun KANG , Jaeho SHIN , Seunghan LEE , Daeseok HAN
IPC: H10N69/00
CPC classification number: H10N69/00
Abstract: A superconducting quantum interferometric device (SQUID) includes: a conductive material region formed on a partial region of a substrate; a first superconducting material layer including a first loop including first and second extension units that are spaced apart from each other to form a proximity Josephson junction and that form a stack structure with the conductive material region; a second superconducting material layer including a second loop including first and second end units spaced apart from each other; and a tunnel Josephson junction formed by a stack structure including a tunnel thin film layer forming and the first and second end units, wherein at least a portion of the second loop forms a stack structure with the first loop.
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公开(公告)号：US20240138271A1
公开(公告)日：2024-04-25
申请号：US18194539
申请日：2023-03-30
Inventor： Jaehyeong LEE , Gilho LEE , Jinhyoun KANG , Jaeho SHIN , Seunghan LEE , Daeseok HAN
IPC: H10N69/00
CPC classification number: H10N69/00
Abstract: A superconducting quantum interferometric device (SQUID) includes: a conductive material region formed on a partial region of a substrate; a first superconducting material layer including a first loop including first and second extension units that are spaced apart from each other to form a proximity Josephson junction and that form a stack structure with the conductive material region; a second superconducting material layer including a second loop including first and second end units spaced apart from each other; and a tunnel Josephson junction formed by a stack structure including a tunnel thin film layer forming and the first and second end units, wherein at least a portion of the second loop forms a stack structure with the first loop.
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