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    Methods of manufacturing semiconductor devices
    2.
    发明授权
    Methods of manufacturing semiconductor devices 有权

    公开(公告)号：US10680008B2

    公开(公告)日：2020-06-09

    申请号：US16000984

    申请日：2018-06-06

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Keun Lee ,  Jeong Gil Lee ,  Do Hyung Kim ,  Sung Nam Lyu ,  Hyun Seok Lim

    IPC: H01L27/11582 ,  H01L27/1157 ,  H01L21/768 ,  H01L23/532 ,  H01L21/02 ,  H01L21/28

    Abstract: A method of manufacturing a semiconductor device includes alternately stacking sacrificial layers and interlayer insulating layers on a substrate, to form a stack structure; forming channels penetrating through the stack structure; forming separation regions penetrating through the stack structure; forming lateral openings by removing the sacrificial layers through the separation regions; and forming gate electrodes in the lateral openings. Forming the gate electrodes may include forming a nucleation layer in the lateral openings by supplying a source gas and a first reaction gas, and forming a bulk layer on the nucleation layer to fill the lateral openings by supplying the source gas and a second reaction gas, different from the first reaction gas. The first reaction gas may be supplied from a first reaction gas source, stored in a gas charging unit, and supplied from the gas charging unit.

    SEMICONDUCTOR DEVICES AND METHOD OF FORMING THE SAME
    3.
    发明申请
    SEMICONDUCTOR DEVICES AND METHOD OF FORMING THE SAME 审中-公开

    公开(公告)号：US20190067429A1

    公开(公告)日：2019-02-28

    申请号：US15914113

    申请日：2018-03-07

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Keun Lee ,  Jeong Gil Lee ,  Do Hyung Kim ,  Ki Hyun Yoon ,  Hyun Seok Lim

    IPC: H01L29/423 ,  H01L27/1157 ,  H01L27/11582 ,  H01L29/49 ,  H01L21/28

    Abstract: Semiconductor devices and methods of forming the same are provided. Semiconductor devices may include a plurality of gate electrodes that are stacked on a substrate and are spaced apart from each other in a vertical direction and a channel region extending through the plurality of gate electrodes in the vertical direction. Each of the plurality of gate electrodes may include a first conductive layer defining a recess recessed toward the channel region, and a second conductive layer in the recess defined by the first conductive layer. A first concentration of impurities in the second conductive layer may be higher than a second concentration of the impurities in the first conductive layer, and the impurities may include nitrogen (N).

    Semiconductor device
    4.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US11854979B2

    公开(公告)日：2023-12-26

    申请号：US17379000

    申请日：2021-07-19

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jang Eun Lee ,  Min Joo Lee ,  Wan Don Kim ,  Hyeon Jin Shin ,  Hyun Bae Lee ,  Hyun Seok Lim

    IPC: H01L23/532 ,  H10B12/00 ,  H01L21/768

    CPC classification number: H01L23/53252 ,  H01L23/53276 ,  H10B12/0335 ,  H10B12/315 ,  H10B12/482 ,  H01L21/76885

    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate including an element isolation layer, the element isolation layer defining an active region, a plurality of word lines traversing the active region in a first direction, and a plurality of bit line structures on the substrate and connected to the active region, the plurality of bit line structures extending in a second direction different from the first direction. Each of the plurality of bit line structures includes a ruthenium line wiring including a bottom surface and a top surface opposite to the bottom surface, a lower graphene layer in contact with the bottom surface of the ruthenium line wiring and extending along the bottom surface of the ruthenium line wiring, and a wiring line capping layer extending along the top surface of the ruthenium line wiring.

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