公开(公告)号：US20140319690A1

公开(公告)日：2014-10-30

申请号：US14258107

申请日：2014-04-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sangryol YANG ,  Soonwook JUNG ,  Kyoungseob KIM ,  Youngsub YOU ,  Byunghong CHUNG ,  Hanmei CHOI

IPC: H01L29/40 ,  H01L21/283

CPC classification number: H01L21/283 ,  H01L21/76805 ,  H01L29/401

Abstract: A semiconductor device includes a storage node contact on a substrate, and a lower electrode on the storage node contact, a lower sidewall of the lower electrode being covered by a contact residue of a same material as the storage node contact.

Abstract translation: 半导体器件包括在衬底上的存储节点接触和存储节点接触件上的下电极，下电极的下侧壁由与存储节点接触件相同的材料的接触残余物覆盖。

公开(公告)号：US20150255649A1

公开(公告)日：2015-09-10

申请号：US14582294

申请日：2014-12-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Beom Seok KIM ,  Bongjin KUH ,  Jongsung LIM ,  Hanmei CHOI

IPC: H01L31/0352 ,  H01L31/18

CPC classification number: H01L31/03529 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/26513 ,  H01L31/1804 ,  H01L31/1864 ,  Y02P70/521

Abstract: A semiconductor device includes a first semiconductor layer including a recess region and protrusions defined by the recessed region, first insulating patterns provided on the protrusions and extending to sidewalls of the protrusions, and a second semiconductor layer to fill the recess region and cover the first insulating patterns. The protrusions includes a first group of protrusions spaced apart from each other in a first direction to constitute a row and a second group of protrusions spaced from the first group of protrusions in a second direction intersecting the first direction and spaced from each other in the first direction to constitute a row. The second group of protrusions are shifted from the first group of protrusions in the first direction.

Abstract translation: 半导体器件包括：第一半导体层，包括凹陷区域和由凹陷区域限定的突起;设置在突起上并延伸到突起侧壁的第一绝缘图案;以及第二半导体层，用于填充凹陷区域并覆盖第一绝缘体 模式。 突起包括在第一方向上彼此间隔开的第一组突起，以构成一排，并且在与第一方向相交的第二方向上与第一组突起间隔开的第二组突起在第一方向上彼此间隔开 方向构成一排。 第二组突起在第一方向从第一组突起移位。

公开(公告)号：US20210265373A1

公开(公告)日：2021-08-26

申请号：US17034274

申请日：2020-09-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Shinjae KANG ,  Woosung LEE ,  Jeonggil LEE ,  Hanmei CHOI ,  Hauk HAN

IPC: H01L27/11556 ,  H01L27/11519 ,  H01L27/11526 ,  H01L27/11565 ,  H01L27/11573 ,  H01L27/11582 ,  H01L23/522

Abstract: Semiconductor devices including a substrate including a cell array region and a through electrode region, an electrode stack on the substrate and including electrodes, vertical structures penetrating the electrode stack within the cell array region, vertical fence structures within an extension region and surrounding the through electrode region, and insulating layers being inside a perimeter defined by the vertical fence structures and being at the same level as the electrodes may be provided. The electrodes may include first protrusions protruding between the vertical fence structures in a plan view.

公开(公告)号：US20160126119A1

公开(公告)日：2016-05-05

申请号：US14881414

申请日：2015-10-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Joonghan SHIN ,  Bongjin KUH ,  Wanit MANOROTKUL ,  Hanmei CHOI

IPC: H01L21/67 ,  H01L21/683 ,  H01L21/324 ,  B23K26/00 ,  H01L21/687

CPC classification number: H01L21/67115 ,  H01L21/268 ,  H01L21/68742

Abstract: A laser annealing apparatus includes a process chamber with a chamber window to transmit a laser beam, and a chuck in the process chamber, a top surface of the chuck supporting a loaded substrate, and a width of the chuck being smaller than a width of the loaded substrate.

Abstract translation: 激光退火装置包括具有腔室窗口以传递激光束的处理室和处理室中的卡盘，卡盘的顶表面支撑加载的基板，并且卡盘的宽度小于 加载基板。

公开(公告)号：US20230200077A1

公开(公告)日：2023-06-22

申请号：US18080013

申请日：2022-12-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyunjung LEE ,  Jaeho CHOI ,  Hanmei CHOI

IPC: H10B43/40 ,  H10B41/27 ,  H10B41/41 ,  H10B43/27

CPC classification number: H01L27/11573 ,  H01L27/11529 ,  H01L27/11556 ,  H01L27/11582

Abstract: A semiconductor device includes: a periphery circuit structure on a substrate; and a memory cell array on the periphery circuit structure, and including memory cells arranged in a first direction substantially perpendicular to an upper surface of the substrate, wherein the periphery circuit structure includes: a first element separation layer on the substrate and defining a first active region; a channel semiconductor layer on the first active region and at a higher level than an upper surface of the first element separation layer; a first gate structure on the channel semiconductor layer; a second element separation layer on the substrate, defining a second active region and a third active region, and including an upper surface at a higher level than the upper surface of the first element separation layer; a second gate structure on the second active region; and a third gate structure on the third active region.

公开(公告)号：US20150115368A1

公开(公告)日：2015-04-30

申请号：US14330777

申请日：2014-07-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki-Chul KIM ,  Joonghan SHIN ,  Bongjin KUH ,  Taegon KIM ,  Hanmei CHOI

IPC: H01L29/06 ,  H01L21/8238 ,  H01L27/092

CPC classification number: H01L29/0696 ,  H01L21/823807 ,  H01L21/845 ,  H01L27/092 ,  H01L27/1211

Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device may include a plurality of unit cells provided on a semiconductor substrate. Each of the unit cells may include a buried insulating pattern buried in the semiconductor substrate, a first active pattern provided on the buried insulating pattern, and a second active pattern provided on the buried insulating pattern and spaced apart from the first active pattern. The buried insulating pattern may define a unit cell region, in which each of the unit cells may be disposed.

Abstract translation: 提供半导体器件及其制造方法。 半导体器件可以包括设置在半导体衬底上的多个单元电池。 每个单电池可以包括埋在半导体衬底中的掩埋绝缘图案，设置在掩埋绝缘图案上的第一有源图案和设置在掩埋绝缘图案上并与第一有源图案间隔开的第二有源图案。 埋置的绝缘图案可以限定单位单元区域，其中可以布置每个单位单元。