Abstract:
A luminance control circuit of a display device includes a target luminance gain calculator calculating a target luminance gain based on an average luminance of a first image signal when the first image signal is determined to be a still image, an output luminance gain calculator calculating an output luminance gain based on a previous output luminance gain of a previous frame and the target luminance gain of a present frame, and a luminance scaler outputting a second image signal obtained by changing a luminance of the first image signal based on the output luminance gain.
Abstract:
A method includes applying a common voltage to a display panel, digitally converting a feedback common voltage from the display panel, detecting an effective ripple signal exceeding a reference value based on the digitally converted feedback common voltage, comparing a total number of effective ripple signals detected during a first frame period with a threshold value, determining whether the effective ripple signals of the first frame period are crosstalk inducing signals based on a comparison result, and determining whether to change a polarity pattern of image data signals to be applied to the display panel during a second frame period based on a determination result in terms of the crosstalk inducing signal.
Abstract:
A display apparatus includes a frame memory storing an input image signal having first and second reference blank durations respectively corresponding to a first frame and a second frame. A blank controller circuit determines a second delay blank duration based on the first and second reference blank durations and a first delay blank duration, a signal delay part generates an output image signal having the first and second delay blank durations corresponding to the first frame and second frame, respectively, is based on the stored input image signal, and a display panel displays an image based on the output image signal. The display apparatus may reduce or prevent flicker caused by variations in driving frequency that may be variable on a per-frame basis. A blank duration of a frame is controller, or a frame may be inserted in a blank duration based on blank durations of adjacent frames.
Abstract:
An image processing circuit includes a mapper configured to convert an image signal into an intermediate data signal, and a renderer configured to convert the intermediate data signal into a data signal, wherein the renderer includes a memory configured to store the intermediate data signal and a flag signal, and a rendering circuit configured to output a data signal corresponding to a current line in response to a next intermediate data signal corresponding to a next line, to output a current intermediate data signal corresponding to the current line from the memory, and to output a previous flag signal corresponding to a previous line from the memory.
Abstract:
A display device includes a display panel including gate lines which extends in a first direction, data lines which extends in a second direction, and sub-pixels connected to corresponding gate and data lines, a gate driver configured to drive the gate lines, a data driver configured to apply a gray-scale voltage to the data lines, and a timing controller configured to generate and apply control signals to the gate and data drivers, where a unit pixel of the display panel is defined by an even number of adjacent sub-pixels among the sub-pixels, each of the data lines is connected to corresponding sub-pixels of the sub-pixels, the data driver inverts a polarity of the gray-scale voltage every two data lines, and two adjacent sub-pixels in the unit pixel are applied with the gray-scale voltages having different polarities.
Abstract:
A display device includes display panels, a data converter that renders input image data to convert the input image data corresponding to edge regions of the display panels adjacent to a boundary portion between the display panels into correction data, and a driving controller that receives the correction data and generates a control signal that drives the display panels based on the correction data. The data converter generates the correction data in which an image displayed in the edge region is shifted based on a difference between values of the input image data corresponding to the edge regions of the display panels adjacent to the boundary portion between the display panels adjacent to each other.
Abstract:
Provided is a display apparatus including a display panel, a timing controller, a gate driver, and a data driver. The display panel includes a plurality of pixels and a plurality of sub-pixels. Two pixels among the pixels include five sub-pixels and temporally share a third sub-pixel among the five sub-pixels. The timing controller includes a filter that is set based on a region having the same area as four sub-pixels. The timing controller generates RGBW data having red, green, blue, and white data based on input data, and applies the filter to the RGBW data to generate output data corresponding to each of the sub-pixels.
Abstract:
A display device according to the present disclosure includes a plurality of gate lines extending in a row direction, a plurality of data lines intersecting with the gate lines, the data lines extending in a column direction, a plurality of pixels connected to the gate lines and the data lines, and a data driving unit configured to output a plurality of data voltages to the pixels, wherein the data driving unit outputs the data voltages based on a first column inversion scheme and a second column inversion scheme to respective data lines along the column direction.
Abstract:
A display apparatus includes gate lines extending in a first direction data lines extending in a second direction crossing the first direction, and pixels connected to the gate lines and the data lines. The pixels displaying first, second, third, and fourth colors are repeatedly arranged in the second direction. A k-th gate line connected to at least one of first pixels displaying the first color among the pixels arranged in an i-th row is electrically connected to a (k+j)th gate line connected to at least one of second pixels displaying the first color among pixels arranged in one row of (i+1)th, (i+2)th, and (i+3)th rows.
Abstract:
A display apparatus includes first pixels, second pixels, a gate driver, and a data driver. The first pixels receive data voltages in response to gate signals. The second pixels are alternately arranged with the first pixels in row and column directions and receive the data voltages in response to the gate signal. The gate and data drivers provide the gate and data signals, respectively, to the first and second pixels. Dual-gate signals each including two sub-gate signals having a same phase as each other are sequentially applied to the first and second pixels in the unit of two rows of odd-numbered rows and in the unit of two rows of even-numbered rows as the gate signals in a three-dimensional mode.