Abstract:
A luminance control circuit of a display device includes a target luminance gain calculator calculating a target luminance gain based on an average luminance of a first image signal when the first image signal is determined to be a still image, an output luminance gain calculator calculating an output luminance gain based on a previous output luminance gain of a previous frame and the target luminance gain of a present frame, and a luminance scaler outputting a second image signal obtained by changing a luminance of the first image signal based on the output luminance gain.
Abstract:
A display device includes: a display panel configured to display an image; a timing controller configured to output line configuration signals, frame configuration signals, and image signals; a plurality of data drivers each of which is configured to receive the line configuration signals, the frame configuration signals, and the image signals and provide a data voltage corresponding to the image signals to the display panel according to the line configuration signals and the frame configuration signals; a high speed driving line configured to connect the timing controller and one of the data drivers and transfer the image signals; and a low speed driving line configured to connect the timing controller and the data drivers and transfer the line configuration signals.
Abstract:
A display apparatus includes a display panel including a first pixel configured to include first and second sub-pixels and a second pixel configured to include third and fourth sub-pixels. A timing controller generates pixel data including first and second pixel data respectively corresponding to the first and second pixels and representable in a second matrix space, from pixel signals including first and second pixel signals representable in a first matrix space to respectively correspond to the first and second pixels. The timing controller generates the second pixel data on the basis of the first pixel signal adjacent to the second pixel signal which correspond to each second pixel data in the column direction in the first matrix space.
Abstract:
An image processing circuit includes a mapper configured to convert an image signal into an intermediate data signal, and a renderer configured to convert the intermediate data signal into a data signal, wherein the renderer includes a memory configured to store the intermediate data signal and a flag signal, and a rendering circuit configured to output a data signal corresponding to a current line in response to a next intermediate data signal corresponding to a next line, to output a current intermediate data signal corresponding to the current line from the memory, and to output a previous flag signal corresponding to a previous line from the memory.
Abstract:
A display apparatus includes gate lines extending in a first direction, data lines extending in a second direction crossing the first direction, first color pixels, and second color pixels. A first color pixel arranged in an f-th column between an f-th data line and an (f+1)th data line is connected to one of the f-th data line and the (f+1)th data line. A first color pixel arranged in a g-th column between a g-th data line and a (g+1)th data line is connected to one of a (g−1)th data line and a (g+2)th data line. First color pixels in a first color pixel diagonal group receive data voltages having a same polarity.Second color pixels in a second color pixel diagonal group receive data voltages having a same polarity.