公开(公告)号：US09799590B2

公开(公告)日：2017-10-24

申请号：US13801675

申请日：2013-03-13

Applicant: STATS ChipPAC, Ltd.

Inventor： KyungHoon Lee ,  SangMi Park ,  KyoungIl Huh ,  DaeSik Choi

IPC: H01L21/00 ,  H01L21/44 ,  H01L23/498 ,  H01L21/56 ,  H01L23/36 ,  H01L25/065 ,  H01L25/00 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L23/49816 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/49822 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/04105 ,  H01L2224/11 ,  H01L2224/12105 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/73209 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/81005 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06582 ,  H01L2225/06589 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/18162 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/81

Abstract: A semiconductor device includes a semiconductor wafer including a plurality of first semiconductor die. An opening is formed partially through the semiconductor wafer. A plurality of second semiconductor die is disposed over a first surface of the semiconductor wafer. An encapsulant is disposed over the semiconductor wafer and into the opening leaving a second surface of the semiconductor wafer exposed. A portion of the second surface of the semiconductor wafer is removed to separate the first semiconductor die. An interconnect structure is formed over the second semiconductor die and encapsulant. A thermal interface material is deposited over the second surface of the first semiconductor die. A heat spreader is disposed over the thermal interface material. An insulating layer is formed over the first surface of the semiconductor wafer. A vertical interconnect structure is formed around the first semiconductor die. Conductive vias are formed through the first semiconductor die.

公开(公告)号：US09318380B2

公开(公告)日：2016-04-19

申请号：US14330704

申请日：2014-07-14

Applicant: STATS ChipPAC, Ltd.

Inventor： YoungJoon Kim ,  SangMi Park ,  YongHyuk Jeong

IPC: H01L21/44 ,  H01L21/768 ,  H01L23/538 ,  H01L21/56 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  H01L21/683 ,  H01L23/498 ,  H01L23/31 ,  H01L25/03 ,  H01L25/10

CPC classification number: H01L21/76877 ,  H01L21/561 ,  H01L21/565 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/80 ,  H01L24/96 ,  H01L24/97 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2221/68345 ,  H01L2221/68363 ,  H01L2221/68381 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/16225 ,  H01L2224/19 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/81005 ,  H01L2224/83005 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06524 ,  H01L2225/06548 ,  H01L2225/06572 ,  H01L2924/01029 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19107 ,  H01L2224/81 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/11 ,  H01L2224/03

Abstract: A semiconductor device has a first conductive layer formed over a first substrate. A second conductive layer is formed over a second substrate. A first semiconductor die is mounted to the first substrate and electrically connected to the first conductive layer. A second semiconductor die is mounted to the second substrate and electrically connected to the second conductive layer. The first semiconductor die is mounted over the second semiconductor die. An encapsulant is deposited over the first and second semiconductor die and the first and second substrates. A conductive interconnect structure is formed through the encapsulant to electrically connect the first and second semiconductor die to the second surface of the semiconductor device. Forming the conductive interconnect structure includes forming a plurality of conductive vias through the encapsulant and the first substrate outside a footprint of the first and second semiconductor die.

Abstract translation: 半导体器件具有形成在第一衬底上的第一导电层。 在第二衬底上形成第二导电层。 第一半导体管芯安装到第一基板并电连接到第一导电层。 第二半导体管芯安装到第二衬底并电连接到第二导电层。 第一半导体管芯安装在第二半导体管芯上。 密封剂沉积在第一和第二半导体管芯以及第一和第二衬底上。 通过密封剂形成导电互连结构，以将第一和第二半导体管芯电连接到半导体器件的第二表面。 形成导电互连结构包括在第一和第二半导体管芯的覆盖区之外形成通过密封剂和第一衬底的多个导电通孔。

公开(公告)号：US20140322865A1

公开(公告)日：2014-10-30

申请号：US14330704

申请日：2014-07-14

Applicant: STATS ChipPAC, Ltd.

Inventor： YoungJoon Kim ,  SangMi Park ,  YongHyuk Jeong

IPC: H01L21/768 ,  H01L23/00

CPC classification number: H01L21/76877 ,  H01L21/561 ,  H01L21/565 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/80 ,  H01L24/96 ,  H01L24/97 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2221/68345 ,  H01L2221/68363 ,  H01L2221/68381 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/16225 ,  H01L2224/19 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/81005 ,  H01L2224/83005 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06524 ,  H01L2225/06548 ,  H01L2225/06572 ,  H01L2924/01029 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19107 ,  H01L2224/81 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/11 ,  H01L2224/03

Abstract: A semiconductor device has a first conductive layer formed over a first substrate. A second conductive layer is formed over a second substrate. A first semiconductor die is mounted to the first substrate and electrically connected to the first conductive layer. A second semiconductor die is mounted to the second substrate and electrically connected to the second conductive layer. The first semiconductor die is mounted over the second semiconductor die. An encapsulant is deposited over the first and second semiconductor die and the first and second substrates. A conductive interconnect structure is formed through the encapsulant to electrically connect the first and second semiconductor die to the second surface of the semiconductor device. Forming the conductive interconnect structure includes forming a plurality of conductive vias through the encapsulant and the first substrate outside a footprint of the first and second semiconductor die.

Abstract translation: 半导体器件具有形成在第一衬底上的第一导电层。 在第二衬底上形成第二导电层。 第一半导体管芯安装到第一基板并电连接到第一导电层。 第二半导体管芯安装到第二衬底并电连接到第二导电层。 第一半导体管芯安装在第二半导体管芯上。 密封剂沉积在第一和第二半导体管芯以及第一和第二衬底上。 通过密封剂形成导电互连结构，以将第一和第二半导体管芯电连接到半导体器件的第二表面。 形成导电互连结构包括在第一和第二半导体管芯的覆盖区之外形成通过密封剂和第一衬底的多个导电通孔。

公开(公告)号：US20140264817A1

公开(公告)日：2014-09-18

申请号：US13801675

申请日：2013-03-13

Applicant: STATS CHIPPAC, LTD.

Inventor： KyungHoon Lee ,  SangMi Park ,  KyoungIl Huh ,  DaeSik Choi

IPC: H01L23/34 ,  H01L21/56

CPC classification number: H01L23/49816 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/49822 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/04105 ,  H01L2224/11 ,  H01L2224/12105 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/73209 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/81005 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06582 ,  H01L2225/06589 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/18162 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/81

Abstract: A semiconductor device includes a semiconductor wafer including a plurality of first semiconductor die. An opening is formed partially through the semiconductor wafer. A plurality of second semiconductor die is disposed over a first surface of the semiconductor wafer. An encapsulant is disposed over the semiconductor wafer and into the opening leaving a second surface of the semiconductor wafer exposed. A portion of the second surface of the semiconductor wafer is removed to separate the first semiconductor die. An interconnect structure is formed over the second semiconductor die and encapsulant. A thermal interface material is deposited over the second surface of the first semiconductor die. A heat spreader is disposed over the thermal interface material. An insulating layer is formed over the first surface of the semiconductor wafer. A vertical interconnect structure is formed around the first semiconductor die. Conductive vias are formed through the first semiconductor die.

Abstract translation: 半导体器件包括包括多个第一半导体管芯的半导体晶片。 部分地通过半导体晶片形成开口。 多个第二半导体管芯设置在半导体晶片的第一表面上。 密封剂设置在半导体晶片上并进入开口，留下暴露的半导体晶片的第二表面。 去除半导体晶片的第二表面的一部分以分离第一半导体管芯。 在第二半导体管芯和密封剂上形成互连结构。 热界面材料沉积在第一半导体管芯的第二表面上。 散热器布置在热界面材料的上方。 在半导体晶片的第一表面上形成绝缘层。 在第一半导体管芯周围形成垂直互连结构。 导电孔通过第一半导体管芯形成。