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    SEMICONDUCTOR DEVICE
    1.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20210119058A1

    公开(公告)日：2021-04-22

    申请号：US17114598

    申请日：2020-12-08

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jong Ho PARK ,  Wan Don KIM ,  Weon Hong KIM ,  Hyeon Jun BAEK ,  Byoung Hoon LEE ,  Jeong Hyuk YIM ,  Sang Jin HYUN

    IPC: H01L29/78 ,  H01L29/49 ,  H01L29/51 ,  H01L27/088

    Abstract: A semiconductor device including: a first transistor which include a first gate stack on a substrate; and a second transistor which includes a second gate stack on the substrate, wherein the first gate stack includes a first ferroelectric material layer disposed on the substrate, a first work function layer disposed on the first ferroelectric material layer and a first upper gate electrode disposed on the first work function layer, wherein the second gate stack includes a second ferroelectric material layer disposed on the substrate, a second work function layer disposed on the second ferroelectric material layer and a second upper gate electrode disposed on the second work function layer, wherein the first work function layer includes the same material as the second work function layer, and wherein an effective work function of the first gate stack is different from an effective work function of the second gate stack.

    SEMICONDUCTOR DEVICE
    2.
    发明公开
    SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20230378263A1

    公开(公告)日：2023-11-23

    申请号：US18085886

    申请日：2022-12-21

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jin Kyu JANG ,  Byoung Hoon LEE ,  Chan Hyeong LEE ,  Nam Gyu CHO

    IPC: H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/786 ,  H01L29/775

    CPC classification number: H01L29/0673 ,  H01L29/4236 ,  H01L29/6656 ,  H01L29/78696 ,  H01L29/775

    Abstract: A semiconductor device includes an active pattern; gate spacers on the active pattern defining a gate trench; a gate insulating layer along a sidewall and a bottom surface of the gate trench; a first conductive layer on the gate insulating layer; a second conductive layer on the first conductive layer in the gate trench; a third conductive layer on the second conductive layer in the gate trench and including a first portion between parts of the second conductive layer, and a second portion on the first portion and in contact with an upper surface of the second conductive layer; and a capping pattern on the second and third conductive layers and including a portion between the gate insulating layer and the second portion, and in contact with a sidewall of the second portion, wherein a width of the second portion is greater than a width of the first portion.

    SEMICONDUCTOR DEVICE
    3.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20220254884A1

    公开(公告)日：2022-08-11

    申请号：US17503764

    申请日：2021-10-18

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jae-Jung KIM ,  Sang Yong KIM ,  Byoung Hoon LEE ,  Chan Hyeong LEE

    IPC: H01L29/06 ,  H01L29/423

    Abstract: A semiconductor device includes an active pattern disposed on a substrate. A gate insulating film is disposed on the active pattern and extends along the active pattern. A work function adjustment pattern is disposed on the gate insulating film and extends along the gate insulating film. A gate electrode is disposed on the work function adjustment pattern. The work function adjustment pattern includes a first work function adjustment film, a second work function adjustment film that includes aluminum and wraps the first work function adjustment film, and a barrier film including titanium silicon nitride (TiSiN). A silicon concentration of the barrier film is in a range of about 30 at % or less.

    SEMICONDUCTOR DEVICES
    5.
    发明申请
    SEMICONDUCTOR DEVICES 审中-公开

    公开(公告)号：US20190355825A1

    公开(公告)日：2019-11-21

    申请号：US16214537

    申请日：2018-12-10

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jeong Hyuk YIM ,  Kug Hwan KIM ,  Wan Don KIM ,  Jung Min PARK ,  Jong Ho PARK ,  Byoung Hoon LEE ,  Yong Ho HA ,  Sang Jin HYUN ,  Hye Ri HONG

    IPC: H01L29/423 ,  H01L29/51 ,  H01L29/66 ,  H01L29/49 ,  H01L29/78 ,  H01L27/092

    Abstract: A semiconductor device according to an example embodiment of the present inventive concept includes a substrate having a first region and a second region horizontally separate from the first region; a first gate line in the first region, the first gate line including a first lower work function layer and a first upper work function layer disposed on the first lower work function layer; and a second gate line including a second lower work function layer in the second region, the second gate line having a width in a first, horizontal direction equal to or narrower than a width of the first gate line in the first direction, wherein an uppermost end of the first upper work function layer and an uppermost end of the second lower work function layer are each located at a vertical level higher than an uppermost end of the first lower work function layer with respect to a second direction perpendicular to the first direction.

    SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME
    6.
    发明公开
    SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME 审中-公开

    公开(公告)号：US20240306370A1

    公开(公告)日：2024-09-12

    申请号：US18537912

    申请日：2023-12-13

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sungnam LYU ,  Hyo Jung NOH ,  Byoung Hoon LEE ,  Jang Eun LEE ,  Eul Ji JEONG

    IPC: H10B12/00

    CPC classification number: H10B12/34 ,  H10B12/053 ,  H10B12/315

    Abstract: A semiconductor memory device includes a substrate having an element separation film defining active areas; and gate structures in trenches on the substrate and intersecting the active areas, wherein each of the gate structures includes a gate insulating layer extending along sidewalls and a bottom surface of a corresponding one of the trenches, a gate electrode layer on the gate insulating layer and including a first metal layer and a second metal layer on the first metal layer, a liner film between the gate insulating layer and the first metal layer and including a same metal material as the first and second metal layers, and a capping film in contact with the second metal layer.

    SEMICONDUCTOR DEVICE
    7.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20200013897A1

    公开(公告)日：2020-01-09

    申请号：US16451787

    申请日：2019-06-25

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： JONG HO PARK ,  Wan Don KIM ,  Weon Hong KIM ,  Hyeon Jun BAEK ,  Byoung Hoon LEE ,  Jeong Hyuk YIM ,  Sang Jin HYUN

    IPC: H01L29/78 ,  H01L27/088 ,  H01L29/51 ,  H01L29/49

    Abstract: A semiconductor device including: a first transistor which include a first gate stack on a substrate; and a second transistor which includes a second gate stack on the substrate, wherein the first gate stack includes a first ferroelectric material layer disposed on the substrate, a first work function layer disposed on the first ferroelectric material layer and a first upper gate electrode disposed on the first work function layer, wherein the second gate stack. includes a second ferroelectric material layer disposed on the substrate, a second work function layer disposed on the second ferroelectric material layer and a second upper gate electrode disposed on the second work function layer, wherein the first work function layer includes the same material as the second work function layer, and wherein an effective work function of the first gate stack is different from an effective work function of the second gate stack.

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