公开(公告)号：US20160315024A1

公开(公告)日：2016-10-27

申请号：US14691946

申请日：2015-04-21

Applicant: QUALCOMM Incorporated

Inventor： Kwan-yu LAI ,  Ravindra Vaman SHENOY ,  Urmi RAY

IPC: H01L23/15 ,  H01L21/48 ,  H01L23/498

CPC classification number: H01L23/15 ,  H01L21/486 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/13 ,  H01L24/19 ,  H01L24/20 ,  H01L24/81 ,  H01L2224/04105 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/73267 ,  H01L2224/81805 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/15788 ,  H01L2924/3511 ,  H01L2924/014 ,  H01L2924/00014

Abstract: An integrated circuit package includes a core such as a thin glass core with through-core vias. A photo-patternable material is disposed directly on surfaces of the core and in the through-core vias and is selectively patterned to expose at least an exposed portion of the surface of the core and the through-core vias. A metal layer, such as copper, is disposed in the exposed portion of the core and in the through-core vias. A mechanical handler frame may be used to clamp together the various layers including the core and the photo-patternable material. The photo-patternable material that remains after patterning is permanent, and prevents the mechanical handler frame from directly contacting the core. Thus the photo-patternable material provides mechanical support to the core and protects the core from the mechanical handler.

Abstract translation: 集成电路封装包括芯，例如具有贯通芯通孔的薄玻璃芯。 光可图案化材料直接设置在芯的表面和通孔通孔中，并且被选择性地图案化以暴露核心表面和透核通孔的至少暴露部分。 金属层，例如铜，被布置在芯的暴露部分和通孔通孔中。 可以使用机械处理器框架将包括芯和可光图案化材料的各种层夹在一起。 在图案化之后保留的可光图案的材料是永久性的，并且防止机械处理器框架直接接触芯部。 因此，可照光图案材料为芯提供机械支撑并且保护芯不受机械处理器的影响。

公开(公告)号：US20160095221A1

公开(公告)日：2016-03-31

申请号：US14499151

申请日：2014-09-27

Applicant: QUALCOMM Incorporated

Inventor： Vidhya RAMACHANDRAN ,  Urmi RAY

IPC: H05K1/18 ,  H05K3/30 ,  H05K3/40 ,  H05K1/11

CPC classification number: H05K1/181 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/60 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/73 ,  H01L25/0657 ,  H01L27/0629 ,  H01L27/0694 ,  H01L27/1218 ,  H01L28/40 ,  H01L29/945 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05568 ,  H01L2224/06181 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/1703 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06544 ,  H01L2225/06568 ,  H01L2924/10253 ,  H01L2924/1203 ,  H01L2924/1304 ,  H01L2924/14 ,  H01L2924/15311 ,  H05K1/115 ,  H05K3/301 ,  H05K3/303 ,  H05K3/4038 ,  H05K2201/10166 ,  H05K2201/10174 ,  H05K2201/10515 ,  H01L2924/014 ,  H01L2924/00

Abstract: Systems and methods include a first semiconductor die with a substrate having a first side and a second side opposite to the first side. A first set of electronic elements is integrated on the first side. A second set of electronic elements is integrated on the second side. One or more through-substrate vias through the substrate are used to couple one or more of the first set of electronic elements and one or more of the second set of electronic elements. The through-substrate vias may be through-silicon vias (TSVs) or a through-glass vias (TGVs). The first semiconductor die may be stacked with a second semiconductor die, with the first side or the second side of the first semiconductor die interfacing an active side of the second semiconductor die.

Abstract translation: 系统和方法包括具有第一侧和与第一侧相对的第二侧的基板的第一半导体管芯。 第一组电子元件集成在第一面上。 第二组电子元件集成在第二侧。 通过衬底的一个或多个贯穿衬底通孔用于耦合第一组电子元件中的一个或多个以及第二组电子元件中的一个或多个。 贯通衬底通孔可以是硅通孔（TSV）或透玻璃通孔（TGV）。 第一半导体管芯可以与第二半导体管芯堆叠，第一半导体管芯的第一侧或第二侧与第二半导体管芯的有源侧相接。

公开(公告)号：US20150250058A1

公开(公告)日：2015-09-03

申请号：US14463367

申请日：2014-08-19

Applicant: QUALCOMM Incorporated

Inventor： Vidhya RAMACHANDRAN ,  Urmi RAY ,  Ravindra Vaman SHENOY ,  Kwan-Yu LAI ,  Jon Bradley LASITER

IPC: H05K1/18 ,  H01L21/768 ,  H01L21/28 ,  H01L23/538

CPC classification number: H05K1/185 ,  H01L21/28008 ,  H01L21/76802 ,  H01L21/76877 ,  H01L21/84 ,  H01L23/147 ,  H01L23/49827 ,  H01L23/5384 ,  H01L25/065 ,  H01L27/0629 ,  H01L27/0688 ,  H01L27/12 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/15311 ,  H01L2924/00

Abstract: An integrated interposer between a first component and a second component includes a substrate. The substrate may have thermal and/or mechanical properties with values lying between the thermal and/or mechanical properties of the first component and the second component. Active devices are disposed on a first surface of the substrate. A contact layer is coupled to the active devices and configured to couple at least the first component and a third component to the integrated interposer. At least one through via(s) is coupled to the contact layer and extends through the substrate to a second surface of the substrate. An interconnect layer is disposed on the second surface of the substrate and coupled to the at least one through via(s). The interconnect layer is configured to couple the second component to the integrated interposer.

Abstract translation: 第一部件和第二部件之间的集成插入件包括基板。 衬底可以具有热和/或机械性能，其中值位于第一部件和第二部件的热和/或机械性能之间。 有源器件设置在衬底的第一表面上。 接触层耦合到有源器件并且被配置为将至少第一部件和第三部件耦合到集成插入器。 至少一个通孔连接到接触层并且延伸穿过衬底到衬底的第二表面。 互连层设置在衬底的第二表面上并且耦合到至少一个通孔。 互连层被配置为将第二组件耦合到集成插入器。