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公开(公告)号:US12100335B2
公开(公告)日:2024-09-24
申请号:US18056649
申请日:2022-11-17
Applicant: QUALCOMM Incorporated
Inventor: Chun Wang , Sreekanth Modaikkal , Kumar Saurabh , Samson Kim , Kit Fong Ng
CPC classification number: G09G3/2096 , G09G3/001 , G09G5/391 , G09G2310/08 , G09G2330/021 , G09G2340/0407 , G09G2360/06 , G09G2360/08 , G09G2370/10 , G09G2370/16
Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for a power efficient display architecture. A display processor may obtain an indication that UC is to be displayed at a first resolution or a second resolution, where the first resolution is higher than the second resolution. The display processor may drive a first display via a first controller of a first DPU based on the indication. The display processor may drive a second display via a controller of a second DPU if the UC is to be displayed at the first resolution, or drive the second display via a second controller of the first DPU if the UC is to be displayed at the second resolution.
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公开(公告)号:US10929954B2
公开(公告)日:2021-02-23
申请号:US16258428
申请日:2019-01-25
Applicant: QUALCOMM Incorporated
Inventor: Daniel Stan , Chun Wang , Mark Sternberg , Jonathan Wicks
Abstract: The present disclosure relates to methods and devices for display processing. The device can receive a first image including a plurality of first pixels. Each of the first pixels can include a first red, green, blue (RGB) color value. The device can also determine an RGB adjustment value based on a lens correction value. Additionally, the device can determine a second RGB color value for each first pixel based on the determined RGB adjustment value. The device can also generate a second image including a plurality of second pixels, where each of the second pixels includes a determined second RGB color value. Moreover, the device can separate at least one of a red color value, green color value, or blue color value of the RGB color value and adjust at least one of a red color value or a blue color value based on the lens correction value.
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公开(公告)号:US20240203376A1
公开(公告)日:2024-06-20
申请号:US18066034
申请日:2022-12-14
Applicant: QUALCOMM Incorporated
Inventor: Sreekanth Modaikkal , Kumar Saurabh , Gary Arthur Ciambella , Chun Wang , Anitha Madugiri Siddaraju
CPC classification number: G09G5/14 , G06T1/60 , G09G5/397 , G09G2340/10 , G09G2340/12
Abstract: Efficiently processing multiple non-overlapping layer images in display processing units is disclosed herein. In this regard, in some exemplary aspects, a display processing unit comprising a plurality of memory access pipeline circuits and a layer mixer circuit is provided. For each non-overlapping layer image of a plurality of non-overlapping layer images, a memory access pipeline circuit obtains image configuration data for the non-overlapping layer image, and fetches the non-overlapping layer image from an image data storage device based on the image configuration data. The memory access pipeline circuit then outputs each pixel of the non-overlapping layer image as part of an intermediate preblend image data stream based on the image configuration data. The layer mixer circuit blends the intermediate preblend image data stream and a background layer image data stream comprising a background layer image as a display data stream, and outputs the display data stream to a display device.
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公开(公告)号:US11978372B1
公开(公告)日:2024-05-07
申请号:US18318646
申请日:2023-05-16
Applicant: QUALCOMM Incorporated
Inventor: Sreekanth Modaikkal , Kumar Saurabh , Kalyan Thota , Vishnuvardhan Prodduturi , Chun Wang
CPC classification number: G09G3/002 , G06F3/011 , G06F3/1423 , G09G5/12 , G06F2203/01
Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for synchronized dual eye variable refresh rate update for a VR display. A display processor obtains an indication of a synchronous flush or an asynchronous flush with respect to a first DPU and/or a second DPU. The display processor determines whether a first flush operation and/or a second flush operation is available at a time instance, where the first flush operation and the second flush operation are associated with the first DPU and/or the second DPU. The display processor performs, based on a VSync instance, the first flush operation and/or the second flush operation based on whether the first flush operation and/or the second flush operation are available at the time instance and based on the indication of the synchronous flush or the asynchronous flush.
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公开(公告)号:US20180122038A1
公开(公告)日:2018-05-03
申请号:US15412294
申请日:2017-01-23
Applicant: QUALCOMM Incorporated
Inventor: Chun Wang
CPC classification number: G06T1/20 , G06F3/1446 , G06T1/60 , G06T11/00 , G06T11/60 , G09G5/14 , G09G5/397 , G09G5/42 , G09G2300/026 , G09G2340/02 , G09G2340/12 , G09G2352/00 , G09G2360/06 , G09G2360/08 , G09G2360/122 , G09G2360/128 , G09G2360/18
Abstract: In general, techniques are described for performing multi-layer image fetching using a single hardware image fetcher pipeline of a display processor. A device comprising a layer buffer, and a display processor may be configured to perform the techniques. The layer buffer may be configured to store two or more independent layers. The display processor may include a single hardware image fetcher pipeline. The single hardware image fetcher pipeline may be configured to concurrently retrieve, from the layer buffer, two or more independent layers, concurrently process the two or more independent layers, and concurrently output, by two or more outputs of the single hardware image fetcher pipeline, the two or more processed independent layers for composition to form one of the frames to be displayed by one or more display units.
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公开(公告)号:US20170372452A1
公开(公告)日:2017-12-28
申请号:US15189956
申请日:2016-06-22
Applicant: QUALCOMM Incorporated
Inventor: Chun Wang
CPC classification number: G06T3/60 , G06T1/20 , G06T3/602 , G09G5/393 , G09G2340/0492 , G09G2360/122
Abstract: This disclosure describes an apparatus and techniques for rotating image data. The rotation techniques may include fetching a strip of a block of image data from an external memory, writing the strip into a strip buffer in a first scan direction, reading a micro-block of pixels of the strip in the strip buffer in the first scan direction and writing the micro-block into a rotation buffer in the first scan direction, and rotating the micro-block of pixels by reading the micro-block of pixels in the rotation buffer in a second scan direction, the second scan direction different from the first scan direction, and writing the micro-block of pixels into a rotation memory in the second scan direction.
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