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    EFFICIENTLY PROCESSING MULTIPLE NON-OVERLAPPING LAYER IMAGES IN DISPLAY PROCESSING UNITS
    1.
    发明公开
    EFFICIENTLY PROCESSING MULTIPLE NON-OVERLAPPING LAYER IMAGES IN DISPLAY PROCESSING UNITS 审中-公开

    公开(公告)号：US20240203376A1

    公开(公告)日：2024-06-20

    申请号：US18066034

    申请日：2022-12-14

    Applicant: QUALCOMM Incorporated

    Inventor： Sreekanth Modaikkal ,  Kumar Saurabh ,  Gary Arthur Ciambella ,  Chun Wang ,  Anitha Madugiri Siddaraju

    IPC: G09G5/14 ,  G06T1/60 ,  G09G5/397

    CPC classification number: G09G5/14 ,  G06T1/60 ,  G09G5/397 ,  G09G2340/10 ,  G09G2340/12

    Abstract: Efficiently processing multiple non-overlapping layer images in display processing units is disclosed herein. In this regard, in some exemplary aspects, a display processing unit comprising a plurality of memory access pipeline circuits and a layer mixer circuit is provided. For each non-overlapping layer image of a plurality of non-overlapping layer images, a memory access pipeline circuit obtains image configuration data for the non-overlapping layer image, and fetches the non-overlapping layer image from an image data storage device based on the image configuration data. The memory access pipeline circuit then outputs each pixel of the non-overlapping layer image as part of an intermediate preblend image data stream based on the image configuration data. The layer mixer circuit blends the intermediate preblend image data stream and a background layer image data stream comprising a background layer image as a display data stream, and outputs the display data stream to a display device.

    DITHER SPATIAL NOISE AWARE REDUNDANCY BYPASS
    2.
    发明申请
    DITHER SPATIAL NOISE AWARE REDUNDANCY BYPASS 审中-公开

    公开(公告)号：US20190051020A1

    公开(公告)日：2019-02-14

    申请号：US15676592

    申请日：2017-08-14

    Applicant: QUALCOMM Incorporated

    Inventor： Sreekanth Modaikkal ,  Anitha Madugiri Siddaraju

    IPC: G06T11/00 ,  G06T7/90 ,  G09G5/06 ,  G09G5/04 ,  G06T7/73

    Abstract: This disclosure describes examples for generating image content based on both a color value and a dither value that is to be applied. When a color value for the current pixel is the same as the color value for a previous pixel, and a dither value that is to be applied to the current pixel is the same as the dither value that was added to the previous pixel, a display processor may output the output color value for the previous pixel as the output color value for the current pixel.

    Synchronized dual eye variable refresh rate update for VR display
    5.
    发明授权
    Synchronized dual eye variable refresh rate update for VR display 有权

    公开(公告)号：US11978372B1

    公开(公告)日：2024-05-07

    申请号：US18318646

    申请日：2023-05-16

    Applicant: QUALCOMM Incorporated

    Inventor： Sreekanth Modaikkal ,  Kumar Saurabh ,  Kalyan Thota ,  Vishnuvardhan Prodduturi ,  Chun Wang

    IPC: G09G3/00 ,  G06F3/01 ,  G06F3/14 ,  G09G5/12

    CPC classification number: G09G3/002 ,  G06F3/011 ,  G06F3/1423 ,  G09G5/12 ,  G06F2203/01

    Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for synchronized dual eye variable refresh rate update for a VR display. A display processor obtains an indication of a synchronous flush or an asynchronous flush with respect to a first DPU and/or a second DPU. The display processor determines whether a first flush operation and/or a second flush operation is available at a time instance, where the first flush operation and the second flush operation are associated with the first DPU and/or the second DPU. The display processor performs, based on a VSync instance, the first flush operation and/or the second flush operation based on whether the first flush operation and/or the second flush operation are available at the time instance and based on the indication of the synchronous flush or the asynchronous flush.

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