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公开(公告)号：US20240137067A1
公开(公告)日：2024-04-25
申请号：US18500959
申请日：2023-11-01
Applicant: Apple Inc.
Inventor： Long Kong , Chia-Hsiang Chen , Utku Seckin
IPC: H04B1/7163 , H04B1/717
CPC classification number: H04B1/71635 , H04B1/7172 , H04B2201/7163
Abstract: A signal transmitter may include a waveform synthesis circuit and a signal transmission circuit. The waveform synthesis circuit may store values of a reference waveform for a selected channel of the signal transmitter, and use the stored values to generate values of reference waveforms for one or more other channels of the signal transmitter. The waveform synthesis circuit may further include a sampling boost circuit to generate one or more additional values for the reference waveforms. The waveform transmission circuit may generate signals for the channels of the signal transmitter based at least in part on the values of the reference waveforms, and transmit the signals via one or more antennas.
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公开(公告)号：US20230084706A1
公开(公告)日：2023-03-16
申请号：US17947739
申请日：2022-09-19
Applicant: Apple Inc.
Inventor： Long Kong , Simone Gambini , Utku Seckin
Abstract: An electronic device may include wireless circuitry with processor circuitry, a transceiver circuit, a front-end module, and an antenna. The front-end module may include amplifier circuitry such as low noise amplifier circuitry for amplifying received radio-frequency signals. The amplifier circuitry may include an amplifier having an input and an output, an adjustable load component coupled to the input, and an adjustable feedback component coupled across the input and output. A control circuit may simultaneously adjust the load and feedback components to tune the gain of the amplifier circuitry while maintaining the input resistance at a desired target level. The load and feedback components can be the same or different types of adjustable passive components.
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3.发明申请公开(公告)号：US20210064380A1
公开(公告)日：2021-03-04
申请号：US16557357
申请日：2019-08-30
Applicant: Apple Inc.
Inventor： Tao Mai , Robert G. Lorenz , Joachim S. Hammerschmidt , Utku Seckin
Abstract: A digital filter according to the disclosure includes a processing circuit having a memory and a number of parallel processing circuits. The parallel processing circuits perform a convolution operations based on input data and function data that is accessed from the memory. The filter further includes a serializer for serializing data that is received from the processing circuits. A clock generator circuit provides a first clock signal to the processing circuit and a second clock signal to the serializer. The frequency of the second clock signal is greater than that of the first clock signal.
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公开(公告)号：US20240275391A1
公开(公告)日：2024-08-15
申请号：US18110246
申请日：2023-02-15
Applicant: Apple Inc.
Inventor： Christian Venerus , Utku Seckin , Vikram Magoon
CPC classification number: H03L7/093 , H04L27/2082
Abstract: This disclosure is directed to a transmitter including a phase locked loop (PLL), a modulator, and a power amplifier (PA). A controller including programmable and/or hardened logic circuitry may be coupled to the PLL and the modulator. The controller may provide encoded signals based on quadrature phase shift keying (QPSK) scheme for transmission by the transmitter. In particular, the controller may provide multiple bursts of pulses indicative of data packets to the modulator. Moreover, the controller may provide instructions indicative of generating clock signals with in-phase and quadrature phases to the PLL. The PLL may generate clock signals corresponding to the in-phase and quadrature phases. As such, the transmitter may generate in-phase and quadrature output signals based on receiving each burst of pulses with either in-phase or quadrature phases.
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公开(公告)号：US11469710B2
公开(公告)日：2022-10-11
申请号：US17348414
申请日：2021-06-15
Applicant: Apple Inc.
Inventor： Feng Zhao , Utku Seckin
Abstract: An electronic device may include wireless circuitry with a baseband processor, a transceiver, a front-end module, and an antenna. The transceiver may include mixer circuitry. The mixer circuitry may include switches controlled by oscillator signals. The mixer circuitry may also include oscillator phase noise cancelling capacitors controlled by inverted oscillator signals. Operated in this way, the mixer circuitry exhibits improved noise figure performance.
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Patent Agency Ranking
公开(公告)号：US20210096217A1
公开(公告)日：2021-04-01
申请号：US16583522
申请日：2019-09-26
Applicant: Apple Inc.
Inventor： Jouya Jadidian , Chunshu Li , Sujeet Milind Patole , Utku Seckin
Abstract: During operation, a first radar transmitter in an electronic device may provide, via a switch, a first set of electrical signals (such as pulses) during a first time interval to a transmission path, which may result in transmitting of the first wireless signals by an antenna. Then, a second radar transmitter may provide, via the switch, a second set of electrical signals (such as pulses) during a second time interval to the transmission path, which may result in transmitting of the second wireless signals by the antenna. Moreover, N radar receivers in the electronic device may receive first wireless-return signals corresponding to the first set of wireless signals and second wireless-return signals corresponding to the second set of wireless signals. These wireless-return signals may be combined to create a virtual array MIMO radar having an antenna aperture size of 2N.
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公开(公告)号：US20210067107A1
公开(公告)日：2021-03-04
申请号：US16551618
申请日：2019-08-26
Applicant: Apple Inc.
Inventor： Utku Seckin , Hanwen Yang
Abstract: A switching power amplifier includes logic circuitry that generates first and second components of a differential signal, based on received amplitude code and a delayed version of the same. The amplitude code includes a sign and a magnitude. When the sign is positive, a first logic path is configured to generate the first component based on the received amplitude code and the second logic path is configured to generate the second component based on the delayed amplitude code. When the sign is negative, the first logic path is configured to generate the first component based on the delayed amplitude code and the second logic path is configured to generate the second component based on the received amplitude code. The switching power amplifier further includes a differential-to-single ended conversion circuit configured to generate a single-ended signal based on the differential signal.
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公开(公告)号：US12212326B2
公开(公告)日：2025-01-28
申请号：US18110246
申请日：2023-02-15
Applicant: Apple Inc.
Inventor： Christian Venerus , Utku Seckin , Vikram Magoon
Abstract: This disclosure is directed to a transmitter including a phase locked loop (PLL), a modulator, and a power amplifier (PA). A controller including programmable and/or hardened logic circuitry may be coupled to the PLL and the modulator. The controller may provide encoded signals based on quadrature phase shift keying (QPSK) scheme for transmission by the transmitter. In particular, the controller may provide multiple bursts of pulses indicative of data packets to the modulator. Moreover, the controller may provide instructions indicative of generating clock signals with in-phase and quadrature phases to the PLL. The PLL may generate clock signals corresponding to the in-phase and quadrature phases. As such, the transmitter may generate in-phase and quadrature output signals based on receiving each burst of pulses with either in-phase or quadrature phases.
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公开(公告)号：US20240235607A9
公开(公告)日：2024-07-11
申请号：US18500959
申请日：2023-11-02
Applicant: Apple Inc.
Inventor： Long Kong , Chia-Hsiang Chen , Utku Seckin
IPC: H04B1/7163 , H04B1/717
CPC classification number: H04B1/71635 , H04B1/7172 , H04B2201/7163
Abstract: A signal transmitter may include a waveform synthesis circuit and a signal transmission circuit. The waveform synthesis circuit may store values of a reference waveform for a selected channel of the signal transmitter, and use the stored values to generate values of reference waveforms for one or more other channels of the signal transmitter. The waveform synthesis circuit may further include a sampling boost circuit to generate one or more additional values for the reference waveforms. The waveform transmission circuit may generate signals for the channels of the signal transmitter based at least in part on the values of the reference waveforms, and transmit the signals via one or more antennas.
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公开(公告)号：US20230082519A1
公开(公告)日：2023-03-16
申请号：US17750909
申请日：2022-05-23
Applicant: Apple Inc.
Inventor： Long Kong , Simone Gambini , Utku Seckin
Abstract: An electronic device may include wireless circuitry with processor circuitry, a transceiver circuit, a front-end module, and an antenna. The front-end module may include amplifier circuitry such as low noise amplifier circuitry for amplifying received radio-frequency signals. The amplifier circuitry may include an amplifier having an input and an output, an adjustable load component coupled to the input, and an adjustable feedback component coupled across the input and output. A control circuit may simultaneously adjust the load and feedback components to tune the gain of the amplifier circuitry while maintaining the input resistance at a desired target level. The load and feedback components can be the same or different types of adjustable passive components.
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