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公开(公告)号：US10956220B2
公开(公告)日：2021-03-23
申请号：US15870760
申请日：2018-01-12
Applicant: Apple Inc.
Inventor： Jeremy C. Andrus , John G. Dorsey , James M. Magee , Daniel A. Chimene , Cyril de la Cropte de Chanterac , Bryan R. Hinch , Aditya Venkataraman , Andrei Dorofeev , Nigel R. Gamble , Russell A. Blaine , Constantin Pistol , James S. Ismail
IPC: G06F1/3206 , G06F9/50 , G06F9/48 , G06F1/3234 , G06F1/329 , G06F1/3296 , G06F9/38 , G06F9/26 , G06F9/54 , G06F1/20 , G06F1/324 , G06F9/30
Abstract: Systems and methods are disclosed for scheduling threads on a processor that has at least two different core types, such as an asymmetric multiprocessing system. Each core type can run at a plurality of selectable voltage and frequency scaling (DVFS) states. Threads from a plurality of processes can be grouped into thread groups. Execution metrics are accumulated for threads of a thread group and fed into a plurality of tunable controllers for the thread group. A closed loop performance control (CLPC) system determines a control effort for the thread group and maps the control effort to a recommended core type and DVFS state. A closed loop thermal and power management system can limit the control effort determined by the CLPC for a thread group, and limit the power, core type, and DVFS states for the system. Deferred interrupts can be used to increase performance.
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公开(公告)号：US10884811B2
公开(公告)日：2021-01-05
申请号：US15870764
申请日：2018-01-12
Applicant: Apple Inc.
Inventor： Jeremy C. Andrus , John G. Dorsey , James M. Magee , Daniel A. Chimene , Cyril de la Cropte de Chanterac , Bryan R. Hinch , Aditya Venkataraman , Andrei Dorofeev , Nigel R. Gamble , Russell A. Blaine , Constantin Pistol
IPC: G06F9/50 , G06F9/48 , G06F1/3234 , G06F1/329 , G06F1/3296 , G06F9/38 , G06F9/26 , G06F9/54 , G06F1/20 , G06F1/324 , G06F1/3206 , G06F9/30
Abstract: Systems and methods are disclosed for scheduling threads on a processor that has at least two different core types, such as an asymmetric multiprocessing system. Each core type can run at a plurality of selectable voltage and frequency scaling (DVFS) states. Threads from a plurality of processes can be grouped into thread groups. Execution metrics are accumulated for threads of a thread group and fed into a plurality of tunable controllers for the thread group. A closed loop performance control (CLPC) system determines a control effort for the thread group and maps the control effort to a recommended core type and DVFS state. A closed loop thermal and power management system can limit the control effort determined by the CLPC for a thread group, and limit the power, core type, and DVFS states for the system. Deferred interrupts can be used to increase performance.
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公开(公告)号：US10417054B2
公开(公告)日：2019-09-17
申请号：US15870763
申请日：2018-01-12
Applicant: Apple Inc.
Inventor： Jeremy C. Andrus , John G. Dorsey , James M. Magee , Daniel A. Chimene , Cyril de la Cropte de Chanterac , Bryan R. Hinch , Aditya Venkataraman , Andrei Dorofeev , Nigel R. Gamble , Russell A. Blaine , Constantin Pistol
IPC: G06F9/50 , G06F9/48 , G06F9/26 , G06F9/38 , G06F9/54 , G06F1/20 , G06F1/324 , G06F1/3234 , G06F1/329 , G06F1/3296 , G06F9/30 , G06F1/3206
Abstract: Systems and methods are disclosed for scheduling threads on a processor that has at least two different core types, such as an asymmetric multiprocessing system. Each core type can run at a plurality of selectable voltage and frequency scaling (DVFS) states. Threads from a plurality of processes can be grouped into thread groups. Execution metrics are accumulated for threads of a thread group and fed into a plurality of tunable controllers for the thread group. A closed loop performance control (CLPC) system determines a control effort for the thread group and maps the control effort to a recommended core type and DVFS state. A closed loop thermal and power management system can limit the control effort determined by the CLPC for a thread group, and limit the power, core type, and DVFS states for the system. Deferred interrupts can be used to increase performance.
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公开(公告)号：US20190075037A1
公开(公告)日：2019-03-07
申请号：US16180207
申请日：2018-11-05
Applicant: Apple Inc.
Inventor： Kartik Venkatraman , Cyril de la Cropte de Chanterac , Shardul Mangade
Abstract: In some implementations, a user device can schedule tasks based on user behavior. For example, the user device can receive a task request that includes a time window and user/device context parameters for performing the task. The user device can predict a time when the user/device context is optimal for performing the task during the time window based on historical context data. For example, the user device can generate an optimal context score for the task based on the context parameters and the historical context data. The user device can execute the requested task at a current time within the time window when a context score for the current context exceeds a threshold determined based on the optimal context score.
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5.发明申请公开(公告)号：US20180349182A1
公开(公告)日：2018-12-06
申请号：US15870766
申请日：2018-01-12
Applicant: Apple Inc.
Inventor： Jeremy C. Andrus , John G. Dorsey , James M. Magee , Daniel A. Chimene , Cyril de la Cropte de Chanterac , Bryan R. Hinch , Aditya Venkataraman , Andrei Dorofeev , Nigel R. Gamble , Russell A. Blaine , Constantin Pistol
Abstract: Systems and methods are disclosed for scheduling threads on a processor that has at least two different core types, such as an asymmetric multiprocessing system. Each core type can run at a plurality of selectable voltage and frequency scaling (DVFS) states. Threads from a plurality of processes can be grouped into thread groups. Execution metrics are accumulated for threads of a thread group and fed into a plurality of tunable controllers for the thread group. A closed loop performance control (CLPC) system determines a control effort for the thread group and maps the control effort to a recommended core type and DVFS state. A closed loop thermal and power management system can limit the control effort determined by the CLPC for a thread group, and limit the power, core type, and DVFS states for the system. Deferred interrupts can be used to increase performance.
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Patent Agency Ranking
公开(公告)号：US20180349175A1
公开(公告)日：2018-12-06
申请号：US15870760
申请日：2018-01-12
Applicant: Apple Inc.
Inventor： Jeremy C. Andrus , John G. Dorsey , James M. Magee , Daniel A. Chimene , Cyril de la Cropte de Chanterac , Bryan R. Hinch , Aditya Venkataraman , Andrei Dorofeev , Nigel R. Gamble , Russell A. Blaine , Constantin Pistol , James S. Ismail
Abstract: Systems and methods are disclosed for scheduling threads on a processor that has at least two different core types, such as an asymmetric multiprocessing system. Each core type can run at a plurality of selectable voltage and frequency scaling (DVFS) states. Threads from a plurality of processes can be grouped into thread groups. Execution metrics are accumulated for threads of a thread group and fed into a plurality of tunable controllers for the thread group. A closed loop performance control (CLPC) system determines a control effort for the thread group and maps the control effort to a recommended core type and DVFS state. A closed loop thermal and power management system can limit the control effort determined by the CLPC for a thread group, and limit the power, core type, and DVFS states for the system. Deferred interrupts can be used to increase performance.
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公开(公告)号：US09477998B2
公开(公告)日：2016-10-25
申请号：US14489356
申请日：2014-09-17
Applicant: Apple Inc.
Inventor： John G. Dorsey , Keith Cox , Cyril de la Cropte de Chanterac , Karl D. Vulkan
CPC classification number: G06T1/20 , G06T13/80 , G09G5/18 , G09G5/363 , G09G2330/021 , G09G2340/0435 , G09G2340/045
Abstract: The embodiments set forth a technique for targeted scaling of the voltage and/or frequency of hardware components included in a mobile computing device. One embodiment involves independently analyzing the individual frame rates of each animation within a user interface (UI) of a mobile computing device instead of analyzing the frame rate of the UI as a whole. This can involve establishing, for each animation being displayed within the UI, a corresponding performance control pipeline that generates a control signal for scaling a performance mode of the hardware components (e.g., a Central Processing Unit (CPU)) included in the mobile computing device. In this manner, the control signals generated by the performance control pipelines can be aggregated to produce a control signal that causes a power management component to scale the performance mode(s) of the hardware components.
Abstract translation: 这些实施例提出了用于针对包括在移动计算设备中的硬件组件的电压和/或频率进行目标缩放的技术。 一个实施例涉及独立地分析移动计算设备的用户界面（UI）内的每个动画的各个帧速率，而不是分析整个UI的帧速率。 这可以涉及为在UI内显示的每个动画建立相应的性能控制流水线，其生成用于缩放包括在移动计算设备中的硬件组件（例如，中央处理单元（CPU））的性能模式的控制信号 。 以这种方式，可以聚合由性能控制管线产生的控制信号，以产生控制信号，该控制信号使得功率管理部件缩放硬件部件的性能模式。
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公开(公告)号：US20210318909A1
公开(公告)日：2021-10-14
申请号：US17208928
申请日：2021-03-22
Applicant: Apple Inc.
Inventor： Jeremy C. Andrus , John G. Dorsey , James M. Magee , Daniel A. Chimene , Cyril de la Cropte de Chanterac , Bryan R. Hinch , Aditya Venkataraman , Andrei Dorofeev , Nigel R. Gamble , Russell A. Blaine , Constantin Pistol , James S. Ismail
IPC: G06F9/50 , G06F9/48 , G06F1/3234 , G06F1/329 , G06F1/3296 , G06F9/38 , G06F9/26 , G06F9/54 , G06F1/20 , G06F1/324
Abstract: Systems and methods are disclosed for scheduling threads on a processor that has at least two different core types, such as an asymmetric multiprocessing system. Each core type can run at a plurality of selectable voltage and frequency scaling (DVFS) states. Threads from a plurality of processes can be grouped into thread groups. Execution metrics are accumulated for threads of a thread group and fed into a plurality of tunable controllers for the thread group. A closed loop performance control (CLPC) system determines a control effort for the thread group and maps the control effort to a recommended core type and DVFS state. A closed loop thermal and power management system can limit the control effort determined by the CLPC for a thread group, and limit the power, core type, and DVFS states for the system. Deferred interrupts can be used to increase performance.
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公开(公告)号：US10972372B2
公开(公告)日：2021-04-06
申请号：US16180207
申请日：2018-11-05
Applicant: Apple Inc.
Inventor： Kartik Venkatraman , Cyril de la Cropte de Chanterac , Shardul Mangade
Abstract: In some implementations, a user device can schedule tasks based on user behavior. For example, the user device can receive a task request that includes a time window and user/device context parameters for performing the task. The user device can predict a time when the user/device context is optimal for performing the task during the time window based on historical context data. For example, the user device can generate an optimal context score for the task based on the context parameters and the historical context data. The user device can execute the requested task at a current time within the time window when a context score for the current context exceeds a threshold determined based on the optimal context score.
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公开(公告)号：US10782773B2
公开(公告)日：2020-09-22
申请号：US16794034
申请日：2020-02-18
Applicant: Apple Inc.
Inventor： Cyril de la Cropte de Chanterac , Kartik R. Venkatraman , Alessandro Pelosi , Shardul S. Mangade
Abstract: An electronic device may have a power system with a battery. The power system receives power such as wireless power or wired power and uses a portion of the received power to charge the battery as needed. Control circuitry in the portable electronic device is used to run background processes such as image processing tasks, data synchronization tasks, indexing, and other background processes. In some circumstances, such as when the battery is below a certain state of charge threshold, background processes may be stopped so that the battery is charged as fast as possible. Once above this initial state of charge threshold, background processes may be performed during charging as long as the temperature and state of charge of the battery do not exceed safety temperature and safety state of charge values. Performing background processes in these conditions ensures requisite background processing tasks are completed while preserving battery health.
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