Invention Publication
- Patent Title: 3D SEMICONDUCTOR DEVICES AND STRUCTURES WITH METAL LAYERS
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Application No.: US18668218Application Date: 2024-05-19
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Publication No.: US20240304617A1Publication Date: 2024-09-12
- Inventor: Zvi Or-Bach , Brian Cronquist
- Applicant: Monolithic 3D Inc.
- Applicant Address: US OR Klamath Falls
- Assignee: Monolithic 3D Inc.
- Current Assignee: Monolithic 3D Inc.
- Current Assignee Address: US OR Klamath Falls
- Main IPC: H01L27/06
- IPC: H01L27/06 ; G03F9/00 ; H01L21/268 ; H01L21/762 ; H01L21/768 ; H01L21/822 ; H01L21/8238 ; H01L21/84 ; H01L23/00 ; H01L23/367 ; H01L23/48 ; H01L23/522 ; H01L23/528 ; H01L23/532 ; H01L23/544 ; H01L27/02 ; H01L27/088 ; H01L27/092 ; H01L27/105 ; H01L27/118 ; H01L27/12 ; H01L29/423 ; H01L29/45 ; H01L29/66 ; H01L29/732 ; H01L29/786 ; H01L29/808 ; H01L29/812 ; H10B10/00 ; H10B12/00 ; H10B20/00 ; H10B41/20 ; H10B43/20

Abstract:
A semiconductor device including: a first silicon level including a first single crystal silicon layer and a plurality of first transistors; a first metal layer disposed over the first silicon level; a second metal layer disposed over the first metal layer; a third metal layer disposed over the second metal layer; a second level including a plurality of second transistors, disposed over the third metal layer; a third level including a plurality of third transistors, disposed over the second level; a via disposed through the second and third levels; a fourth metal layer disposed over the third level; a fifth metal layer disposed over the fourth metal layer; and a fourth level including a second single crystal silicon layer and is disposed over the fifth metal layer, where each of the plurality of second transistors includes a metal gate, and the via has a diameter of less than 650 nm.
Public/Granted literature
- US12199093B2 3D semiconductor devices and structures with metal layers Public/Granted day:2025-01-14
Information query
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