Invention Grant
- Patent Title: Method of forming semiconductor structure
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Application No.: US17357986Application Date: 2021-06-25
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Publication No.: US11502075B2Publication Date: 2022-11-15
- Inventor: Ching-Chia Huang , Tseng-Fu Lu
- Applicant: NANYA TECHNOLOGY CORPORATION
- Applicant Address: TW New Taipei
- Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee Address: TW New Taipei
- Agency: CKC & Partners Co., LLC
- Main IPC: H01L27/088
- IPC: H01L27/088 ; H01L21/8234 ; H01L27/108 ; H01L29/10 ; H01L29/36 ; H01L29/423 ; H01L29/66 ; H01L29/78

Abstract:
A semiconductor structure includes a first semiconductor substrate, a second semiconductor substrate, a depletion layer, an isolation structure, a first gate structure, and a second gate structure. The first and second semiconductor substrates respectively have a first active region and a second active region overlapping the first active region. The depletion layer is disposed between the first active region and the second active region. The isolation structure surrounds the first and second active regions. The first gate structure is disposed in the second active region. The second gate structure is disposed in the second active region. The second active region has a portion between the first gate structure and the second gate structure.
Public/Granted literature
- US20210320104A1 METHOD OF FORMING SEMICONDUCTOR STRUCTURE Public/Granted day:2021-10-14
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