Invention Grant
- Patent Title: Method of manufacturing semiconductor device
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Application No.: US16263643Application Date: 2019-01-31
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Publication No.: US10403749B2Publication Date: 2019-09-03
- Inventor: Akimasa Kinoshita , Shinsuke Harada , Yasunori Tanaka
- Applicant: FUJI ELECTRIC CO., LTD.
- Applicant Address: JP Kawasaki-Shi, Kanagawa
- Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee Address: JP Kawasaki-Shi, Kanagawa
- Agency: Rabin & Berdo, P.C.
- Priority: JP2015-204672 20151016
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/423 ; H01L29/417 ; H01L29/36 ; H01L29/10 ; H01L29/08 ; H01L29/06 ; H01L21/04 ; H01L29/66 ; H01L29/12 ; H01L21/02 ; H01L29/16 ; H01L29/45 ; H01L21/027 ; H01L29/167

Abstract:
In a first main surface side of a silicon carbide semiconductor base, a trench is formed. A second base region of a second conductivity type is arranged at a position facing the trench in a depth direction. An end (toward a drain electrode) of the second base region of the second conductivity type, and an end (toward the drain electrode) of a first base region of the second conductivity type reach a position deeper than an end (toward the drain electrode) of a region of a first conductivity type. Thus, the electric field at a gate insulating film at the trench bottom is mitigated, suppressing the breakdown voltage of the active region and enabling breakdown voltage design of the edge termination region to be facilitated. Further, such a semiconductor device may be formed by an easy method of manufacturing.
Public/Granted literature
- US20190165166A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2019-05-30
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