US09214873B2
A method for operating an electrical power rectifier. The power rectifier comprises at least two branches that are connected in parallel to each other, each of the branches comprising at least two power semiconductor elements that are connected in series. The collector-emitter voltage Vce(t) and/or the collector current Ic(t) of one of the power semiconductor elements is detected by means of the method. Furthermore, it is determined whether at least one of the following conditions is met: dVce(t)/dt<(dVce/dt)crit, and/or dIc(t)/dt<(dIc/dt)crit, and or Ic(t_ent)
US09214865B2
The present disclosure relates to a flexible direct current (DC)-DC converter, which includes a charge pump buck power supply and a buck power supply. The charge pump buck power supply and the buck power supply are voltage compatible with one another at respective output inductance nodes to provide flexibility. In one embodiment of the DC-DC converter, capacitances at the output inductance nodes are at least partially isolated from one another by using at least an isolating inductive element between the output inductance nodes to increase efficiency. In an alternate embodiment of the DC-DC converter, the output inductance nodes are coupled to one another, such that the charge pump buck power supply and the buck power supply share a first inductive element, thereby eliminating the isolating inductive element, which reduces size and cost but may also reduce efficiency.
US09214863B2
A power supply control apparatus includes a first adder configured to generate a difference signal based on a target value and a feedback signal; a compensator having a first transfer function Wc(z) and configured to generate a control signal based on the difference signal; a control target having a second transfer function Wp(z) and configured to output an output signal generated in response to the control signal; a disturbance canceller having a third transfer function {l+Wc(z)·Wp(z)}/{Wc(z)·Wp(z)} and configured to generate a disturbance cancelling signal based on the output signal corresponding to a control amount y; a second adder configured to generate a differential disturbance signal based on an output of the first adder and the disturbance cancelling signal; and a filter circuit which generates the feedback signal based on the differential disturbance signal.
US09214856B2
There is provided a power factor correction device including: a main switching unit including a first main switch and a second main switch performing a switching operation with predetermined phase differences; an auxiliary switching unit including a first auxiliary switch and a second auxiliary switch forming a transmission path for surplus power existing before the first main switch and the second main switch are turned on, respectively; an inductor unit positioned between a power input unit to which AC power is applied and the main switching unit and accumulating or discharging energy according to a switching operation of the main switching unit; and an auxiliary inductor unit regulating an amount of current flowing in the auxiliary switching unit in the event of a switching operation of the auxiliary switching unit.
US09214844B2
A method for securing a motor housing to a motor assembly is provided. One application of the method creates a motor housing to secure and protect a motor assembly. A flat metal sheet is shaped, so that deformable ends of the sheet are incrementally rolled to form a split annulus approximating the outer circumference of a motor assembly. Once the split annulus is formed, the ends are elastically deformed to facilitate inserting the motor into a hollow portion of the split annulus. After the motor is inserted, the ends may be joined by welding one to the other. This type of housing secures the motor assembly through a crimping force applied by the housing. Alternately, the ends may be welded together and to the motor assembly itself, thereby forming a strong support structure between the housing and the motor assembly.
US09214816B2
An integrated power distribution system utilizes a subsea power distribution hub that receives high voltage electricity through an umbilical from a host surface facility. The subsea power distribution hub steps down the high voltage electricity and distributes the appropriate electrical power supply to multiple components of a subsea production system (e.g., in-well pumps, subsea booster pumps, subsea processing units, subsea valves, and subsea sensors) via jumpers. The integrated subsea power distribution system can be utilize to supply electrical power to all of the required process components of the subsea production system from the in-well completion to the surface host facility.
US09214811B2
Variable frequency alternate current (VFAC) bus arrangements and systems using such VFAC bus arrangements are described, such as arrays of turbines. Such systems have a centrally located power process hub connected to the VFAC bus arrangements in a way that there is a dedicated VFAC bus arrangement for each turbine of the array.
US09214806B1
An ESD protecting circuit, which comprises: a first voltage pad; a second voltage pad; an I/O pad; a first ESD protecting module, comprising a first terminal coupled to the first voltage pad; a MOS transistor, comprising a first terminal coupled to a second terminal of the first ESD protecting module, comprising a second terminal coupled to the I/O pad, and comprising a control terminal for receiving a control signal; a second ESD protecting module, comprising a first terminal coupled to the first terminal of the MOS transistor, and comprising a second terminal coupled to the second voltage pad; and an ESD detecting circuit, for generating the control signal to control the MOS transistor to be conductive when an ESD voltage is detected and to control the MOS transistor to be nonconductive when the ESD voltage is not detected.
US09214802B2
An excitation circuit includes an operational amplifier, a transistor circuit, a switch, and a pull-down resistor. The operational amplifier receives an excitation input voltage at a non-inverting input and provides an operational amplifier output. The transistor circuit receives the operational amplifier output and provides a transistor circuit output. The transistor circuit output is connected to an inverting input of the operational amplifier. The switch is connected between the operational amplifier output and the transistor circuit. The switch is opened to disconnect the operational amplifier output from the transistor circuit. The pull-down resistor is connected between an output of the switch and ground, wherein the pull-down resistor turns off the transistor circuit when the switch is opened.
US09214789B2
A semiconductor light emitting element includes a substrate including GaN, a first cladding layer provided over the substrate, a quantum well active layer provided over the first cladding layer, a second cladding layer provided over the quantum well active layer, and a first refractive index correction layer provided between the substrate and the first cladding layer. The first refractive index correction layer includes a layer of In1-x-yAlyGaxN (where x+y<1), and x and y satisfy the relations x/1.05+y/0.69>1, x/1.13+y/0.49>1, or x/1.54+y/0.24>1, and the relations x/0.91+y/0.75≧1 and x/1.08+y/0.91≦1.
US09214784B2
An end surface 3b of a solid-state laser element 3 is sloped in such a way that, assuming that laser light is incident upon air from the end surface, an angle of incidence which a normal to an inner side of the end surface forms with a traveling direction of the laser light substantially matches the Brewster angle at the incidence plane, an end surface 4a of a wavelength conversion element 4 is sloped in such a way that, assuming that the laser light is incident upon air from the end surface, an angle of incidence which a normal to an inner side of the end surface forms with a traveling direction of the laser light substantially matches the Brewster angle at the incidence plane, and the end surface 3b and the end surface 4b are arranged in such a way as to be opposite to each other.
US09214775B2
A joint connector includes a bus bar and a housing. The bus bar juxtaposes plural tab pieces to be connected to mating terminals. The housing has a bus bar accommodating part accommodating the bus bar, and includes plural terminal receiving chambers for receiving the mating terminals. The housing is formed with plural continuity check holes at a back end of the housing so as to expose a back end of the bus bar. In a case where the plural bus bars are accommodated in the bus bar receiving parts, at least one of the continuity check holes is positioned between the adjacent bus bars, and the at least one of the continuity check holes is formed in a resin-sealed part filled with an insulating resin material.
US09214771B2
A connector for a cable, in one embodiment, has a body configured to receive a cable. The connector has a plurality of contacts moveably positioned within the body, and the connector has a component configured to slide or axially move.
US09214770B2
Disclosed are a power socket and an adapter having the socket. The power socket includes an insulating base and a plurality of conductive pins, and the insulating base includes a base body, an extension protruded from the base body, a slot formed on an end surface of the base body, a plurality of through hole formed on the extension and interconnected to the slots, and a penetrating hole formed on the extension and at a position corresponding to each respective through hole and penetrating the through hole, and each conductive pin is embedded into the through hole, and an end of each conductive pin is exposed from the slot, and the other end of the conductive pin is formed on an inner side of the penetrating hole, so as to simplify the manufacturing procedure and lower the manufacturing cost.
US09214767B1
An electrical connector having an insulative housing, a middle grounding member and a pair of contact modules. The insulative housing has a mating portion, a body portion and an upper cavity and a lower cavity at upper and lower sides of the body portion. The mating portion has a top wall, a bottom wall, a pair of side walls and a receiving space therebetween. The middle grounding member is retained in the body portion. Each contact module has an insulator received in the upper or lower cavity, contacts and a locking spring in the insulator. The locking spring is at a lateral side of the contacts and has a fixing portion fixed in the insulator, a locking arm forwardly extending to the receiving space and an extension tab backwardly extending from a rear side of the fixing portion. Each contact has a contact arm extending to the receiving space.
US09214763B2
A fly line connector is disclosed. A pin is connected to a main body. A fly line is wrapped around the pin. A first engaging portion is formed on the main body. A first engaging hole is formed in the main body and is opposite to the first engaging portion. When a number of the fly line connectors are combined together, the first engaging portion of one of the fly line connectors is engaged with the first engaging hole of the other one of the fly line connectors.
US09214760B2
The connector terminal includes at opposite ends a pair of press-fit terminals to be inserted into through-holes formed through two printed circuit boards located facing each other, each of the press-fit terminals having a plurality of contact pieces, and further includes at least one buffer portion deformable in accordance with a gap between imaginary longitudinal center lines of the press-fit terminals.
US09214753B2
In the present invention, a metal upper cover that covers an upper face opening of a frame is mounted on this upper face opening, and a bent piece that is inserted into a bent piece insertion hole provided to the frame is provided to a portion of the upper face cover on the side of a sensor insertion hole. Furthermore, ground connection pieces formed by extending the outside of the left and right sides of the frame from the upper face toward the lower face are provided in portions opposite the left and right edges linked to the edge of the top cover on which the sensor insertion opening of the frame is provided.
US09214742B2
In accordance with one embodiment, an adapter for connecting a network device is provided. The adapter includes adapter housing. The adapter housing further includes a base and a wall, such that the wall extends axially from the base. The base of the adapter housing also includes an inner surface and an outer surface. The adapter includes a plurality of socket openings that extend across the base between the inner surface and the outer surface. The plurality of socket openings extend axially, the socket openings continue across the inner surface of the base through the first end of the rim and the second end of the rim. In one embodiment, the adapter includes a bypass circuit. The bypass circuit allows a network device to get power from a line side of a power meter and the consumer to get power from the load side of the power meter.
US09214729B2
An antenna includes a radiating element with a shape substantially conforming to a quadrilateral, a grounding and feed-in element, substantially surrounding the radiating element and having an opening formed near to a fourth side of the radiating element, wherein the grounding and feed-in element is electrically connected to a ground at one side of the opening and is electrically connected to a signal feed-in terminal at another side of the opening, a first connection element, having a terminal electrically connected to a first side and the fourth side of the radiating element, and another terminal electrically connected to the grounding and feed-in element, and a second connection element, having a terminal electrically connected to a third side and the fourth side of the radiating element, and another terminal electrically connected to the grounding and feed-in element.
US09214719B2
A handheld device comprises a casing acting as a protective supporting framework of the handheld device. A circuit board mechanically supports and electrically connects with each other electronic components of the handheld device and is configured to be embedded into the casing. At least one wireless communications circuit transmits signals and data from the handheld device and is carried by the circuit board. A flex-antenna assembly is electrically coupled to the wireless communications circuit for sending and receiving the signals and data, defines flexible dielectric and conductive layers of the flex-antenna assembly disposed adjacent to each other, and is embedded into the circuit board.
US09214717B2
Handheld electronic devices and methods involving improved antenna performance are provided. A representative device includes: a housing; a first antenna mounted at a first position of the housing; a second antenna mounted at a second position of the housing; a hand position monitoring system operative to determine a position of a hand of a user grasping the housing of the device; and an antenna selection system operative to selectively and alternately activate the first antenna and the second antenna such that, responsive to the hand position monitoring system determining that the hand is in a vicinity of the first antenna, the antenna selection system activates the second antenna, and responsive to the hand position monitoring system determining that the hand is in a vicinity of the second antenna, the antenna selection system activates the first antenna.
US09214703B2
The present invention provides a secondary cell, wherein an area having generated therein a phenomenon due to an internal short-circuit can be freely changed, a change in the secondary cell due to the generation of the internal short-circuit is correctly grasped, and safety of the secondary cell can be accurately evaluated when the internal short-circuit is generated. An internal short-circuit test method for the secondary cell is also provided. In the present invention, the secondary cell is configured by disposing: an electrode group, which is formed by winding or laminating a positive electrode plate, a negative electrode plate, and an insulating layer disposed between the positive electrode plate and the negative electrode plate; and a heat generating body, which is disposed between the positive electrode plate and the insulating layer or between the negative electrode plate and the insulating layer.
US09214700B2
Disclosed is lithium iron phosphate having an olivine crystal structure, wherein the lithium iron phosphate has a composition represented by the following Formula 1, a sulfur compound with a sulfide bond is contained, as an impurity, in the lithium iron phosphate particles, and carbon (C) is coated on particle surfaces of the lithium iron phosphate: Li1+aFe1-xMx(PO4-b)Xb (1) (wherein M, X, a, x, and b are the same as defined in the specification).
US09214695B2
RFBs having solid hybrid electrodes can address at least the problems of active material consumption, electrode passivation, and metal electrode dendrite growth that can be characteristic of traditional batteries, especially those operating at high current densities. The RFBs each have a first half cell containing a first redox couple dissolved in a solution or contained in a suspension. The solution or suspension can flow from a reservoir to the first half cell. A second half cell contains the solid hybrid electrode, which has a first electrode connected to a second electrode, thereby resulting in an equipotential between the first and second electrodes. The first and second half cells are separated by a separator or membrane.
US09214682B2
A fuel cell is formed by sandwiching a membrane electrode assembly between a first separator and a second separator. A fuel gas flow field is formed in the second separator. An inlet buffer is connected to the inlet of the fuel gas flow field, and an outlet buffer is connected to an outlet of the fuel gas flow field. The inlet buffer is deeper than the outlet buffer. Therefore, the pressure loss in the inlet buffer is smaller than the pressure loss in the outlet buffer.
US09214681B2
The present invention concerns a power supply (10) comprising a primary cell (11) adapted to provide a primary cell current. The primary cell (11) comprises an anode, a cathode current collector and an electrolyte, whereby a passivation layer is formed on a surface of the anode as a result of a chemical reaction between the anode and the electrolyte. To ensure that the passivation layer remains essentially intact for the lifetime of the primary cell, the power supply (10) further comprises a current limiter (12) that is configured to prevent the magnitude of the primary cell current exceeding a value that would damage the passivation layer.
US09214679B2
A method of making a solid oxide fuel cell (SOFC) includes providing a solid oxide electrolyte and depositing at least one electrode on the electrolyte by PVD, such as sputtering. A method of making an interconnect for a fuel cell stack includes providing an electrically conductive interconnect, and depositing a layer on the interconnect by PVD, such as depositing a LSM barrier layer by sputtering. The SOFC and the interconnect may be located in the same fuel cell stack.
US09214678B2
Electrodes comprising metal support structures and methods for making the same are generally described. In certain embodiments, the electrodes described herein comprise a metal porous support structure, and an electrode active material at least partially contained within the pores of the porous support structure. In some embodiments, the electrical conductivity of the porous support structure material can ensure that electrons are efficiently transferred through and/or out of the electrode (e.g., to a current collector and/or to an external circuit). The pores within the porous support structure can ensure, in certain embodiments, that the electrode active material is accessible to the electrolyte, thereby enhancing performance of the electrochemical cell in which the electrode is used.
US09214672B2
The present invention provides an electrode for a secondary battery, more specifically an electrode for a secondary battery, comprising a current collector; an electrode active material layer formed on at least one surface or the whole outer surface of the current collector; a graphite-based coating layer formed on the top surface of the electrode active material layer and comprising graphite, a conductive material and a first polymer binder; and a porous coating layer formed on the top surface of the graphite-based coating layer and comprising a second polymer binder. Also, the present invention provides a secondary battery and a cable-type secondary battery comprising the electrode.
US09214669B2
A non-aqueous electrolyte secondary battery includes a positive electrode containing active material particles composed of a core section formed of olivine type LiFePO4; an intermediate section that lies on the outer side of the core section and has LiFexPyOz; and a surface section that lies on the outer side of the intermediate section and has LiFeaPbOc; and a negative electrode containing lithium titanate, in which battery the molar concentration ratio of Fe relative to P at the core section is greater than the average of x/y of LiFexPyOz, the average value of a/b of LiFeaPbOc at the surface section of the positive electrode active material particles is smaller than the average of x/y of LiFexPyOz, and the positive electrode active material particles include a region in which x/y of LiFexPyOz at the intermediate section increases continuously or intermittently in the direction from the surface section toward the core section.
US09214668B2
A silicon electrode is described, formed by combining silicon powder, a conductive binder, and SLMP™ powder from FMC Corporation to make a hybrid electrode system, useful in lithium-ion batteries. In one embodiment the binder is a conductive polymer such as described in PCT Published Application WO 2010/135248 A1.
US09214666B2
This disclosure concerns graphite materials having lattice distortion for lithium-ion secondary battery negative electrode obtained by a manufacturing method comprising the steps of: pulverizing and classifying a raw coke composition obtained from a heavy-oil composition undergone coking by delayed coking process, the raw coke composition having a H/C atomic ratio that is a ratio of hydrogen atoms H and carbon atoms C of 0.30 to 0.50 and having a micro-strength of 7 to 17 mass % to obtain powder of the raw coke composition; giving compressive stress and shear stress to the powder of the raw coke composition so that average circularity is 0.91 to 0.97 to obtain round powder; heating the round powder to obtain a carbonized composition; and graphitizing the carbonized composition.
US09214662B2
An electrode manufacturing method includes: a coating process of applying a coating material to a metal foil while the metal foil is fed forward to form a coated foil; and a drying process of drying the coated foil by heating while the coated foil is fed forward to pass through a drying oven of a drying machine placed in line on a feeding path. The drying oven includes at least a first drying chamber which the coated foil first passes through in the drying process and a second drying chamber which the coated foil passes through following the first drying chamber. The first drying chamber has a smaller area in cross section perpendicular to the feed direction along the feeding path than an area of the second drying chamber to provide a smaller volume than a volume of the second drying chamber.
US09214651B1
A secondary battery is disclosed. In one aspect, the battery includes first and second battery cells facing each other and a case comprising first and second cell accommodators respectively at least partially accommodating the first and second battery cells, and a circuit accommodator formed between the first and second cell accommodators and accommodating a protection circuit configured to control charging and discharging operations. The circuit accommodator has top and bottom surfaces opposing each other, and each of the first and second cell accommodators has top and bottom surfaces opposing each other. The top surface of the circuit accommodator has a downward step with respect to the top surfaces of the first and second cell accommodators.
US09214648B2
A light extraction substrate which can realize a superior light extraction efficiency when applied to an organic light-emitting device, and an organic light-emitting device having the same. The light extraction substrate includes a base substrate and a matrix layer. One surface of the matrix layer adjoins to the base substrate, and the other surface of the matrix layer adjoins to an organic light-emitting diode. The light extraction substrate also includes a rod array disposed inside the matrix layer. The rod array includes at least one rod which is arranged in a direction normal to the one surface of the matrix layer. The rod array and a cathode of the organic light-emitting diode form an antenna structure which guides light generated from the organic light-emitting diode to be emitted in the normal direction.
US09214647B2
Disclosed is an organic light emitting diode device including a substrate, an organic light emitting element disposed on the substrate, a polymer resin layer covering the organic light emitting element, and a getter disposed between the organic light emitting element and the polymer resin. The getter may include a moisture absorbing material and a binder having a volatilization degree of about 400 ppm or less when heated at a temperature ranging from about 60° C. to about 120° C. for about 2 hours.
US09214646B2
A display apparatus includes: a display panel including a substrate where a display unit is formed, and an encapsulation unit covering the display unit; a functional film adhered to the display panel; a window cover provided on the functional film; and an adhesive interposed in at least one of regions where the display panel, the functional film, and the window cover are adhered to each other, wherein a distance separator, including at least one opening for providing a path for ultraviolet rays for hardening the adhesive, is provided between the display panel and the window cover.
US09214640B2
A flexible display device and a method of manufacturing the same are provided. The flexible display device comprises a first flexible substrate including a display area including an organic light emitting layer, and a peripheral circuit area, and a second flexible substrate coming in contact with the first flexible substrate and including a pattern for facilitating bending thereof, wherein the second flexible substrate has a certain shape according to the pattern, and the first flexible substrate has a shape corresponding to the certain shape. Various embodiments of the present invention provide a flexible display device capable of realizing a narrow bezel-type or bezel-free display device and simultaneously realizing improved types of design, facilitating bending of a bezel area so as to realize a narrow bezel-type or bezel-free display device, and minimizing damage to an area to be bent.
US09214638B2
A material for an organic electroluminescent (EL) device includes a copper(I) complex represented by the following Formula 1: [CuX(PPh3)2L] [Formula 1] In the above Formula 1, X is an anion, PPh3 is triphenylphosphine, and L is a substituted or unsubstituted heterocyclic ligand having 5 to 18 ring carbon.
US09214634B2
An organic photovoltaic cell, containing a first electrode; a second electrode; and a photoelectric conversion layer between the first electrode and the second electrode, wherein the photoelectric conversion layer contains a polymer having a structural unit represented by formula (I): wherein X represents S, NR2, O, Se or Te; Y represents NR2, O, Te, SO, SO2 or CO; and R1 and R2 represent a hydrogen atom or a substituent.
US09214620B2
A piezoelectric actuator of a multilayer design has a stack of piezoelectric layers and electrode layers arranged in between. The electrode layers are contacted by way of two outer electrodes, which have a multiplicity of wires. The outer electrodes are fastened in fastening regions on first side faces of the stack and are led around the edge of the stack that is closest to the respective fastening region.
US09214615B2
In accordance with certain embodiments, semiconductor dies are at least partially coated with a conductive adhesive prior to singulation and subsequently bonded to a substrate having electrical traces thereon.
US09214614B2
A lighting element is provided, comprising: a substrate; a first conductive element on the substrate; a light-emitting element having first and second contacts on top and bottom surfaces, respectively; a transparent layer adjacent to the top surface; an affixing layer between the substrate and the transparent layer, affixing the transparent layer to the substrate; and a second conductive element beneath the transparent layer and proximate to the top surface, wherein the first and second contacts are electrically connected to the first and second conductive elements, respectively, the light-emitting element emits light in a range of wavelengths between 10 nm and 100,000 nm, the transparent and affixing layer's will not decrease light transmittance below 70%, and the first and second conductive elements are at least partially transparent to visible light, or are 300 μm or smaller in width, or are concealed by a design feature from a viewing direction.
US09214612B1
A lens includes a transparent body and a light diffusion layer. The transparent body includes a bottom face, a light incident face and a light emerging face opposite to the light incident face. The light diffusion layer is formed at the bottom face of the transparent body and surrounding the light incident face. Light emitted toward the light diffusion layer can be diverged toward the light emerging face to emit out of the lens.
US09214608B2
A luminescence diode arrangement includes a first luminescence diode chip, a second luminescence diode chip and a luminescence conversion element, wherein the first luminescence diode chip emits blue light, the second luminescence diode chip contains a semiconductor layer sequence that emits greens light, the luminescence conversion element converts part of the blue light emitted by the first luminescence diode chip into red light, and the luminescence diode arrangement emits mixed light containing blue light of the first luminescence diode chip, green light of the second luminescence diode chip and red light of the luminescence conversion element.
US09214607B1
A Light Emitting Diode (LED) component includes an LED die having first and second opposing faces and a sidewall. A contact is provided that is spaced apart from the LED die. The contact includes an inner face adjacent the first face and an outer face adjacent the second face. The contact may be a portion of a lead frame or a discrete contact slug. A wire bond extends between the first face and the inner face. A reflective layer is provided on the inner face that extends to the sidewall and also extends along the sidewall. The reflective layer may include white paint. Related fabrication methods are also described.
US09214605B2
A nitride semiconductor light emitting device includes a laminate, first and second electrodes, a conductive layer, and a phosphor layer. The laminate includes a first layer including a first electroconductive-type layer, a second layer including a second electroconductive-type layer, a light emitting layer between the first and second layers, and a nitride semiconductor. The laminate has a recessed portion extending from the first layer to the second layer in a central portion or an outer peripheral portion. The first electrode arranged on the first layer reflects light emitted from the light emitting layer. The second electrode is surrounded by the light emitting layer or on the periphery thereof and connected to a bottom surface of the recessed portion. The conductive layer is arranged on a surface of the second layer at a side opposite to the light emitting layer. The phosphor layer overlies the second layer and the conductive layer.
US09214599B2
A light-emitting device includes a substrate, and a plurality of light-emitting elements that are mounted on the substrate and each emit light within a same color region. The plurality of light-emitting elements satisfy at least one of a first condition and a second condition. The first condition is that a maximum deviation in peak wavelength of light emitted from the plurality of light-emitting elements is not less than 1.25 nm. The second condition is that a maximum deviation in threshold voltage of the plurality of light-emitting elements is not less than 0.05 V.
US09214596B2
According to the present invention, a method for manufacturing a compound semiconductor comprises: forming a graphene-derived material layer on either a first selected substrate or a first selected compound semiconductor layer; forming a second compound semiconductor layer of at least one layer on at least said graphene-derived material layer, and changing the graphene-derived material layer so as to separate said second compound semiconductor layer of at least one layer.
US09214588B2
The present invention is directed toward a dual junction photodiode semiconductor devices with improved wavelength sensitivity. The photodiode employs a high quality n-type layer with relatively lower doping concentration and enables high minority carrier lifetime and high quantum efficiency with improved responsivity at multiple wavelengths. In one embodiment, the photodiode comprises a semiconductor substrate of a first conductivity type, a first impurity region of a second conductivity type formed epitaxially in the semiconductor substrate, a second impurity region of the first conductivity type shallowly formed in the epitaxially formed first impurity region, a first PN junction formed between the epitaxially formed first impurity region and the second impurity region, a second PN junction formed between the semiconductor substrate and the epitaxially formed first impurity region, and at least one passivated V-groove etched into the epitaxially formed first impurity region and the semiconductor substrate.
US09214583B2
The present disclosure provides a means to build a solar cell that is transparent to and polarizes visible light, and to transfer the energy thus generated to electrical power wires.
US09214581B2
Systems and methods of implementing barrier infrared detectors on lattice mismatched substrates are provided. The barrier infrared detector systems combine an active detector structure (e.g., contact/barrier/absorber pairs) with a non-lattice matched substrate through a multi-layered transitional structure that forms a virtual substrate that can be strain balanced with the detector structure. The transitional metamorphic layer may include one or both of at least one graded metamorphic buffer layer or interfacial misfit array (IMF). A further interfacial layer may be interposed within the transitional structure, in some embodiments this interfacial layer includes at least one layer of AlSb.
US09214579B2
A manufacturing method of a semiconductor structure includes the following steps. A wafer structure having a silicon substrate and a protection layer is provided. An electrical pad on the protection layer is exposed through the concave region of the silicon substrate. An isolation layer is formed on the sidewall of the silicon substrate surrounding the concave region and a surface of the silicon substrate facing away from the protection layer. A redistribution layer is formed on the isolation layer and the electrical pad. A passivation layer is formed on the redistribution layer. The passivation layer is patterned to form a first opening therein. A first conductive layer is formed on the redistribution layer exposed through the first opening. A conductive structure is arranged in the first opening, such that the conductive structure is in electrical contact with the first conductive layer.
US09214573B2
A bypass diode includes a semiconductor substrate having a first surface and a second surface opposite to each other, a p electrode as a first conductive type electrode and an n electrode as a second conductive type electrode arranged on the first surface, a back surface electrode arranged on the second surface and having a polarity identical to that of the semiconductor substrate, a first oxide layer arranged on the first surface, and a second oxide layer arranged on the second surface.
US09214572B2
A SiC MOSFET device having low specific on resistance is described. The device has N+, P-well and JFET regions extended in one direction (Y-direction) and P+ and source contacts extended in an orthogonal direction (X-direction). The polysilicon gate of the device covers the JFET region and is terminated over the P-well region to minimize electric field at the polysilicon gate edge. In use, current flows vertically from the drain contact at the bottom of the structure into the JFET region and then laterally in the X direction through the accumulation region and through the MOSFET channels into the adjacent N+ region. The current flowing out of the channel then flows along the N+ region in the Y-direction and is collected by the source contacts and the final metal. Methods of making the device are also described.
US09214571B2
A semiconductor device capable of reducing influences of adjacent word lines is provided in the present invention. The semiconductor device includes: a substrate, and a word line disposed in the substrate. The word line includes: a gate electrode, a gate dielectric layer disposed between the gate electrode and the substrate and at least one first charge trapping dielectric layer disposed adjacent to the gate electrode, wherein the first charge trapping dielectric layer comprises HfO2, TiO2, ZrO2, a germanium nanocrystal layer, an organic charge trapping material, HfSiOxNy, or MoSiOqNz.
US09214565B2
Provided is a miniaturized transistor having high electrical characteristics. The transistor includes a source electrode layer in contact with one side surface of the oxide semiconductor layer in the channel-length direction and a drain electrode layer in contact with the other side surface thereof. The transistor further includes a gate electrode layer in a region overlapping with a channel formation region with a gate insulating layer provided therebetween and a conductive layer having a function as part of the gate electrode layer in a region overlapping with the source electrode layer or the drain electrode layer with the gate insulating layer provided therebetween and in contact with a side surface of the gate electrode layer. With such a structure, an Lov region is formed with a scaled-down channel length maintained.
US09214559B2
Graphene transferring members, graphene transferrer, methods of transferring graphene, and methods of fabricating a graphene device, may include a metal thin-film layer pattern and a graphene layer sequentially stacked on an adhesive member. The metal thin-film layer and the graphene layer may have the same shape. After transferring the graphene layer onto a transfer-target substrate during the fabrication of a graphene device, the metal thin-film layer is patterned to form electrodes on respective ends of the graphene layer by removing a portion of the metal thin-film layer.
US09214558B2
A method includes forming a gate structure on a semiconductor material region, wherein the gate structure includes spacer elements abutting a gate electrode layer. The gate electrode layer is etched to provide a recess. A hard mask layer is formed over the gate electrode layer in the recess. Silicide layers are then formed on a source region and a drain region disposed in the semiconductor material region, while the hard mask is disposed over the gate electrode layer. A source contact and a drain contact is then provided, each source and drain contact being conductively coupled to a respective one of the silicide layers.
US09214553B2
One method disclosed includes, among other things, forming an initial fin structure comprised of portions of a substrate, a first epi semiconductor material and a second epi semiconductor material, forming a layer of insulating material so as to over-fill the trenches that define the fin, recessing a layer of insulating material such that a portion, but not all, of the second epi semiconductor portion of the final fin structure is exposed, forming a gate structure around the final fin structure, further recessing the layer of insulating material such that the first epi semiconductor material is exposed, removing the first epi semiconductor material to thereby define an under-fin cavity and substantially filling the under-fin cavity with a stressed material.
US09214545B2
A semiconductor device has a plurality of gate electrodes over a gate insulator layer formed in active trenches located in an active region of a semiconductor substrate. A first gate runner is formed in the semiconductor substrate and electrically connected to the gate electrodes. The first gate runner abuts and surrounds the active region. A second gate runner is connected to the first gate runner to make contact to a gate metal. A dielectric filled trench surrounds the first and second gate runners and the active region and a highly doped channel stop region is formed under the dielectric filled trench.
US09214540B2
One or more techniques or systems for forming an n-type metal oxide semiconductor (NMOS) transistor for electrostatic discharge (ESD) are provided herein. In some embodiments, the NMOS transistor includes a first region, a first n-type plus (NP) region, a first p-type plus (PP) region, a second NP region, a second PP region, a shallow trench isolation (STI) region, and a gate stack. In some embodiments, the first PP region is between the first NP region and the second NP region. In some embodiments, the second NP region is between the first PP region and the second PP region, the gate stack is between the first PP region and the second NP region, the STI region is between the second NP region and the second PP region. Accordingly, the first PP region enables ESD current to discharge based on a low trigger voltage for the NMOS transistor.
US09214524B2
A semiconductor device includes a semiconductor substrate, a gate insulating film formed over the semiconductor substrate, a gate electrode formed on the gate insulating film, a first semiconductor layer which is embedded into a portion on both sides of the gate electrode in the semiconductor substrate, and which includes Si and a 4B group element other than Si, and a second semiconductor layer which is embedded into the portion on both sides of the gate electrode in the semiconductor substrate, so as to be superposed on the first semiconductor layer, and which includes Si and a 4B group element other than Si, wherein the gate electrode is more separated from an end of the first semiconductor layer than from an end of the second semiconductor layer.
US09214515B2
The invention relates to a method for making a semiconducting structure, including: a) forming, on the surface of a semiconductor substrate (2), called the final substrate, a semiconducting layer (4), doped with elements from columns III and V of the Periodic Table so as to form a ground plane, b) forming a dielectric layer (3), c) then assembling, by direct adhesion of the source substrate, on the final substrate (2), the layer (4) forming the ground plane between the final substrate and the source substrate, the dielectric layer being between the source substrate and the ground plane, d) then thinning the source substrate, leaving, on the surface of the semiconductor structure, a film (20) made from a semiconducting material.
US09214508B2
Provided are a thin film transistor (TFT) substrate and a display using the same. A TFT substrate includes: a substrate, a first TFT on the substrate, including: a polycrystalline semiconductor layer, a first gate electrode thereover, a first source electrode, and a first drain electrode, a second TFT on the substrate, including: a second gate electrode, an oxide semiconductor layer on the second gate electrode, a second source electrode, and a second drain electrode, an intermediate insulating layer including a nitride layer, on the first gate electrode, and an oxide layer covering the second gate electrode, on the intermediate insulating layer, on the oxide layer, and overlapping the second gate electrode, wherein the first source, first drain, and second gate electrodes are between the intermediate insulating layer and the oxide layer, and wherein the second source and the second drain electrodes are on the oxide semiconductor layer.
US09214502B2
Embodiments of the invention are directed to IR photodetectors with gain resulting from the positioning of a charge multiplication layer (CML) between the cathode and the IR sensitizing layer of the photodetector, where accumulating charge at the CML reduces the energy difference between the cathode and the CML to promote injection of electrons that result in gain for an electron only device. Other embodiments of the invention are directed to inclusion of the IR photodetectors with gain into an IR-to-visible up-conversion device that can be used in night vision and other applications.
US09214482B2
An array substrate and a display device includes: a base substrate; a TFT, a gate line, a data line and a pixel electrode formed on the base substrate, the TFT includes: a bottom gate, a first gate insulating layer, an active layer, a second gate insulating layer, a top gate, a gate isolation layer and a source electrode and a drain electrode sequentially formed on the base substrate; wherein, the source electrode and the drain electrode are in contact with the active layer through a first via hole and a second via hole passing through the gate isolation layer and the second insulating layer, respectively; the pixel electrode is in contact with the drain electrode.
US09214476B1
A pixel structure includes a first conductive layer, a semiconductor layer, an insulating layer, a second conductive layer, a passivation layer, and a first electrode layer. The first conductive layer includes a scan line and a bottom electrode. The semiconductor layer includes a first semiconductor pattern having a first source region, a first drain region, and a first channel region. The insulating layer is disposed on the semiconductor layer. The second conductive layer is disposed on the insulating layer and includes a top electrode, a first gate, a first source, a first drain, and a data line connected with the first source. The bottom electrode and the top electrode overlap to form a capacitor. The passivation layer covers the first and second conductive layers and the semiconductor layer. The first electrode layer is disposed on the passivation layer and provides electrical connection to different layers.
US09214466B2
A bitcell may include an insulating region, a first doping proximate to the insulating region, and a second doping surrounding the first doping. The second doping can be characterized by a higher gate voltage breakdown than the first doping. Also, the bitcell may include a gate terminal, and the bitcell may be configured for programming by a voltage on the gate terminal that results in a conductive hole selectively burned in the insulating region between the gate terminal and the first doping.
US09214464B2
A method of manufacturing a semiconductor device with NMOS and PMOS transistors is provided. The semiconductor device can lessen a short channel effect, can reduce gate-drain current leakage, and can reduce parasitic capacitance due to gate overlaps, thereby inhibiting a reduction in the operating speed of circuits. An N-type impurity such as arsenic is ion implanted to a relatively low concentration in the surface of a silicon substrate (1) in a low-voltage NMOS region (LNR) thereby to form extension layers (61). Then, a silicon oxide film (OX2) is formed to cover the whole surface of the silicon substrate (1). The silicon oxide film (OX2) on the side surfaces of gate electrodes (51-54) is used as an offset sidewall. Then, boron is ion implanted to a relatively low concentration in the surface of the silicon substrate (1) in a low-voltage PMOS region (LPR) thereby to form P-type impurity layers (621) later to be extension layers (62).
US09214461B2
A GaN transistor with polysilicon layers for creating additional components for an integrated circuit. The GaN device includes an EPI structure and an insulating material disposed over EPI structure. Furthermore, one or more polysilicon layers are disposed in the insulating material with the polysilicon layers having one or more n-type regions and p-type regions. The device further includes metal interconnects disposed on the insulating material and vias disposed in the insulating material layer that connect source and drain metals to the n-type and p-type regions of the polysilicon layer.
US09214444B2
A ribbon, preferably a bonding ribbon for bonding in microelectronics, contains a first layer containing copper, a coating layer containing aluminum superimposed over the first layer, and an intermediate layer. In a cross-sectional view of the ribbon, the area share of the first layer is from 50 to 96% and the aspect ratio between the width and the height of the ribbon in a cross-sectional view is from 0.03 to less than 0.8. The ribbon has a cross-sectional area of 25,000 μm2 to 800,000 μm2. The intermediate layer contains at least one intermetallic phase containing materials of the first and coating layers. The invention further relates to a process for making a wire, to a wire obtained by the process, to an electric device containing the wire, to a propelled device comprising said electric device and to a process of connecting two elements through the wire by wedge-bonding.
US09214442B2
In a power semiconductor module, a copper-containing first soldering partner, a connection layer, and a copper-containing second soldering partner are arranged successively and fixedly connected with one another. The connection layer has a portion of intermetallic copper-tin phases of at least 90% by weight. For producing such a power semiconductor module the soldering partners and the solder arranged there between are pressed against one another with a predefined pressure and the solder is melted. After termination of a predefined period of time the diffused copper and the tin from the liquid solder form a connection layer comprising intermetallic copper-tin phases, the portion of which is at least 90% by weight of the connection layer created from the solder layer.
US09214438B2
The present invention relates to die-die stacking structure and the method for making the same. The die-die stacking structure comprises a top die having a bottom surface, a first insulation layer covering the bottom surface of the top die, a bottom die having a top surface, a second insulation layer covering the top surface of the bottom die, a plurality of connection members between the top die and the bottom die and a protection material between the first insulation layer and the second insulation layer. The plurality of connection members communicates the top die with the bottom die. The protection material bridges the plurality of connection members to form a mesh layout between the first insulation layer and the second insulation layer. The structure and method of present invention at least provide more strength and stress buffer to resist die warpage and absorb thermal cycling stress, and then prevents the bump and dielectric materials in the die-die stacking structure from cracking caused by thermal stress or external mechanical stress.
US09214429B2
Ultra-low-k dielectric materials used as inter-layer dielectrics in high-performance integrated circuits are prone to be structurally unstable. The Young's modulus of such materials is decreased, resulting in porosity, poor film strength, cracking, and voids. An alternative dual damascene interconnect structure incorporates deep air gaps into a high modulus dielectric material to maintain structural stability while reducing capacitance between adjacent nanowires. Incorporation of a deep air gap having k=1.0 compensates for the use of a higher modulus film having a dielectric constant greater than the typical ultra-low-k (ULK) dielectric value of about 2.2. The higher modulus film containing the deep air gap is used as an insulator and a means of reducing fringe capacitance between adjacent metal lines. The dielectric layer between two adjacent metal lines thus forms a ULK/high-modulus dielectric bi-layer.
US09214423B2
In one embodiment, a method of forming a HEMT device may include plating a conductor or a plurality of conductors onto an insulator that overlies a plurality of current carrying electrodes of the HEMT device. The method may also include attaching a connector onto the conductor or attaching a plurality of connectors onto the plurality of conductors.
US09214418B2
A lead frame with a radiator plate on which a semiconductor chip 50 is to be mounted is provided with a radiator plate 30, and a lower surface side lead frame 40 including an upper surface 41 and a lower surface 42. The lower surface side lead frame 40 overlaps and fixes the radiator plate 30 with the lower surface 42 making contact with the radiator plate 30. A through hole 43 piercing the lower surface side lead frame 40 from the upper surface 41 to the lower surface 42 is formed at a position where the lower surface side lead frame 40 overlaps the radiator plate 30, and an opening area of the through hole 43 at the lower surface 42 is larger than an opening area of the through hole 43 at the upper surface 41.
US09214417B2
A combined packaged power semiconductor device includes flipped top source low-side MOSFET electrically connected to top surface of a die paddle, first metal interconnection plate connecting between bottom drain of a high-side MOSFET or top source of a flipped high-side MOSFET to bottom drain of the low-side MOSFET, and second metal interconnection plate stacked on top of the high-side MOSFET chip. The high-side, low-side MOSFET and the IC controller can be packaged three-dimensionally reducing the overall size of semiconductor devices and can maximize the chip's size within a package of the same size and improves the performance of the semiconductor devices. The top source of flipped low-side MOSFET is connected to the top surface of the die paddle and thus is grounded through the exposed bottom surface of die paddle, which simplifies the shape of exposed bottom surface of the die paddle and maximizes the area to facilitate heat dissipation.
US09214408B2
A fluid cooled thermal management technique for a high-density composite focal plane array (CPFA) is disclosed. In one embodiment, a high density CFPA assembly includes a plurality of imaging dies mounted on a front surface of a printed wiring board (PWB) and a base plate. The base plate has a substantially matched coefficient of thermal expansion (CTE) to that of the high density CFPA. Further, the high density CFPA is disposed on a front side of the base plate. Furthermore, the base plate has a plurality of integral serpentine fluid flow channels configured to receive and circulate fluid and further configured such that the heat generated by the CFPA is transferred via conduction into the base plate and to the integral serpentine fluid flow channels and to the circulating fluid to dissipate the generated heat.
US09214404B1
A method and apparatus for mounting microelectronic chips to a thermal heat sink. The chips are arranged in a desired configuration with their active faces all facing a common direction and with their active faces defining a common planar surface for all of said chips. A metallic material is applied to the chip, preferably by electroplating to backsides of the chips, the metallic material being electro-formed thereon and making void-free contact with the backsides of the chips.
US09214388B2
Vertical stacks of a metal portion and a semiconductor portion formed on a first substrate are brought into physical contact with vertical stacks of a metal portion and a semiconductor portion formed on a second substrate. Alternately, vertical stacks of a metal portion and a semiconductor portion formed on a first substrate are brought into physical contact with metal portions formed on a second substrate. The assembly of the first and second substrates is subjected to an anneal at a temperature that induces formation of a metal semiconductor alloy derived from the semiconductor portions and the metal portions. The first substrate and the second substrate are bonded through metal semiconductor alloy portions that adhere to the first and second substrates.
US09214385B2
A method of fabricating a semiconductor device includes forming a passivation layer on a least one capping layer of the semiconductor device, and forming an encapsulant layer on the passivation layer. The method further includes patterning the encapsulant layer to expose a portion of the passivation layer and forming a final via opening in the passivation layer. A conductive material is deposited in the final via opening. The method further includes planarizing the conductive material until reaching a remaining portion of the encapsulant layer such that the conductive material is flush with the encapsulant layer and the passivation layer is preserved.
US09214364B2
A substrate cleaning apparatus includes a supporting unit, provided in a processing chamber having a gas exhaust port, for supporting a substrate; one or more nozzle units, each for ejecting gas clusters to a peripheral portion of the substrate supported by the supporting unit to remove unnecessary substances from the peripheral portion; and a moving mechanism for changing relative positions of the supporting unit and the nozzle unit during ejecting the gas clusters. Each nozzle unit discharges a cleaning gas having a pressure higher than that in the processing chamber so that the cleaning gas is adiabatically expanded to form aggregates of atoms and/or molecules.
US09214361B2
A method of manufacturing a semiconductor device, includes: placing a semiconductor element on an adhesive layer that is placed on a support body having a first through hole; placing a part in an area that includes a portion corresponding to the first through-hole, the portion being on the adhesive layer placed on the support body; forming a substrate on the adhesive layer by forming a resin layer on the adhesive layer, on which the semiconductor element and the part have been placed, the substrate including the semiconductor element, the part, and the resin layer; and detaching the substrate from the adhesive layer by pressing the part through the first through-hole.
US09214355B2
As device feature size shrinks, plasma induced damage is a major concern affecting micro-electronic and nano-electronic device fabrication. Pulsed plasmas are a means of mitigating the damages. However, in conventional standard etch chemistry, the etch rate for pulsed plasmas is reduced significantly resulting in a substantially decreased throughput of tech processes. A new etch chemistry is disclosed in the present invention to increase throughput in pulsed plasma applications driven mainly by the molecular radicals.
US09214347B2
A method and apparatus for alignment are disclosed. An exemplary apparatus includes a substrate having an alignment region; an alignment feature in the alignment region of the substrate; and a dummy feature disposed within the alignment feature. A dimension of the dummy feature is less than a resolution of an alignment mark detector.
US09214343B2
A ZnSnO3/ZnO nanowire, a method of forming a ZnSnO3/ZnO nanowire, a nanogenerator including a ZnSnO3/ZnO nanowire, a method of forming a ZnSnO3 nanowire, and a nanogenerator including a ZnSnO3 nanowire are provided. The ZnSnO3/ZnO nanowire includes a core and a shell that surrounds the core, wherein the core includes ZnSnO3 and the shell includes ZnO.
US09214332B2
A low k dielectric material with enhanced electrical and mechanical properties is provided which, in some applications, can also reduce the capacitance of a semiconductor device. The low k dielectric material includes CNT nanotubes that are randomly dispersed within a low k dielectric material matrix. The low k dielectric material can be used in a variety of electronic devices including, for example, as an insulator layer within a back end of line interconnect structure.
US09214330B2
A light source device comprising a filament showing high electric power-to-visible light conversion efficiency is provided. The light source device of the present invention comprises a translucent gastight container, a filament disposed in the translucent gastight container, and a lead wire for supplying an electric current to the filament. The filament comprises a substrate formed from a metal material and a visible light-absorbing film covering the substrate. The visible light-absorbing film is transparent to lights of infrared region. The reflectance of the substrate for visible lights is thereby made low, and the reflectance of the substrate for infrared lights is thereby made high. Therefore, radiation of infrared lights is suppressed, and visible luminous efficiency can be enhanced.
US09214320B2
A method for processing substrate in a processing chamber, which has at least one plasma generating source and a gas source for providing process gas into the chamber, is provided. The method includes exciting the plasma generating source with an RF signal having RF frequency. The method further includes pulsing the gas source, using at least a first gas pulsing frequency, such that a first process gas is flowed into the chamber during a first portion of a gas pulsing period and a second process gas is flowed into the chamber during a second portion of the gas pulsing period, which is associated with the first gas pulsing frequency. The second process gas has a lower reactant-gas-to-inert-gas ratio relative to a reactant-gas-to-inert-gas ratio of the first process gas. The second process gas is formed by removing at least a portion of a reactant gas flow from the first process gas.
US09214319B2
A plasma reactor and method for improved gas injection for an inductive plasma source for dry strip plasma processing are disclosed. According to embodiments of the present disclosure, gas is fed into a plasma chamber through a gas injection channel located adjacent to the side wall of the plasma chamber, rather than from the center, so that the process gas enters the plasma chamber in a close proximity to the induction coil. In particular embodiments, the process gas that enters the chamber is forced to pass through a reactive volume or active region adjacent the induction coil where efficient heating of electrons occurs, providing increased efficiency of the reactor by improving process gas flow and confinement in the heating area.
US09214315B2
Methods and systems for controlling temperatures in plasma processing chamber via pulsed application of heating power and pulsed application of cooling power. In an embodiment, temperature control is based at least in part on a feedforward control signal derived from a plasma power input into the processing chamber. In further embodiments, fluid levels in each of a hot and cold reservoir coupled to the temperature controlled component are maintained in part by a passive leveling pipe coupling the two reservoirs. In another embodiment, digital heat transfer fluid flow control valves are opened with pulse widths dependent on a heating/cooling duty cycle value and a proportioning cycle having a duration that has been found to provide good temperature control performance.
US09214308B2
The present invention provides a sealing type automotive relay with a safety device in the field of automotive relays, which addresses the problems of inconvenient fuse replacement and poor sealing property of the fuse in the existing relays. The sealing type automotive relay with a safety device comprises a relay main body and a safety device. The relay main body includes a base, a casing and a weak current system and a strong current system located on the base. The casing is fixedly connected with the base. The safety device includes two fuse sockets positioned on the base and a fuse inserted between the said two fuse sockets. The top of the casing is provided with a fuse inserting hole corresponding to the said two fuse sockets. The fuse is inserted into the inserting hole. A sealing cover is provided at the port of the fuse inserting hole. The sealing cover is sealedly connected to the port of the fuse inserting hole and the inner cavity of the sealing cover together with the fuse inserting hole forms a sealed cavity. The said fuse is located within the sealed cavity. The relay of the invention has advantages including good sealing property, convenience in fuse replacement and strong universality.
US09214302B2
A rotary switch module includes a first stationary contact, a second stationary contact, and a movable contact for making an electrical connection between the first stationary contact and the second stationary contact. A rotary actuator is provided for rotating the movable contact, the rotary actuator having on its surface a first indication indicating an open position of the switch, and a second indication indicating a closed position of the switch. A first window indicates the first indication, and a second window separate from the first window indicates the second indication.
US09214290B2
A touch panel having a shielding layer and a manufacturing method thereof is provided. A manufacturing method of the touch panel comprises the steps of forming a plurality of first conductive axes and a plurality of second conductive units on a substrate; covering the first conductive axes and the second conductive units with an insulating layer and exposing at least a partial set of second conductive units; and forming a plurality of bridging structures and a shielding layer on the insulating layer simultaneously, wherein the bridging structures electrically connect to the second conductive units. The proposed method allows the shielding layer to be formed during the formation of the bridging structures, thereby eliminating the step of forming the shielding layer separately through an independent process, which saves costs and time.
US09214288B2
A flexible photo-anode of dye-sensitized solar cell and a manufacturing method thereof are provided. The method includes steps of: coating zinc oxide nanoparticles on a flexible substrate to form a seed layer; immersing the flexible substrate into a first reaction solution; heating the seed layer to form a zinc oxide nanowire array; cooling the flexible substrate to the room temperature, immersing it into the second reaction solution, and stirring the second reaction solution, so that the zinc oxide nanowire array forms a cactus-like structure. Thus, the sintering and embossing processes can be prevented.
US09214285B2
Described is a capacitor assembly that is thermally and mechanically stable under extreme conditions. Thermal stability is provided by enclosing and hermetically sealing the capacitor element within a housing in the presence of a gaseous atmosphere that contains an inert gas, thereby limiting the amount of oxygen and moisture supplied to the solid electrolyte of the capacitor. To provide good mechanical stability, the assembly contains at least one external termination (e.g., anode and/or cathode termination) extending beyond an outer periphery of a surface of the housing. The degree to which the external termination extends beyond the outer periphery relative to the dimension of the housing is selectively controlled to increase the surface area available for soldering to a circuit board.
US09214281B2
Methods are disclosed for creating extremely high permittivity dielectric materials for use in capacitors and energy storage devices. High permittivity materials suspended in an organic non-conductive media matrix with enhanced properties and methods for making the same are disclosed. Organic polymers, shellac, silicone oil, and/or zein formulations are utilized to produce thin film low conductivity dielectric coatings. Transition metal salts as salt or oxide matrices are formed at low temperatures utilizing mild reducing agents.
US09214280B2
Methods are disclosed for creating extremely high permittivity dielectric materials for use in capacitors and energy storage devices. High permittivity materials suspended in an organic non-conductive media matrix with enhanced properties and methods for making the same are disclosed. Organic polymers, shellac, silicone oil, and/or zein formulations are utilized to produce thin film low conductivity dielectric coatings. Transition metal salts as salt or oxide matrices are formed at low temperatures utilizing mild reducing agents.
US09214275B2
According to the present invention, a grain oriented electrical steel sheet in which iron loss has been further reduced can be obtained by carrying out decarburization annealing as continuous annealing including: (1) heating the steel sheet to a temperature in the range of 700° C. to 750° C. at heating rate of 50° C./second or higher at least in a temperature range of 500° C. to 700° C. in an atmosphere having oxidation potential P(H2O)/P(H2) equal to or lower than 0.05; (2) then cooling the steel sheet to a temperature range below 700° C. in an atmosphere having oxidation potential P(H2O)/P(H2) equal to or lower than 0.05; and (3) reheating the steel sheet to a temperature in the range of 800° C. to 900° C. and retaining the steel sheet at the temperature for soaking in an atmosphere having oxidation potential P(H2O)/P(H2) equal to or higher than 0.3.
US09214274B2
A method for transmitting a signal between a wall and a leaf hinged to the wall around an articulation axis includes providing a first signal transmission coil comprising a face side on the wall or on the leaf. A second signal transmission coil comprising a face side is provided on the wall or on the leaf. A carrier voltage is modulated via the signal to be transmitted so as to obtain a modulated carrier voltage. The modulated carrier voltage is applied to the first signal transmission coil so as to generate a secondary voltage modulated by the signal to be transmitted in the second signal transmission coil via an inductive coupling. The first signal transmission coil and the second signal transmission coil are arranged symmetrically with respect to the articulation axis and to face each another on their respective face sides.
US09214263B2
This disclosure provides a magnetic material-containing resin to be used for coating and forming cores. A magnetite-containing resin of the present invention includes a magnetite having a residual magnetic flux density of less than 15 Am2/kg and a coercive force of less than 12 kA/m. A coil is provided that has a structure in which by coating a winding with the magnetite-containing resin, a magnetite-containing resin layer is formed.
US09214255B2
Disclosed are a p-doped conjugated polymer electrolyte and an organic electronic device using the same. The p-doped conjugated polymer electrolyte according to the present invention not only has an outstanding hole-transport capability but can also act as an electron-blocking layer and hence can be used in organic electronic devices, such as organic light-emitting devices or organic solar cells, in order to improve the light-emitting efficiency of the organic light-emitting device or the energy-conversion efficiency of the organic solar cell. Also, because the charge on the p-doped conjugated polymer electrolyte is almost completely neutral, the present invention can solve the problem of anode corrosion and make a positive contribution to increased life-cycle of the device.
US09214251B2
An aluminum alloy conductor, containing: 0.01 to 0.4 mass % of Fe, 0.1 to 0.3 mass % of Mg, 0.04 to 0.3 mass % of Si, 0.1 to 0.5 mass % of Cu, and 0.001 to 0.01 mass % of Ti and V in total, with the balance being Al and inevitable impurities,wherein the conductor contains three kinds of intermetallic compounds A, B, and C, in which the intermetallic compounds A, B, and C have a particle size of 0.1 μm or more but 2 μm or less, 0.03 μm or more but less than 0.1 μm, and 0.001 μm or more but less than 0.03 μm, respectively, and area ratios a, b, and c of the intermetallic compounds A, B, and C, in an arbitrary region in the conductor, satisfy: 0.1%≦a≦2.5%, 0.1%≦b≦3%, and 1%≦c≦10%.
US09214250B2
A heat-treated polymer particle comprising an addition polymer core particle which has had swollen and polymerized therein a blend of an aromatic alcohol with an aldehyde or a blend of an aromatic amine or urea with an aldehyde and which has been subsequently heat treated, e.g. to a temperature of at least 150° C.
US09214243B2
A three-dimensional memory is provided that includes a first memory level and a second memory level monolithically formed above the first memory level. The first memory level includes a first steering element coupled in series with and vertically stacked above or below a first non-volatile state change element. The second memory level includes a second steering element coupled in series with and vertically stacked above or below a second non-volatile state change element. Other aspects are also provided.
US09214241B2
A reliable semiconductor memory device and an erasing method for erasing data in a reliable manner are provided. The erasing method is applied to erase a semiconductor memory device having a memory array, and the memory array has an NAND string. A predetermined voltage is applied to a gate of a select transistor of the NAND string, and the predetermined voltage is applied to a word line of a memory cell of the NAND string. An erasing voltage is applied to a substrate region at a first timing, and the substrate region has the NAND string. The gate of the select transistor is floated at a second timing. Here, there is a fixed time interval between the first timing and the second timing, and the second timing is later than the first timing.
US09214239B2
A semiconductor memory device includes a memory cell array including a plurality of memory cells, a peripheral circuit suitable for generating program and erase voltages and applying the program and erase voltages to the plurality of memory cells when program and erase operations are performed on the plurality of memory cells, and a control logic suitable for controlling the peripheral circuit unit during the program and erase operations and counting a pulse number of the program and erase voltages to store a resultant count number as status data.
US09214238B2
A semiconductor memory device includes first to fourth memory cells that are stacked above a semiconductor substrate, first to fourth word lines that are connected to gates of the first to fourth memory cells, respectively, and a row decoder that applies voltages to the first to fourth word lines. The row decoder applies a first programming voltage to the first word line during a write operation performed on the first memory cell, applies the first programming voltage to the second word line during a write operation performed on the second memory cell, applies a second programming voltage to the third word line during a write operation performed on the third memory cell, and applies the second programming voltage to the fourth word line during a write operation performed on the fourth memory cell. The second programming voltage is higher than the first programming voltage.
US09214230B2
A cell of a resistive random access memory including (i) a resistive element and (ii) a switch. The resistive element includes (i) a first electrode, and (ii) a second electrode. The switch includes (i) a first terminal connected to a first contact, and (i) a second terminal connected to a second contact. The second contact is connected to the second electrode of the resistive element via a third contact. The third contact has a shape including a first surface and a second surface that is opposite to the first surface. The shape of the third contact tapers inward from the first surface towards the second surface.
US09214227B2
Provided is a nonvolatile memory device including a resistive memory cell and semiconductor system using the same that is capable of setting the reference resistance value using resistance values of a plurality of memory cells. The nonvolatile memory device comprises one or more column lines, two or more row lines, a plurality of memory cells configured to be connected to the column lines and each of the row lines, and a reference resistance setting unit configured to enable a subset or all of the column lines and row lines and to set a reference resistance value.
US09214225B2
A 3D variable resistance memory device having a junction FET and a driving method thereof are provided. The variable resistance memory device includes a semiconductor substrate and a string selection switch formed on the semiconductor substrate. A channel layer is formed on the column string selection switch. A plurality of gates stacked along a length of the channel layer and each of the gates contacts an outer side of the channel layer. A variable resistance layer is formed on an inner side of the channel layer, and contacts the channel layer.
US09214224B2
A memory element includes a nonvolatile switch to be set to a first low resistance state by applying a voltage higher than a positive threshold voltage and to a second high resistance state by applying another voltage more negative than a negative threshold voltage. The memory element further includes a volatile switch in series with the nonvolatile switch, the nonvolatile switch to be set to a third low resistance state by applying a current higher than a threshold current and to fourth high resistance state by applying a current lower than the threshold current. A method for operating a memory array with memory elements with series volatile and nonvolatile switches is also provided.
US09214223B2
A resistance memory device and a memory apparatus and data processing apparatus having the same are provided. The resistance memory device includes a pair of electrode layers and a variable resistance layer interposed between the pair of electrode layers. The variable resistance layer includes at least one variable resistance material layer and a piezoelectric material layer coupled to the at least one variable resistance material layer.
US09214221B2
A semiconductor device is provided. The semiconductor device includes a logic circuit, an SRAM circuit coupled to a power line, and a switch coupled between the logic circuit and the power line. Before the switch is changed to an off position, a part of information held in the logic circuit is transferred to the SRAM circuit.
US09214220B1
A semiconductor memory apparatus includes a control signal generation unit configured to generate a control signal according to a mode control signal and a refresh signal; a first sense amplifier driving voltage generation unit configured to generate a first sense amplifier driving voltage according to the control signal, a first sense amplifier enable signal and a switching control signal; a switching control unit configured to generate the switching control signal according to the control signal and a second sense amplifier enable signal; a second sense amplifier driving voltage generation unit configured to generate a second sense amplifier driving voltage according to the second sense amplifier enable signal; and a switching unit configured to electrically couple or decouple output nodes of the first sense amplifier driving voltage generation unit and the second sense amplifier driving voltage generation unit according to the switching control signal.
US09214219B2
Described are dynamic, random-access memories (DRAM) architectures and methods for subdividing memory activation into fractions of a page. Circuitry in support of sub-page activation is placed in the intersections of local wordline drivers and sense-amplifier stripes to allow independent control of adjacent arrays of memory cells without significant area overhead.
US09214217B2
An output signal characteristic of a differential amplifier circuit is improved. When an input data signal becomes ‘Low’, current flowing through a first transistor will decrease and potential at a connection (a node) between a first resistor and a second resistor will increase. This potential is input (negatively fed back) to the gate of a second transistor, and because this gate potential increases, a tail current amount is adjusted in an increasing direction. When the input data signal becomes ‘High’, the current of the first transistor increases and thus the potential at the node decreases. Thus, the gate potential (negative feedback) of the second transistor decreases, and the tail current amount is adjusted in a decreasing direction. Thus, in the rising and falling of an input waveform, the difference in a delay time with respect to the output waveform decreases, respectively.
US09214214B2
One feature pertains to a method of implementing a physically unclonable function (PUF). The method includes exposing an array of magnetoresistive random access memory (MRAM) cells to an orthogonal external magnetic field. The MRAM cells are each configured to represent one of a first logical state and a second logical state, and the orthogonal external magnetic field is oriented in an orthogonal direction to an easy axis of a free layer of the MRAM cells to place the MRAM cells in a neutral logical state that is not the first logical state or the second logical state. The method further includes removing the orthogonal external magnetic field to place each of the MRAM cells of the array randomly in either the first logical state or the second logical state.
US09214206B2
A method of testing a non-volatile memory device and a method of managing the non-volatile memory device are provided. The method of testing the non-volatile memory device includes calculating first and second values based on program loop frequencies corresponding to word lines of a memory area. A characteristic value of the memory area may be calculated based on the first and second values, and may be compared to a reference value to determine whether the memory area is defective.
US09214201B2
An operating access method for a DRAM is provided. A first address is obtained via an address bus and a first command is obtained via a command bus from a controller. A second address is obtained via the address bus and a second command is obtained via the command bus from the controller after the first command is obtained. The first address and the second address are combined to obtain a valid address, wherein the valid address is a row address when each of the first command and the second command is an active command. In addition, the valid address is a column address when the second command is an access command.
US09214195B1
A semiconductor memory apparatus is capable of improving the alignment margin for a bank and sufficiently ensuring a space for forming a global input/output line. The semiconductor memory apparatus includes a stack bank structure having at least two sub-banks continuously stacked without disconnection of data signal lines, and a control block arranged at one side of the stack bank structure to simultaneously control column-related signals of the sub-banks.
US09214193B2
An apparatus includes a display controller, a detecting unit, and a reproduction unit. The display controller is configured to control a display unit to display marks corresponding to a plurality of images. The detecting unit is configured to detect selection information entered by a user. The selection information includes path information and additional information. The reproduction unit is configured to reproduce at least one of the plurality of images based on the additional information.
US09214185B1
A data processing system includes an adaptive notch filter operable to estimate an interference frequency in data samples, a convergence detector operable to determine whether the interference frequency converges on a value, indicating that the data samples contain interference, and an interference removal circuit operable to remove interference detected by the adaptive notch filter from the data samples.
US09214183B2
A system 100 for securely storing digital data includes a data storage 110 and a physical uncloneable function 120 (PUF), including an input (122) for receiving a challenge and an output (124) for producing a response to the challenge. Means 130 determine an identifier associated with the data storage. Means 140 supply a representation of the identifier to the PUF as a challenge and retrieve a corresponding response from the PUF. A cryptographic unit 150 performs a cryptographic operation for securing or verifying a digital content item stored in the data storage, where the cryptographic operation is performed under control of a cryptographic key derived from the received response.
US09214181B2
Provided is a recording film for an optical information recording medium with which it is possible to meet all predetermined characteristics requirements and increase productivity while reducing the number of layers in the optical information recording medium. The present invention relates to a recording film for an optical information recording medium on which recording is performed by laser light irradiation, wherein the recording film for an optical information recording medium includes: Mn; at least one element (group X element) selected from the group consisting of Bi, Ag, Co, Cu, In, Sn, and Zn (group X); and oxygen (O). At least some of the Mn and at least some of the group X element are oxidized.
US09214175B1
A data storage device is disclosed comprising a first disk surface comprising servo data defining servo tracks at a first radial density, a first head, and a voice coil motor (VCM) configured to actuate the first head over the first disk surface using a servo control system. A load operation is executed to load the first head over the first disk surface, and a back electromotive force (BEMF) voltage generated by the VCM during the load operation is evaluated to generate an estimated distance traveled. The servo data on the first disk surface is detected, and an initial servo track during the load operation based on the detected servo data to generate a measured distance traveled. A gain of the servo control system is configured based on the estimated distance traveled and the measured distance traveled.
US09214165B1
A method and system provide a magnetic transducer. The transducer includes a main pole, a side gap, at least one coil and at least one of a leading shield, a trailing shield and side shield(s). A portion of the main pole resides at the ABS. The coil(s) are configured to energize the main pole. The side gap is being between the main pole and the at least one side shield. At least one of the leading shield, the side shield(s) and the trailing shield has a gradient in a saturation magnetization (Bs) such that the saturation magnetization increases in a yoke direction perpendicular to the ABS.
US09214151B2
A signal generator generates an electrical signal that is sent to an amplifier, which increases the power of the signal using power from a power source. The amplified signal is fed to a sender transducer to generate ultrasonic waves that can be focused and sent to a receiver. The receiver transducer converts the ultrasonic waves back into electrical energy and stores it in an energy storage device, such as a battery, or uses the electrical energy to power a device. In this way, a device can be remotely charged or powered without having to be tethered to an electrical outlet.
US09214147B2
A distorter is provided that allows a musician/sound engineer to affect the operation of a distortion circuit using a second musical instrument or a sound modifier, enabling the musician/audio engineer to vary the behavior of the distorter in real time. The invention enables a musician and/or sound engineer to achieve sounds and effects that are impossible to create using conventional distorters. The invention enables a user to provide a primary audio signal representing a musical instrument that is to undergo audio signal distortion; and to provide a secondary audio signal representing a sound modifier or a second musical instrument that is used to modify psycho-acoustic and/or musical effects of the audio signal distortion. An output signal is produced having substantially non-clipped parts for conveying the sound of the musical instrument, and having clipped parts for conveying psycho-acoustic and/or musical effects responsive to the second musical instrument or the sound modifier.
US09214145B2
Provided are an electronic musical instrument, computer storage device, and method for generating tone. A sound source in an electronic musical instrument generates a first tone at a first pitch in response to a first tone generation instruction received by an input device of the electronic musical instrument. A second tone generation instruction is received to generate a second tone at a second pitch while generating the first tone at the sound source. A determination is made of a pitch difference of the first and the second pitches. The sound source is controlled to generate the second tone and to not generate the first tone in response to determining that the pitch difference does not exceed a predetermined number of tones. The sound source is controlled to generate the second tone in response to determining that the pitch difference exceeds the predetermined number of tones.
US09214132B2
An electronic map display device is provided. The device acquires electronic maps and displays the electronic maps, each electronic map being acquired per acquisition unit. The electronic map display device may include a map information display determiner for determining whether the electronic map is currently available per acquisition unit, and a map information display interface for displaying information relating to the electronic map per the acquisition unit depending on whether the electronic map is currently available.
US09214128B2
An information display device includes: an image display unit that displays an image according to an orientation of a display screen; a terminal posture detection unit that detects a posture of the device using an acceleration sensor, an angular velocity sensor, and a geomagnetic sensor; and a display direction determination unit that determines whether or not the posture of the device changes, and determines the orientation of the display screen. In the case where the display screen is substantially horizontal and the posture of the device changes, the orientation of the display screen is determined so that, when the device moves by a predetermined angle or more with respect to the orientation (reference orientation) of the display screen before the determination of the posture change, a side of the device at the predetermined angle or more from the reference orientation corresponds to the top of the display screen.
US09214127B2
Methods and devices employing charge removal circuitry are provided to reduce or eliminate artifacts due to a bias voltage remaining on an electronic display after the display is turned off. In one example, a method may include connecting a pixel electrode of a display to ground through charge removal circuitry while the display is off (e.g., using depletion-mode transistors that are active when gates of the depletion-mode transistors are provided a ground voltage). When a corresponding common electrode is also connected to ground, a voltage difference between the pixel electrode and common electrode may be reduced or eliminated, preventing a bias voltage from causing display artifacts in the pixel.
US09214126B2
A circuit for driving a liquid crystal display device includes a liquid crystal panel including a plurality of gate lines and data lines, a gate driver, a data driver, a memory for storing data necessary for operation of a timing controller and programmable power integrated circuit (PPIC) voltage setting data, the timing controller for reading and outputting the PPIC voltage setting data stored in the memory and reading the data necessary for operation of the timing controller stored in the memory and controlling the data driver and the gate driver, a PPIC for supplying a reference voltage, a gamma voltage and a common voltage to the data driver according to the voltage setting data supplied by the timing controller, and a power supply for receiving power from an external device and supplying power to each unit.
US09214125B2
A display device includes a plurality of signal lines that are so juxtaposed as to be extended along one direction, a plurality of common drive electrodes that are so juxtaposed as to be extended along the signal lines, and a plurality of display elements that are each connected to a respective one of the plurality of signal lines and are each connected also to the common drive electrode that makes a pair with the connected signal line. Scan driving of the plurality of display elements is performed in the direction of the signal lines.
US09214119B2
A display includes: a display section; and a display driving section driving the display section based on a first image data set and a second image data set that alternate with each other. The display driving section drives the display section by performing a first scan with use of a first block as a driving unit in accordance with the first image data set and a second scan with use of a second block as a driving unit in accordance with the second image data set. The first block is composed of a plurality of consecutive pixel lines, and the second block is composed of a plurality of consecutive pixel lines and is different from the first block.
US09214118B2
A display device includes: an image display unit that includes a plurality of main pixels in an image display region, the image display unit including sub-pixels; a light source that irradiates the image display region; a light source control unit that controls luminance of the light source; and a color information correction processing unit that corrects first color information that is obtained based on the luminance of the light source and an input video signal to second color information, when color information of at least one of a red pixel, a green pixel, and a blue pixel included in the first color information exceeds a predetermined threshold, the second information is corrected by degenerating color information of the red pixel, the green pixel, and the blue pixel, and by adding color information of the white pixel included in the first color information based on the degenerated color information.
US09214114B2
A method for adjusting a gamma curve used in a display control system of a display apparatus, and the method comprises steps of: analyzing each sub pixel gray value distribution of each color in a frame; and adjusting at least a gamma reference voltage according to the sub pixel gray value distribution of the color, such that a gray level voltage number corresponding to the sub pixel gray values in at least a predetermine region which has the relative large statistical number or ratio is increased, and a gray level voltage number corresponding to the sub pixel gray values in at least a predetermine region which has the relative low statistical number or ratio is decreased.
US09214105B2
A display panel and a testing method of the display panel are provided. The display panel has a display region and a non-display region and includes a first substrate, a second substrate, and a display medium. The display panel further includes scan lines, data lines, pixel units, at least one testing line, and at least one testing pad. The scan lines and the data lines are located on the first substrate within the display region. The pixel units are located on the first substrate within the display region. Each pixel unit electrically connects one of the scan lines and one of the data lines. The testing line is located on the first substrate within the non-display region, crosses over the scan lines, and is insulated from the scan lines. The testing pad is located on the first substrate within the non-display region and electrically connected to the testing line.
US09214104B1
An interchangeable face plate display system for accommodating multiple graphic displays on the same frame. The interchangeable face plate display system includes a hub member adapted to interconnect elongate frame members of a display structure and including a block having a front side, a back side, a top side, and a bottom side; and an interchangeable support member removably connected to the hub member for supporting graphics upon the display structure.
US09214103B2
A sign system comprises one or more box-like modules having a front section and a corresponding rear section sized to fit together in sliding engagement to define an interior cavity. The sections may be joined together with fasteners which engage the side panels of each section thereby leaving the front and rear surfaces free of discontinuities. The sign modules may be affixed to a generally planar surface or supported on internal or external mounting posts. During installation, the rear section may be mounted first and the front section subsequently attached to the rear section. In this way only approximately one-half of the total weight of the sign need be lifted and manipulated at any one time thereby facilitating installation. The interior cavity defined by the front and rear sections may accommodate lighting means for internally lighting the sign.
US09214102B2
The present invention is to provide a rapidly rechargeable warning device, which includes a power receiving element for receiving external electric power, a charging control module for receiving electric power from the power receiving element, a fast energy storage element (e.g., a supercapacitor or any rapidly rechargeable components) being rapidly charged by the charging control module and then outputting electricity stored therein, an warning element (e.g., a light-emitting diode, a buzzer, or a vibrator) capable of issuing a warning signal (e.g., a light signal, a warning sound, or vibrations) upon receiving the electricity outputted by the fast energy storage element. Thus, since the fast energy storage element can be fully charged within a short time through being connected to a cigarette lighter socket of a car, or a transformer connected to an indoor power source, the warning device can be used immediately and effectively prevent user from using one-time batteries.
US09214082B2
An alarm system for detecting and reporting “smash and crash” intrusions is described. The alarm system includes a plurality of intrusion sensors and a security alarm panel in communication with each of the plurality of intrusion sensors at the site of the alarm system. An alarm gateway is provided remote from the security alarm panel, the alarm gateway monitoring the status of the security alarm panel for indications of tampering. A central station is in communication with the alarm gateway and monitors the status of the alarm system, where the alarm gateway sends an alarm condition to the central station when tampering at the security alarm panel is detected.
US09214071B2
A gaming machine has a wager-input device for receiving a first wager from a player to play a wagering game having a basic game and a bonus game. A display displays a plurality of symbols located thereon during the basic game. The symbols indicate a randomly-selected outcome selected from a plurality of outcomes in response to the wager. The plurality of outcomes includes a bonus-triggering outcome. A set of available game-enhancement parameters is displayed and the player is provided an option of submitting a second wager to purchase at least one of the set of available game-enhancement parameters. The set of available game-enhancement parameters provides an enhancement selected from the group consisting of: additional bonus-triggering outcomes providing a higher probability of triggering the bonus game, and enhanced awards during the bonus game.
US09214069B2
A gaming machine and method are provided which provide a plurality of games on a display device to a player. The outcome of the games are randomly selected and displayed on the display device. For each game: if the outcome is a winning outcome an award is awarded to the player as a function of the outcome, the wager made by the player, and a predetermined paytable and if a triggering condition in the outcome of each game, an other award is responsively awarded to the player if the triggering condition is detected in at least two of the plurality of games.
US09214055B2
Various embodiments disclosed herein are directed to a game platform and video extension system for a gaming device. The system includes an operating system that provides services to render graphics for the gaming device. Further, the operating system includes an OS video engine and a server. The system also includes a game that includes a game library and game application. The game library includes one or more library video engines. The game application includes one or more game modules, in which each game module is associated with a corresponding library video engine in the game library or OS video engine in the operating system. Additionally, the system enables game modules within the gaming application that have new features which are not supported by the video engine of the game operating system to be instead supported by corresponding library video engines within the game library.
US09214053B2
A vending machine proofed against the pinching of a customer's fingers and with a security feature includes a cabinet, a receiving tray, a shielding board, and gear wheels. The cabinet includes a cabinet body and a door rotatably attached to the cabinet body. A number of merchandise shelves are located in the cabinet body. A through opening is defined in the door. The receiving tray is attached to an inside of the receiving tray and aligned with the through opening. The shielding board covers the through opening and is toothed to allow lowering for access by the customer to the bought merchandise when the internal drop of an item of merchandise is sensed and raising after the sensed removal of the item.
US09214036B1
Computer-generated images are generated by evaluating point positions of points on animated objects in animation data. The point positions of the points are used by an animation system to determine how to blend animated sequences or frames of animated sequences in order to create realistic moving animated characters and animated objects. The methods of blending are based on determining distances or deviations between corresponding points and using blending functions with varying blending windows and blending functions that can vary from point to point on the animated objects.
US09214029B2
Method and system is disclosed for image segmentation. The method includes acquiring a digital image, constructing a graph from the digital image, calculating a plurality of cost functions, constructing an electrical network based upon the constructed graph and the plurality of calculated cost functions, simulating the electrical network using fixed-point linearization, and segmenting the image using the simulated electrical network to produce segmented layers. Simulation may be executed in parallel to achieve desirable computational efficiencies.
US09214028B2
The present invention relates to a method for segmenting a three-dimensional image data set, comprising the steps of: a) providing a three-dimensional image data set of a body structure, which is to be segmented, and a generic model of the body structure; b) generating synthetic two-dimensional image data sets on the basis of the three-dimensional image data set of the body structure provided in a); and c) pre-positioning the generic model in relation to the three-dimensional image data set of the body structure provided in a); and e) generating a three-dimensional model of the body structure by fitting the generic model to the synthetic two-dimensional image data sets of the body structure, generated in step b).
US09214023B2
The present invention relates to a determination method that enables the position of a body part subject to vital movement to be determined, wherein the body part is to be irradiated. A region of an analytical image is determined, wherein the region represents a body part subject to vital movement, in particular a tumor in an anatomical body. A change in position from one analytical image to the next is performed that reflects the vital movement, wherein the body parts subject to vital movement are parts of the body that are to be irradiated or are not to be irradiated and that move as a result of vital functions such as respiration and/or heartbeat even when the anatomical body is otherwise kept deliberately at rest.
US09214022B1
Wind energy systems, such as an Airborne Wind Turbine (“AWT”), may be used to facilitate conversion of kinetic energy to electrical energy. An AWT may include an aerial vehicle that flies in a path to convert kinetic wind energy to electrical energy. The aerial vehicle may be tethered to a ground station with a tether that terminates at a tether termination mount system. In one aspect, the tether termination mount system may include a tether termination unit configured in one or more gimbals that allow for the tether termination unit to rotate about one or more axes while tracking the aerial vehicle in flight. In a further aspect, the tether termination mount system may include an imaging device configured for imaging the aerial vehicle during flight in order to enhance tracking accuracy over that which is performed by angular motion of the tether termination unit.
US09214018B1
A method for reworking an inconsistency on a part. A location of the inconsistency is identified for the part in a model of the part. An image is generated for a rework for the part. The image is projected for the rework on the part based on the location identified for the inconsistency. The rework is performed for the inconsistency on the part using the image projected on the part.
US09214006B2
Early depth test stages of a graphics processing pipeline broadcast information about fragments having conditional discard tests associated with them and that pass those early depth tests to other stages in the pipeline. The other stages in the pipeline use the early depth test pass information to determine if the processing of any fragments that they are currently processing can be slowed down. If a fragment that triggered the slowing down of the processing of fragments that are already in the pipeline passes all the conditional discard tests it is to be subjected to, a signal that triggers stopping of the processing of the fragments whose processing it had previously slowed down is sent. If the fragment fails a conditional discard test it is to be subjected to, a signal triggering the reviving of the processing of the fragments whose processing it had previously slowed down is sent.
US09214004B2
A method for measuring performance of virtual desktop services offered by a server including a processor is described. A first encoded watermark is embedded into user interface display generated by a virtual desktop when initiating an operation. The first encoded watermark includes pixels identifying the operation and indicating its initiation. A second encoded watermark is embedded into the user interface upon completion of the operation indicating completion of the operation. An action performance time is then computed and stored in a memory. Multiple performance times may be compiled from multiple operations of multiple virtual desktops to assess the performance of the system as a whole.
US09214001B2
A method and apparatus are provided for presenting information to an agent of an organization. The method includes the steps of the organization detecting a contact with a client of the organization, classifying the contact based upon information delivered along with the contact and delivering the contact to the agent. The method further includes the steps of retrieving a set of reference key words and key words in context based upon the classification of the contact, detecting keywords and keywords in context from a dialog between the agent and client, matching at least some of the detected keywords and key words in context with the reference keywords and keywords in context, identifying information within a database based upon the matching and presenting the identified information to the agent.
US09213985B2
Measures, including methods, apparatus and computer program products, are provided for amending content transmitted from a server to a client. The methods are performed by a system configured to communicate with the server and the client. A method comprises: configuring a domain name service to route requests for pages hosted at the server to the system; receiving a request from the client for a page hosted at the server, the request being received on the basis of the configuring; transmitting the request to the server; receiving a page from the server corresponding to the transmitted request; searching the page for a predetermined item of content; selectively amending the content of the page to form a modified page on the basis of whether the predetermined item of content is found; and transmitting the modified page to the client.
US09213984B2
In accordance with the invention, a system, method, and apparatus for analyzing advertisement-related data are presented, which may include receiving data related to an aspect of an advertisement and modeling the aspect of the advertisement with a mathematical model. The mathematical model may include a control-signal-related component, a control-signal-independent component, and an error component. Each component may be updated based on at least one of a control signal, the received data, and a previous state of at least one of the components. An updated model may be created base on the updated components. The system, method, and apparatus may also include predicting the aspect of the advertisement using the updated model. Exemplary aspects of and data related to the advertisement may include one or more of the following: a number of impressions, “clicks,” or “conversions” and/or the impression-to-conversion, impression-to-click, or click-to-conversion ratios.
US09213978B2
Disclosed herein are systems, methods, and non-transitory computer-readable storage media for performing trend analysis of speech. A system practicing the method receives a speech trend analysis request having candidate feature constraints, an objective function with respect to a speech trend to be analyzed, and a set of speech record constraints. The system selects a subset of speech records from the group of speech records based on the set of speech record constraints to yield selected speech records, identifies features in the selected speech records based on the set of candidate feature constraints to yield identified features, and assigns a weight to each of the identified features based on the objective function. Then the system ranks the identified features by their respective weights to yield ranked identified features, and outputs at least one of the ranked identified features associated with a speech-based trend in response to the speech trend analysis request.
US09213970B1
Aspects of the disclosure relate to providing apparatus and methods for processing co-mingled paper correspondence received at a central location. Apparatus and methods provide an ability to co-mingle paper correspondence and corresponding digital images of the paper correspondence. Apparatus and methods provide an ability to translate transaction information extracted from the co-mingled correspondence to a payment time. Apparatus and methods provide may utilize custom scan templates to improve a reliability and accuracy of information extracted from co-mingled correspondence.
US09213969B2
To provide a technique for making it possible to perform proximity communication using an apparatus not including a special proximity communication device. Transmission data is acquired. Output sound data of a PCM format obtained by encoding the transmission data is output, the output sound data indicating sound in an inaudible frequency band. A DA converter is caused to convert the output sound data, whereby a speaker is caused to output sound corresponding to the output sound data. The output sound data indicates sound having a plurality of sections with sound and soundless sections between the adjacent sections with sound according to the transmission data and that the output sound data indicates a sine curve in which the amplitude of the sections with sound increases from a start time and decreases after reaching a maximum.
US09213961B2
In one aspect, the present disclosure relates to a method, in a computer network, for generating social index scores associated with key terms within web-based social network sites. Generally, the method comprises the steps of receiving an input of the key terms from a user, generating search queries from the key terms, providing the generated search queries to the web-based social network sites, capturing search results received from the web-based social network sites in response to the provided search queries, generating, from the captured search results, the social index scores using a processing algorithm, storing the generated social index scores in at least one database, and, providing at least one representation of the generated social index scores to the user in one or more of numerical, visual, and printed form.
US09213958B2
Briefly, a new network processing system is provided that collects and coordinates key indicators regarding a product's quality as that product moves from supplier to end user. By doing so, the processing system provides robust, authentic, and trustworthy data that (1) reports the time period when any custodian had the product, (2) identifies what timing or environmental condition caused the product to go bad, and (3) verifies which custodian acted to make the product defective. In use, an intelligent label is attached to a product, and the intelligent label has a timer as well as one or more sensors for monitoring environmental conditions. Upon exceeding timing or environmental rules, a visual alarm indicator is activated on the label. Since the label has electronically retrievable data, electronically scanable data, and human readable date, the network process can collected key data regarding the product along the entire distribution chain.
US09213950B2
A computer-implemented method and system for processing data for monitoring, managing and/or displaying a plurality of processes, tasks or workflow events. According to an embodiment, the system includes an interface for inputting data, wherein the data comprises data associated with a business process, a processor configured for processing the data and configured for generating a graphical representation of the processed data, and wherein the graphical representation comprises one or more elements responsive to an input, and the one or more elements are configured to present additional information for the business process in response to the input.
US09213949B1
A method is performed via a computer. The method includes receiving a reservation from a customer. The reservation is based at least in part on an agreement reached between the customer and an entertainer as negotiated between the customer and the entertainer. The reservation reserving access for the customer to a bidirectional audiovisual live streaming session according to the agreement. The session is for an entertainment performance via the entertainer according to the agreement. The method further includes granting access to the customer for the session based at least in part on the reservation. The customer and the entertainer are at different locales during the session. The method additionally includes facilitating chat between the customer and the entertainer via the session during the session. The method also includes facilitating payment according to the agreement.
US09213946B1
Methods, systems and computer program products for evaluating performance of generative models are disclosed. One method includes providing a base model and a candidate model having observed variables and first and second conceptually related variables related to the observed variables, respectively, receiving observations assigned to a subset of the observed variables, and for each observation, evaluating the observation by the base model to produce a base assessment of the observation, evaluating the observation by the candidate model to produce a second assessment of the observation, determining a similarity measure of the assessment of the observation based on the base and second assessments, and selecting a subset of observations having low similarity measures for use in evaluating performance of the candidate model.
US09213943B2
A parameter inference method to solve a problem that precision of a Latent Dirichlet Allocation model is poor is provided. The method includes: calculating a Latent Dirichlet Allocation model according to a preset initial first hyperparameter, a preset initial second hyperparameter, a preset initial number of topics, a preset initial count matrix of documents and topics, and a preset initial count matrix of topics and words to obtain probability distributions; obtaining the number of topics, a first hyperparameter, and a second hyperparameter that maximize log likelihood functions of the probability distributions; and determining whether the number of topics, the first hyperparameter, and the second hyperparameter converge, and if not, putting the number of topics, the first hyperparameter, and the second hyperparameter into the Latent Dirichlet Allocation model until the optimal number of topics, an optimal first hyperparameter, and an optimal second hyperparameter that maximize the log likelihood functions of the probability distributions.
US09213931B1
A method of enhancing a matrix barcode with environment image. The method comprises generating, by a server, an original matrix barcode based on source information, capturing, by a camera, an image of the original matrix barcode in a graphic environment comprising the matrix barcode and at least part of the graphic environment information, and parsing the image to obtain the source information and the at least part of the graphic environment information. The method further comprises generating a key based on the at least part of the graphic environment information, encrypting the source information with the key to obtain encrypted source information, encoding the encrypted source information into a first matrix barcode, and encoding the key into a key matrix barcode.
US09213924B1
An apparatus for printing on a receiver with a plurality of colored dry inks and a dry white ink, the apparatus includes a look-up table having a set of one dimensional look-up tables for each of the colored inks and black inks, which look-up table which receives a value corresponding to a laydown at each pixel location of the receiver; wherein the look-up table determines a laydown of white ink at each pixel location depending on the laydown of the colored inks and black ink; and a logic and control unit which determines an amount of white ink to laydown by computing a value from the determined white laydowns of each look-up table.
US09213923B2
A method of calibrating a printer using a reflective scanner is disclosed. Because the reflective scanner used for calibration may only be able to accurately measure a limited density range that is less than the full density range of the printer, some information from the reflective scanner is disregarded or deemphasized during the calibration process. A calibration page is printed and scanned. Lookup tables (LUTs) that comprise the printer calibration values are updated based on adjustments calculated from the scanner for density regions where the scanner produces relatively accurate measurements, but updated based on the preexisting settings for density regions where the scanner produces relatively inaccurate measurements. In transitions regions between accurate and inaccurate regions, the LUTs are adjusted based on a combination of measurements from the scanner and the preexisting settings.
US09213919B2
In techniques for category histogram image representation, image segments of an input image are generated and bounding boxes are selected that each represent a region of the input image, where each of the bounding boxes include image segments of the input image. A saliency map of the input image can also be generated. A bounding box is applied as a query on an images database to determine database image regions that match the region of the input image represented by the bounding box. The query can be augmented based on saliency detection of the input image region that is represented by the bounding box, and a query result is a ranked list of the database image regions. A category histogram for the region of the input image is then generated based on category labels of each of the database image regions that match the input image region.
US09213911B2
A device and method are provided for recognizing text on a curved surface. In one implementation, the device comprises an image sensor configured to capture from an environment of a user multiple images of text on a curved surface. The device also comprises at least one processor device. The at least one processor device is configured to receive a first image of a first perspective of text on the curved surface, receive a second image of a second perspective of the text on the curved surface, perform optical character recognition on at least parts of each of the first image and the second image, combine results of the optical character recognition on the first image and on the second image, and provide the user with a recognized representation of the text, including a recognized representation of the first portion of text.
US09213902B2
A computer receives asynchronous information originating from a light sensor (10) having a pixel matrix disposed opposite a scene. The asynchronous information comprises, for each pixel of the matrix, successive events originating from this pixel and depending on variations in light in the scene. For a place of estimation (p) in the matrix of pixels and an estimation time (t), the computer selects a set (Sp t) of events originating from pixels included in a spatial neighborhood (πρ) of the place of estimation and which have occurred in a time interval (Θ) defined with respect to the estimation time, such that this set has at most one event per pixel of the spatial neighborhood. The computer quantifies the variations in the times of occurrence of the events of the set selected as a function of the positions, in the matrix, of the pixels from which these events originate.
US09213897B2
An image processing device that accesses a storage unit that stores a feature point of a recognition-target object, the device includes an obtaining unit mounted with a user and configured to obtain image data in a direction of a field of view of the user; a recognizing unit configured to recognize the recognition-target object included in the image data by extracting a feature point from the image data and associating the extracted feature point and the feature point of the recognition-target object stored in the storage unit with each other; a calculating unit configured to calculate a location change amount of the feature point corresponding to the recognition-target object recognized by the recognizing unit from a plurality of the image data obtained at different times and calculate a motion vector of the recognition-target object from the location change amount; and a determining unit configured to determine a movement.
US09213895B2
Embodiments provide an iris scanning apparatus for identifying a subject, employing a wide-angle image collector, and a method thereof. A wide angle camera is employed in the iris scanning apparatus to allow a user to easily locate a small eye region of a subject without having to check back and forth between an image display and the subject's face. The apparatus and method are also capable of measuring the distance to the subject's eye and displaying the distance information on the image display, and informing the user as to whether the eye of the subject is within operating range of the iris scanning apparatus. Also, iris scanning is automatically performed without the user's input when an eye is positioned within operating range, and is not performed if an image captured by the iris scanning apparatus does not contain an eye region, in order to prevent erroneous operation.
US09213894B2
An image evaluation device includes a storage unit that stores sample image data that represent a virtual sample image simulating a sample image included in a sample printout that is recognized as a non-defective printout; a reading unit that reads an inspection object image included in an inspection object printout obtained by printing the sample image on a recording medium by a printing device using image data representing the sample image; an extraction unit that extracts a line defect including a linear pattern formed in a specific direction from the inspection object image represented by inspection object image data, based on a difference value between the sample image data and the inspection object image data; and an evaluation unit that evaluates a visibility of the line defect extracted by the extraction unit.
US09213891B2
An information processing device 200 of the present invention includes: a recognition result acquiring means 201 for acquiring respective recognition result information outputted by a plurality of recognition engines 211, 212 and 213 executing different recognition processes on recognition target data; and an integration recognition result outputting means 202 for outputting a new recognition result obtained by integrating the respective recognition result information acquired from the plurality of recognition engines. The recognition result acquiring means 201 is configured to acquire the respective recognition result information in a data format common to the plurality of recognition engines, from the plurality of recognition engines. The integration recognition result outputting means 202 is configured to integrate the respective recognition result information based on the respective recognition result information, and output as the new recognition result.
US09213887B2
The present invention aims to encourage the input of comment on content requiring the viewing user's input and prevent the comment from failing to be input in a case where the content is displayed and the viewing user inputs the comment on the content.Therefore, according to the present invention, when the content is displayed on a display apparatus, the viewing user of the content is photographed to capture photographed image data. A face image included in the displayed content and the face image of the viewing user included in the photographed image data are compared, and, if they are similar, a comment input area is displayed to encourage the viewing user to input a comment.
US09213882B2
A method of extracting data from an identifiable monochromatic pattern. The method comprises separating a polychromatic optical signal, received from an object having identifiable monochromatic pattern, into a plurality of wavelength components, separately capturing each of the wavelength components, reconstructing a plurality of images each from a different wavelength component, detecting the identifiable monochromatic pattern in one or more of the images, and extracting data associated with or encoded by the detected identifiable monochromatic pattern. The images have different depths of field.
US09213879B1
A barcode reader for decoding data from a barcode includes barcode reading hardware, including an image sensor which captures an image of a barcode within a field of view. The barcode reader also includes a processor. The processor executes embedded firmware to operate the barcode reading hardware. The processor also generates decoded data representative of data encoded in the barcode by executing supplemental operating instructions which the barcode reader obtains from a remote configuration server upon power up of the barcode reader. The supplemental operating instructions are distinct from the embedded firmware and include instructions which, when executed by the processor, enable the barcode reader to output the decoded data from the barcode within the field of view.
US09213876B2
In a barcode reader, a sensor controller sets time of one frame of a line image sensor based on output time necessary for data output of one frame from the line image sensor and lighting time of an LED. A light source controller performs first lighting control to turn on the LED only for the lighting time after termination of the data output within the time of one frame, and second lighting control to turn on the LED only for the lighting time so as to include the entire period of the data output within the time of one frame.
US09213873B2
Determining movement of a Radio Frequency Identification (RFID) tag first establishes a phase difference/frequency model comprising a set of phase-wrapped local rates-of-change and an intercept point. RFID tag readings are then made to measure phase differences between the interrogation signal and the tag response at different frequencies. A correlation is determined between the measured phase differences versus frequency and the phase-wrapped local phase rates-of-change of the phase difference/frequency model. If the correlation is better than or equal to a predetermined limit, the tag is stationary, or if the correlation is worse than the predetermined limit, the tag is moving.
US09213869B2
A magnetic stripe reading device including a magnetic head assembly including a mounting element defining a circumferential anti-tampering enclosure and at least one information reading sensor having output contacts, a protective layer including at least one protective grid and at least one anti-tampering contact array including at least two electrical contacts, at least one resiliently deformable conductive element arranged to selectably provide a galvanic interconnection between the electrical contacts, a closure element fixed to the assembly in a secure orientation to displace the deformable conductive element into galvanic interconnection contact with the electrical contacts, whereby tampering with the closure element causes the deformable conductive element to break the galvanic interconnection contact and a flat cable coupled to the output contacts, to the protective layer and to the electrical contacts and carrying electrical signals useful for providing a tampering alarm indication when the electrical contacts are not in galvanic contact.
US09213867B2
A cloud computing service to securely process queries on a database. A security device and method of operation are also disclosed. The security device may be provisioned with a private key of a subscriber to the cloud service and may have processing hardware that uses that key, sequestering the key and encryption processing in hardware that others, including operating personnel of the cloud service, cannot readily access. Processing within the security device may decrypt queries received from the subscriber and may encrypt responses for communication over a public network. The device may perform functions on clear text, thereby limiting the amount of clear text data processed on the cloud platform, while limiting bandwidth consumed in communicating with the subscriber. Such processing may include formatting data, including arguments in a query, in a security protocol used by the cloud platform.
US09213864B2
A data processing apparatus includes an auxiliary storage device having target verification data stored therein, a program memory having a validity verification program stored therein, a first RAM (Random Access Memory), a second RAM, and an execution unit configured to execute a validity verification process in accordance with the validity verification program stored in the program memory. The execution unit is configured to copy the target verification data from the auxiliary storage device into the first RAM, execute the validity verification process on the copied target verification data in the first RAM, and use the second RAM as a work area in a case of executing the validity verification process.
US09213863B2
Methods, apparatuses and storage medium associated with providing enhanced privacy during usage of computer vision are disclosed. In embodiments, an apparatus may include one or more privacy indicators to indicate one or more privacy conditions of the apparatus in association with provision of computer vision on the apparatus. The apparatus may further include a privacy engine coupled with the one or more privacy indicators, and configured to pre-process images from an image source of the apparatus associated with the provision of computer vision to the apparatus, to increase privacy for a user of the apparatus, and to control the one or more privacy indicators. In embodiments, the apparatus may include means for blanking out one or more pixels with depth values identified as greater than a threshold. Other embodiments may be described and claimed.
US09213860B2
A database for online personal information management comprising: a first account; a first database user id; a second database user id, the second database user id being associated with the first account; a set of data nodes, the nodes being interlinked to form a graph; a data object having an associated node, the associated node being one node in the set of data nodes; an associated account; an object owner; at least one share right object associated with a node, the share right object having a parameter indicating whether the share right object is active when the owner is alive or when the object owner is deceased.
US09213852B2
In a method for limiting access to a digital item, a count for the digital item is stored, wherein the count is a number of accesses permitted for the digital item. A password for accessing the digital item is received. A plurality of password hashes is generated by utilizing one-way hash functions based on the number of accesses of the count and the password to generate the plurality of password hashes based on the count. The plurality of password hashes is stored in a password hash file.
US09213851B2
In a method for limiting access to a digital item, a count for the digital item is stored, wherein the count is a number of accesses permitted for the digital item. A password for accessing the digital item is received. A one-way hash function is performed on the password based on the number of accesses of the count to generate a password hash based on the count. The password hash is stored as the stored password hash.
US09213837B2
In one embodiment, a method includes identifying, using one or more processors, a plurality of characteristics of a Portable Document Format (PDF) file. The method also includes determining, using the one or more processors, for each of the plurality of characteristics, a score corresponding to the characteristic. In addition, the method includes comparing, using the one or more processors, the determined scores to a first threshold. Based at least on the comparison of the determined scores to the first threshold, the method includes determining, using the one or more processors, that the PDF file is potential malware.
US09213836B2
In the prior art of computer security by default programs are allowed to do whatever they like to other programs or to their data files or to critical files of the operating system, which is as absurd as letting a guest in a hotel bother other guests as he pleases, steal their property or copy it or destroy it, or have free access to the hotel's management resources. The present concept is based on automatic segregation between programs. This is preferably done by creating automatically an unlimited number of Virtual Environments (VEs) with virtual sharing of resources, so that the programs in each VE think that they are alone on the computer, and (unless explicitly allowed by the user) any changes that they think they made in virtually shared resources are in reality only made in their own VE, while the user preferably has an integrated view of the computer.
US09213832B2
Collecting log file data from at least one log file. From the collected log file data, at least one HTTP request can be generated to exercise a web application to perform a security analysis of the web application. The HTTP request can be communicated to the web application. At least one HTTP response to the HTTP request can be received. The HTTP response can be analyzed to perform validation of the web application. Results of the validation can be output.
US09213827B2
Systems and methods may provide for detecting a browser request for web content. Additionally, interaction information associated with a plurality of sources may be determined in response to the browser request, and a risk profile may be generated based on the interaction. The risk profile may include at least a portion of the interaction information as well as recommended control actions to mitigate the identified risk. In one example, the risk profile is presented to a user associated with the browser request as well as to a security control module associated with the platform.
US09213825B1
A login interface provided by a firmware setup utility is configured to display a two-dimensional barcode, such as a quick response (“QR”) code. The barcode is scanned by a mobile device configured to retrieve a timestamp encrypted within the barcode. The mobile device creates a passcode by re-encrypting the timestamp using a firmware setup password and a master key. The passcode is provided to the firmware setup utility, which retrieves the timestamp and compares it to a stored timestamp. If the timestamp values match, access to the firmware setup utility is permitted.
US09213814B2
Embodiments of the invention are directed to a system, method, and a computer program product for a user authentication based on self-selected preferences. The system typically including a memory, a processor, and a module configured to receive a request to execute a user action from a user associated with an application, wherein the user action requires validation of one or more authentication credentials; access a user-selected preference indicating a level of authentication associated with a user-selected preference as desired by the user; determine authentication types from a plurality of authentication types associated with the level of authentication and the user-selected preference; request one or more authentication credentials corresponding to the determined one or more authentication types; receive one or more authentication credentials from the user; validate the one or more authentication credentials and in response to the successful validation of the one or more authentication credentials, execute the user action.
US09213813B2
An authentication device includes an authentication unit configured to determine whether an input password input to a input unit matches a registered password registered in advance in a storage unit, count the number of times it is determined that the input password does not match the registered password, and stops authentication using a password if the number of times a mismatch is determined reaches a specified number, and a management unit configured to create an input error list supporting each of characters, digits, or other elements included in the registered password, on the basis of a history of errors of input to the input unit, and configured to cancel counting in a case where it is determined by the authentication unit that the input password does not match the registered password and a cause of the mismatch lies in an input error included in the input error list.
US09213797B2
A method of designing a semiconductor device is performed by at least one processor. In the method, a first environment temperature for a first substrate is determined based on an operational temperature of a second substrate, the first and second substrates stacked one upon another in the semiconductor device. An operation of at least one first circuit element in the first substrate is simulated based on the first environment temperature.
US09213794B2
A system and method for routing a buffered interconnect in an IC from a source cell to a target cell thereof. In one embodiment, the system includes: (1) a path tracer operable to designate the source cell as a current node and construct a path toward the target node by: (1a) defining a boundary about the current node based on a buffer driving length, (1b) trimming the boundary by any blockage therein to yield a candidate area for placing a buffer, (1c) dividing the boundary into line segments, (1d) selecting a closest, valid one of the line segments to the target cell as the current node and (1e) repeating the defining, trimming, dividing and selecting the closest, valid one until the current node lies within the buffer driving length and (2) a buffer placer associated with the path tracer and operable to select a location along the path to place the buffer.
US09213792B2
A first gate level feature forms gate electrodes of a first transistor of a first transistor type and a first transistor of a second transistor type. A second gate level feature forms a gate electrode of a second transistor of the first transistor type. A third gate level feature forms a gate electrode of a second transistor of the second transistor type. The gate electrodes of the second transistors of the first and second transistor types are positioned on opposite sides of a gate electrode track along which the gate electrodes of the first transistors of the first and second transistor types are positioned. The gate electrodes of the second transistors of the first and second transistor types are electrically connected to each other through an electrical connection that includes respective gate contacts and one or more conductive interconnect structures.
US09213789B2
A method of generating optimized memory instances using a memory compiler is disclosed. Data pertinent to describing a memory to be designed are provided, and front-end models and back-end models are made to supply a library. Design criteria are received via a user interface. Design of the memory is optimized among speed, power and area according to the provided library and the received design criteria, thereby generating memory instances.
US09213788B2
Systems, methods, and apparatus for modeling and analyzing a physical system comprising a plurality of components. In some embodiments, a component type of a component of the plurality of components may be used to access a dataset from a plurality of datasets. The dataset may include a representation of at least one partial differential equation. A model of the component may be constructed based at least in part on the accessed dataset and at least one parameter relating to a physical characteristic of the component, and may be used to compute at least one output value based on at least one input value.
US09213786B2
Manufacturing systems and methods are disclosed. In one example, a computer based system comprises a non-transitory computer readable memory, a processor, and logic instructions stored in the non-transitory computer readable memory. When executed by the processor, the logic instructions configure the processor to perform operations, comprising receiving a first digital map of a first component and a second digital map of a second component, defining a first surface on the first component and a second surface on the second component, wherein at least a portion of the first surface is to adjoin at least a portion of the second surface in a manufactured assembly, updating a first part definition for the first component to include the first surface and, optionally, updating a second part definition for the second component to include the second surface.
US09213779B2
A method, a terminal implementing the method and a software product for loading at least one data element into a wireless terminal including data on the web pages browsed by the user stored in a definition file. The definition file includes at least the address of one web page. The terminal includes a browser functionality that allows the user to browse web pages on his/her terminal. The terminal detects an appropriate data transmission connection that can be established, whereupon the appropriate data transmission connection is established to the web page, from where at least one data element is stored into the memory of the terminal.
US09213778B2
A degree of social network separation of a social network user that generated expressive content of a social media posting is identified relative to a specified social network user for each of a group of social media postings. Social media postings with an equivalent identified degree of social network separation relative to the specified social network user are grouped. Differences between the expressive content of the grouped social media postings at different degrees of social network separation are determined. The determined differences between the expressive content of the grouped social media postings at the different degrees of social network separation are rendered.
US09213773B2
Described herein is an image-based system for retrieving information about a deceased person or animal and an image-based method of retrieving information about a deceased person or animal. The systems disclosed herein are characterized by the absence of a visible identifier indicating the availability of the information, such as a tag, bar code, and the like.
US09213770B1
A sample of product listings is selected from a product catalog. An audit process is performed to identify other product listings in the product catalog that are duplicates of product listings in the sample. The probability that the product listings would be included in a randomly selected sample of product listings is computed for each of the product listings in the sample and the duplicate product listings. A weight is assigned to each of the listings in the sample and the duplicate listings that is inversely proportional to the computed probability for each listing. The weights may then be utilized to compute a de-biased estimated duplication rate of product listings in the product catalog. The de-biased estimated duplication rate may be utilized to reduce an actual rate of duplication of product listings in the product database.
US09213769B2
Methods and systems for generating a content item associated with search results and, based on a subsequent return to the search results, providing the content item in a modified manner.
US09213764B2
Embodiments relate to processing encrypted data, and in particular to identifying an appropriate layer of encryption useful for processing a query. Such identification (also known as the onion selection problem) is achieved utilizing an adjustable onion encryption procedure. Based upon defined requirements of policy configuration, alternative resolution, and conflict resolution, the adjustable onion encryption procedure entails translating a query comprising an expression in a database language (e.g. SQL) into an equivalent query on encrypted data. The onion may be configured in almost arbitrary ways directing the onion selection. An execution function introduces an execution split to allow local (e.g. client-side) query fulfillment that may otherwise not be possible in a secure manner on the server-side. A searchable encryption function may also be employed, and embodiments accommodate aggregation via homomorphic encryption. Embodiments may be implemented as an in-memory column store database system.
US09213754B1
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for personalizing content items. One of the methods includes identifying, by a computer system, a content item to be provided to a client device of a first user. The method includes determining that the content item is capable of including a contextually-related content item associated with a second user, the second user having a relationship of a first user in a social affinity graph. The method includes altering, by the computer system, the content item to include the contextually-related content item. The method includes providing the content item to the client device.
US09213752B2
Provided are a computer program product, system, and method for asynchronous pausing of the formation of consistency groups. A first copy operation is initiated to copy the source data from the first storage to the first data copy in the second storage. A second copy operation is initiated to copy the first data copy in the second storage to a second data copy in response to forming a consistency group of the source data at the first data copy forms consistent as of a point-in-time with respect to the source data. The first copy operation is suspended to allow for further processing of the first data copy in response to completing the second copy operation. The formation of a next consistency group is restarted between the source data and the first data copy in response to receiving a resume command.
US09213751B2
A first-system has a plurality of interconnected computers which receive operational data from remote data sources. The first-system has a software application for processing the operational data received from remote data sources and the operational data characterizes performance of one or more software applications running on the remote data sources. A load capacity “L” for the first-system is determined; wherein L is the number of remote data sources that can be processed before the system becomes overloaded. The first-system is repeatedly monitors remote data sources to determine their number. When the number of remote data sources exceeds a predetermined fraction of L the first-system is replicated and replications are installed. When a client requests data from one of the systems, using a time stamp the data is automatically provided. The first-system is replicated as more processing power is required conditional upon the load capacity of the system.
US09213750B2
Embodiments provide systems and methods having an engine that gives stateless applications attributes of a ‘stateful’ process. To accomplish this end, a ‘snapshot’ of a transaction at a given point is taken and persisted until receiving confirmation that the transaction is completed. The snapshot may be a snapshot of data flowing in a stateless messaging system. The snapshot is maintained until confirmation that all intended recipients to which the transaction relates to have completed the steps they need to for the given transaction. The snapshot may be formed into a message and reflowed to an intended recipient to ensure that the recipient receives the message in the event that the initial delivery is unsuccessful.
US09213748B1
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for identifying related questions for a search query is described. One of the methods includes receiving a search query from a user device; obtaining a plurality of search results for the search query provided by a search engine, wherein each of the search results identifies a respective search result resource; determining one or more respective topic sets for each search result resource, wherein the topic sets for the search result resource are selected from previously submitted search queries that have resulted in users selecting search results identifying the search result resource; selecting related questions from a question database using the topic sets; and transmitting data identifying the related questions to the user device as part of a response to the search query.
US09213744B2
Disclosed here are methods, systems, paradigms and structures for spreading the interest of a user evenly over a predefined set of search results. A search engine retrieves search results from a database and perturbs at least a portion of the search results, that is, randomizes the order of the portion before presenting it to the user. In this way, even when a search is repeated between database update cycles, the user would see different top search results every time the search is executed. The perturbation technique can be applied to a search in a social networking system which searches for users. The perturbation can be done by randomizing the display order of the sear results based on a most recent activity time of the user. The perturbed search results will have different users every time the user performs a search. The perturbed search results are customized per user.
US09213742B2
A method begins by a dispersed storage (DS) processing module receiving a first coded matrix that includes a first plurality of pairs of coded values corresponding to first data segments of a first data stream and a second data stream. The method continues with the DS processing module receiving a second coded matrix that includes a second plurality of pairs of coded values corresponding to first data segments of a third data stream and a fourth data stream. The method continues with the DS processing module generating a new coded matrix to include a plurality of groups of selected coded values. The method continues with the DS processing module outputting the plurality of groups of selected coded values to a requesting entity in a manner to maintain time alignment of the first data segments of the first, second, third, and fourth data streams.
US09213741B2
A computer-implemented method, apparatus and article of manufacture for optimizing a database query. Resource usage of one or more resources of the computer system are monitored. A condition code representative of the monitored resource usage is stored. A cost model is modified using the stored condition code. A query execution plan is generated for the database query using the modified cost model. The query execution plan is then executed in order to retrieve data from a database stored on the computer system, wherein the retrieved data is presented to a user for subsequent use and analysis.
US09213740B2
System and methodology for automatic tuning of database query optimizer is described. In one embodiment, in a database system having an optimizer for selecting a query plan for executing a database query, a method of the present invention is described for automatically tuning query performance to prevent query performance regression that may occur during upgrade of the database system from a prior version to a new version, the method comprises steps of: in response to receiving a given database query for execution, specifying a query plan generated by the prior version's optimizer as a baseline best plan for executing the given database query; generating at least one new query plan using the new version's optimizer; learning performance for each new query plan generated by recording corresponding query execution metrics; if a given new query plan is observed to have better performance than the best plan previously specified, specifying that given new query plan to be the best plan for executing the given database query; if a given new query plan is observed to have worse performance than the best plan previously specified, specifying that given new query plan to be a bad plan to be avoided in the future; and automatically tuning future execution of the given database query by using the query plan that the system learned was the best plan.
US09213726B2
Web services hosted at a data center may employ architectural patterns that tend to obfuscate the source of queries made against databases and other resources in the data center. The queries may be the source of performance, capacity or utilization problems, and may contribute to the cost of hosting the web service. Web service invocations may be associated with identifiers that can be included in modified queries sent to databases and other resources. Summarized cost information may be calculated based on recorded associations between the identifiers and query performance information.
US09213725B2
Systems and methods of generating automated social interactions for users in a social networking environment are disclosed. In one aspect, embodiments of the present disclosure include a method, which may be implemented on a system, of receiving data items associated with users of a social network, identifying sets of data items associated with a user, and comparing a first set of data items to other sets of data items to identify commonalities between the first set of data items and the other sets of data items. The method further comprising automatically selecting a second user associated with a second set of data items and a first electronic social interaction for the first user to pursue with respect to the second user based on the identified commonalities between the first set of data items and the second set of data items.
US09213717B1
A method is used in managing concurrent I/Os in file systems. A first and second I/O requests are received. The first I/O request is directed to a first portion of a file and the second I/O request is directed to a second portion of the file. A first range lock for the first portion is obtained and a second range lock for the second portion is obtained. The first and second I/O requests are performed concurrently. The second I/O request starts performing I/O on the second portion of the file before the first I/O request finish performing I/O on the first portion of the file.
US09213714B1
Some embodiments of the invention provide a method for indicating hierarchy of objects in a graphical user interface (GUI) of a computer system. The method uses a first color to display a first set of objects at a first level of the hierarchy. The method then uses a second color, different from the first color, to display a second set of objects at a second level of the hierarchy. The first and second colors are two different colors in the visible light spectrum in some embodiments, while they are two different shades of the same color in other embodiments.
US09213711B2
Embodiments of the invention relate to performing a scan of a memory region associated with a virtual machine. The scan is performed by a hardware mechanism in response to a call. A data structure that includes information about substrings identified during the scan and a number of replications for each substring is constructed by the hardware mechanism. The data structure is stored by the hardware mechanism at a location determined by the call.
US09213705B1
Systems and methods are provided for generating a presentation associated with primary audio content. In some embodiments, companion content associated with the audio content may be retrieved from one or more data stores. The companion content may include textual content corresponding to the audio content. One or more keywords associated with at least a portion of the companion content may then be determined. Additional content associated with the one or more keywords may be retrieved from one or more data stores, where the additional content may include at least one image. At least one of the one or more images may then be presented for display during playback of the audio content, such that each of the one or more images is presented for display during playback of a corresponding portion of the audio content.
US09213703B1
Systems and methods are provided herein relating to audio matching. Descriptors can be generated based on anchor points and interest points that characterize the local neighborhood surrounding the anchor point. Characterizing the local spectrogram neighborhood surrounding anchor points can be more robust to pitch shift distortions and time stretch distortions. Those anchor points surrounded by a lack of spectral activity or even spectral activity can be filtered from further examination. Using these pitch shift and time stretch resistant audio features within descriptors can provide for more accurate and efficient audio matching.
US09213698B1
A computer-implemented method of processing business data, the method including storing data in SPO (subject-predicate-object) format in multiple databases; using a storage layer to connect to the multiple databases and maintaining a record of which data is stored in which database, the data comprising rules and axioms, the axioms representing user data; the rules and the axioms stored in the SPO format; at least one ontology representing a union of at least some rules and axioms that represent a particular data interpretation; a storage layer that permits working with data stored in different databases simultaneously and permits a user to use data from several storages simultaneously; transforming the user data based on context provided by a business application that works with specific objects and ontologies, the context being defined by a particular ontology; performing operations on the data based on triggers specified by the rules; generating new data in the same context; processing requests from a business layer to transform the data; and presenting the data to the user based on the context.
US09213696B2
The disclosed embodiments relate to systems and methods for securely accessing a phrase table. One or more records in the phrase table are encrypted using a first set of keys. The first set of keys is encrypted using a second key. A decoder module is compiled based on the second key. Thereafter, the one or more encrypted records and/or the decoder module are transmitted to the first computing device at the client side. The first set of encrypted keys is transmitted to a second computing device. The first computing device transmits a request to the second computing device to send an encrypted key. The decoder module decrypts the encrypted key to generate a key. The first computing device uses the key to decrypt one or more encrypted records.
US09213689B2
Text is extracted from and information resource such as documents, emails, relational database tables and other digitized information sources. The extracted text is processed using a decomposition function to create. Nodes are a particular data structure that stores elemental units of information. The nodes can convey meaning because they relate a subject term or phrase to an attribute term or phrase. Removed from the node data structure, the node contents are or can become a text fragment which conveys meaning, i.e., a note. The notes generated from each digital resource are associated with the digital resource from which they are captured. The notes are then stored, organized and presented in several ways which facilitate knowledge acquisition and utilization by a user.
US09213686B2
Certain embodiments provide systems and methods for managing a form completion process. The method includes providing a user form in the selected language to a user interface. The method further includes receiving the user form with associated form answers and determining whether the selected language of the user form matches a service provider language. The method also includes queuing a work item associated with the user form with associated form answers if the selected language of the user form does not match the service provider language, and dequeuing the work item when the user form with associated form answers is provided to a translation specialist. The method includes receiving a translation of the user form with associated form answers and generating a provider form based on one or more of the user form with associated form answers and the translation of the user form with associated form answers.
US09213680B2
A method and structure for an in-place transformation of matrix data. For a matrix A stored in one of a standard full format or a packed format and a transformation T having a compact representation, blocking parameters MB and NB are chosen, based on a cache size. A sub-matrix A1 of A, A1 having size M1=m*MB by N1=n*NB, is worked on, and any of a residual remainder of A is saved in a buffer B. Sub-matrix A1 is worked on by contiguously moving and contiguously transforming A1 in-place into a New Data Structure (NDS), applying the transformation T in units of MB*NB contiguous double words to the NDS format of A1, thereby replacing A1 with the contents of T(A1), and moving and transforming NDS T(A1) to standard data format T(A1) with holes for the remainder of A in buffer B. The contents of buffer B is contiguously copied into the holes of A2, thereby providing in-place transformed matrix T(A).
US09213676B2
Inconsistencies between internal logical names assigned to hardware devices and physical labeling of the hardware device connectors are overcome by reassigning internal logical names in a network appliance hosting the hardware devices. The initial logical names that refer to the hardware devices are read from an operating system, along with hardware addresses for the hardware devices. The relationship between the initial logical names and the hardware device addresses is compared against a desired relationship, as may be provided in a configuration file. Undesired relationships between logical names and hardware devices are reassigned so that the logical names are consistent with the physical labeling for the hardware devices. The reassigned logical names can be committed to system resources to make the reassignment persistent.
US09213665B2
A data processing system having a processor and a target device processes decorated instructions (i.e. an instruction having a decoration value). A device of the data processing system such as the processor sends transactions to the target device over a system interconnect. A decorated storage notify (DSN) transaction includes an indication of an instruction operation, an address associated with the instruction operation, and a decoration value (i.e. a command to the target device to perform a function in addition to a store or a load). The transaction on the system interconnect includes an address phase and no data phase, thereby improving system bandwidth. In one form the target device (e.g. a memory with functionality in addition to storage functionality) performs a read-modify-write operation using information at a storage location of the target device.
US09213662B2
A multi-route connection bridge 24 performs swapping of an address described in a header of network packet to allow a downstream PCI express-network bridge 25 to be connected with a plurality of upstream PCI express-network bridges 21. Also, the multi-route connection bridge 24 configures an I/O resource 3 in advance, maps the configured I/O resource 3 to an address space of each host 1, and swaps header data described in an I/O packet encapsulated to the network packet by using mapping data. Thus, the multi-route connection bridge 24 assigns I/O capability of I/O resource 3 to each host 1 in units of functions to allow the I/O resource 3 to be shared simultaneously by the hosts 1.
US09213652B1
Managing data in a computing system comprising one or more cores includes: providing a cache in each of one or more of the cores that includes multiple storage locations; storing data of a first type of multiple types of data in a selected storage location of a first cache of a first core that is selected according to status information associated with the first cache, and updating the status information; and storing data of a second type of the multiple types of data in a storage location within a subset of fewer than all of the storage locations of the first cache and managing the status information to ensure that subsequent data of the second type received by the first core for storage in the first cache is stored in the storage location within the subset.
US09213651B2
The translation lookaside buffer (TLB) of a processor is kept in synchronization with a guest page table by use of an indicator referred to as a “T” bit. The T bit of the NPT/EPT entries mapping the guest page table are set when a page walk is performed on the NPT/EPT. When modifications are made to pages mapped by NPT/EPT entries with their T bit set, changes to the TLB are made so that the TLB remains in synchronization with the guest page table. Accordingly, record/replay of virtual machines of virtualized computer systems may be performed reliably with no non-determinism introduced by stale TLBs that fall out of synchronization with the guest page table.
US09213648B1
A computer-executable method, system, and computer program product for managing a data storage system, wherein the data storage system includes a cache and a data storage array, the computer-executable method comprising receiving a request to initialize a data storage system and initializing the data storage system by purging the cache.
US09213643B2
Various aspects provide for implementing a cache coherence protocol. A system comprises at least one processing component and a centralized controller. The at least one processing component comprises a cache controller. The cache controller is configured to manage a cache memory associated with a processor. The centralized controller is configured to communicate with the cache controller based on a power state of the processor.
US09213637B1
In one embodiment of the invention, a memory system includes non-volatile-memory-devices (NVMDs) coupled to memory channels to share busses and a memory controller coupled to the memory channels in communication between the plurality of NVMDs. Each NVMD independently executes a read, write, or erase operation at a time. The memory controller includes channel schedulers to schedule control and data transfers associated with the read, write, and erase operations on the memory channels; and high priority and low priority queues coupled to the channel schedulers. The channel schedulers prioritize operations waiting in the high priority queues over operations waiting in the low priority queues. The channel schedulers further prioritize read operations waiting in either the high priority queue or the low priority queue over write and erase operations waiting in each respective queue.
US09213636B2
A data accessing method, and a storage system and a controller using the same are provided. The data accessing method is suitable for a flash memory storage system having a data perturbation module. The data accessing method includes receiving a read command from a host and obtaining a logical block to be read and a page to be read from the read command. The data accessing method also includes determining whether a physical block in a data area corresponding to the logical block to be read is a new block and transmitting a predetermined data to the host when the physical block corresponding to the logical block to be read is a new block. Thereby, the host is prevented from reading garbled code from the flash memory storage system having the data perturbation module.
US09213634B2
A non-overwrite storage system, such as a log-structured file system, that includes a non-volatile storage having multiple storage segments, a volatile storage having an unsafe free segments list (UFSL), and a controller for managing storage resources of the non-volatile storage. The controller can be configured to copy page data from used segment(s) of the non-volatile storage, write the copied page data to free segment(s) of the non-volatile storage, index the UFSL with indications of the used segment(s), and thereafter prevent reuse of the used segment(s) while the indications of the used segment(s) remain indexed in the UFSL. In some implementations, the non-overwrite storage system may be associated with flash storage system, and a flash controller can be configured perform a flush track cache operation to clear the indications of the used segment(s) from the UFSL, to enable reuse of segment(s) that were previously indexed to the UFSL.
US09213632B1
System and methods are provided for storing address-mapping data from a storage device on a processing system. Address-mapping data is stored on a non-volatile memory of a storage device, the address-mapping data indicating mapping from logical addresses to physical addresses of the non-volatile memory of the storage device. The address-mapping data is transmitted from the non-volatile memory to a processing system. In response to a request to access a logical address of the non-volatile memory, part of the address-mapping data is transferred from the processing system to a volatile memory of the storage device, the part of the address-mapping data being associated with a mapping from the logical address to a physical address of the non-volatile memory.
US09213631B2
A data processing method for a re-writable non-volatile memory module is provided. The method includes receiving a write data stream associating to a logical access address of a logical programming unit; selecting a physical programming unit; and determining whether the write data stream associates with a kind of pattern. The method includes, if the write data stream associates with the kind of pattern, setting identification information corresponding to the logical access address as an identification value corresponding to the pattern, and storing the identification information corresponding to the logical access address into a predetermined area, wherein the write data stream is not programmed into the selected physical programming unit. The method further includes mapping the logical programming unit to the physical programming unit. Accordingly, the method can effectively shorten the time for writing data into the re-writable non-volatile memory module.
US09213629B2
A block management method for a rewritable non-volatile memory module having a plurality of physical blocks, and a memory controller and memory storage apparatus using the same are provided. The method includes logically grouping the physical blocks at least into a data area, a free area and a replacement area and configuring a plurality of logical blocks for mapping to the physical blocks of the data area. The method also includes assigning bad physical blocks into the data area and marking the logical blocks mapping to the bad physical blocks as bad logical addresses, thereby forbidding the access of the logical blocks mapping to the bad physical blocks. According, the method can effectively use the rewritable non-volatile memory module having too many bad physical blocks to store data.
US09213628B2
A storage device includes a flash memory-based cache for a hard disk-based storage device and a controller that is configured to limit the rate of cache updates through a variety of mechanisms, including determinations that the data is not likely to be read back from the storage device within a time period that justifies its storage in the cache, compressing data prior to its storage in the cache, precluding storage of sequentially-accessed data in the cache, and/or throttling storage of data to the cache within predetermined write periods and/or according to user instruction.
US09213622B1
A method of receiving a stack trace, where the stack trace refers to executed code that crashed; identifying one or more lines of the executed code that caused the executed code to crash; identifying, from a code repository, contact information of a developer from a plurality of developers that are responsible for the executed code, where the developer is responsible for a code commit that refers to the one or more lines of the executed code; and notifying, through the contact information, the developer that the one or more lines caused the executed code to crash.
US09213621B2
Methods, systems, and computer program products for administering event pools for relevant event analysis are provided. Embodiments include assigning, by an incident analyzer, a plurality of events to an events pool; determining, by the incident analyzer, an event suppression duration; determining, by the incident analyzer in dependence upon event analysis rules, to suppress events having particular attributes indicating the events occurred during the event suppression duration; and suppressing, by the incident analyzer, each event assigned to the events pool having the particular attributes indicating the events occurred during the event suppression duration.
US09213619B2
Algorithm selection for collective operations in a parallel computer that includes a plurality of compute nodes may include: profiling a plurality of algorithms for each of a set of collective operations, including for each collective operation: executing the operation a plurality times with each execution varying one or more of: geometry, message size, data type, and algorithm to effect the collective operation, thereby generating performance metrics for each execution; storing the performance metrics in a performance profile; at load time of a parallel application including a plurality of parallel processes configured in a particular geometry, filtering the performance profile in dependence upon the particular geometry; during run-time of the parallel application, selecting, for at least one collective operation, an algorithm to effect the operation in dependence upon characteristics of the parallel application and the performance profile; and executing the operation using the selected algorithm.
US09213618B2
The present disclosure provides storage management systems and methods. A hierarchical configuration information process includes accessing information regarding hierarchical relationships of components associated with a storage environment. A storage resource consumption detection process includes detecting consumption of storage resources included in the storage environment. A coordinated consumption analysis process is coordinated across multiple levels of an active spindle hierarchy. A reaction process includes performing an automated consumption notification process and an automated reclamation process based upon results of the storage resource consumption detection process.
US09213617B2
In an error response circuit an analysis circuit unit analyzes a command transmitted from a first circuit section to a second circuit section, and detects a status of data transfer between the first circuit section and the second circuit section. A response circuit unit generates an error signal in accordance with the detected status of the data transfer in response to the second circuit section changing from a first power consumption state to a second power consumption state in which power consumption is lower than power consumption in the first power consumption state. A switching circuit unit transmits the error signal to the first circuit section in place of a response signal that is responsive to the command and transmitted from the second circuit section to the first circuit section.
US09213615B2
An information processing apparatus includes an external tool unit configured to provide a man-machine interface to a debugging user; and a microcontroller. The microcontroller includes: a CPU section configured to execute a program as a debugging target in a response to a first clock signal, wherein a clock rate of the first clock signal is changed in response to an instruction from the CPU section; a first transmitting section configured to transmit debugging data to the external tool unit in response to the first clock signal; a second transmitting section configured to transmit the debugging data to the external tool unit in response to a second clock signal which is different from the first clock signal; and a receiving section configured to receive data transmitted from the external tool unit.
US09213612B2
In a system and method for a storage area network (SAN), a first controller receives a write request for a SAN and communicates with a first nested storage array module (NSAM), the first NSAM manages storage of data onto a shelf and presents the shelf as a logical unit, a buffer stores a portion of a write request from the first controller and aggregates data from the write request for the shelf, from a shelf with a second NSAM, the second NSAM provides a portion of data from the buffer to a third NSAM, the third NSAM manages storage of the portion of data from the buffer to a physical storage unit, and a second controller coupled to the first controller handles requests for the SAN in response to a failure of the first controller.
US09213611B2
A storage system including a first boot drive configured to store an operating system, one or more data drives configured to store user data, the one or more data drives distinct from the first boot drive, and a controller configured to detect when a second boot drive is added to the storage system, and automatically configure the first boot drive and the second boot drive in a redundant array of independent disks (“RAID”) configuration when the controller detects that the second boot drive is added to the storage system.
US09213605B2
Disclosed in some examples is a method of media repair in an IMS based network, the method includes communicating with an IMS network using SIP to setup a download session with a BMSC over a MBMS bearer; responsive to determining that one or more received encoding symbols of media downloaded using the established MBMS bearer cannot be decoded: requesting a file repair procedure from the IMS network component using a SIP re-invite request, the SIP re-invite request including an address of an HTTP repair server indicated by the IMS network component during the MBMS bearer setup; responsive to receiving a SIP acknowledgement indicating that the request was successful, requesting an HTTP connection with the HTTP server to re-download the one or more encoding symbols of the media that could not be decoded; and receiving the one or more encoding symbols from the HTTP server.
US09213601B2
Approaches are presented for adaptively re-compacting data when errors are found during a post-write verify in a non-volatile memory system, such as flash NAND memory. In one example, user data along with corresponding parity data is written into a block of non-volatile memory. After writing in the user data, but prior to writing the corresponding parity data, the user data is checked. For any word lines that fail this post-write verify, the parity data for the block is adjusted to remove the contribution of any failed word lines before this modified parity data is written into the block. The data corresponding to the failed word lines can then be written elsewhere in the memory system.
US09213598B2
A nonvolatile memory device includes a nonvolatile memory, a buffer memory configured to store a plurality of read data transmitted from the nonvolatile memory, an error detection and correction circuit configured to detect an error in partial data of each of the plurality of read data and judging whether the partial data is correctable or not on the basis of the detected error, and a controller configured to analyze the uncorrectable partial data with respect to the plurality of read data to determine a representative value, and to transmit the representative value to the error detection and correction circuit. The plurality of read data is read through a read operation with respect to a same page.
US09213587B2
A Java applet program loaded initially from a remote server is configured to receive additional user annotations for data displayed in an already opened applet window located at the user's client system. The user is permitted to preserve/capture, the modified applet window containing any such input or modifications to the applet window data. The updated applet window data cannot be written to the user's client system, instead, the modified window data is converted to a standard compressed graphics file format and then uploaded to the remote server. From there the applet can then open another applet window within a browser program pointing to the location of such file on the remote server. At that point, the user can then perform any desired operation on the file since the browser has access to the local system resources.
US09213586B2
Computer-implemented systems and methods regulate access to a plurality of resources in a pool of resources without requiring individual locks associated with each resource. Access to one of the plurality of resources is requested, where a resource queue for managing threads waiting to access a resource is associated with each of the plurality of resources. A resource queue lock associated with the resource is acquired, where a resource queue lock is associated with multiple resources.
US09213582B2
Embodiments of the present invention provide an approach for differentiated service identification/exposure in a networked computing environment (e.g., a cloud computing environment). In a typical embodiment, input model criteria will be generated. Such criteria may (among other things): identify service categories based on contextual bindings and domain centric functions; identify inter-service dependencies for a given business model (BPM); and/or provide dynamic validation of services to be exposed/identified. Embodiments of the present invention may further analyze service exposure criteria to provide efficient and accurate service exposure decisions as well as validation of the service exposure. This approach allows for consistent service exposure determinations based on decision histories of similarly (2-dimensional) aligned services in the past. This approach further allows for a validation assessment that is based on actual metrics of service usage verses an estimated usage at the time of service implementation.
US09213579B2
A method, system, and computer program product for improving software component placement on software execution platforms are provided in the illustrative embodiments. A computer determines whether a code corresponding to the software component includes business process logic. The computer determines a granularity level of the code. The granularity level of the code is a categorization of the code according to whether a number of external references in the code exceed a threshold value. The computer, responsive to determining the granularity level of the code, recommends placement of a first portion of the code on a first platform in the set of software execution platforms.
US09213574B2
A method, system and a computer program product for determining resources allocation in a distributed computing environment. An embodiment may include identifying resources in a distributed computing environment, computing provisioning parameters, computing configuration parameters and quantifying service parameters in response to a set of service level agreements (SLA). The embodiment may further include iteratively computing a completion time required for completion of the assigned task and a cost. Embodiments may further include computing an optimal resources configuration and computing at least one of an optimal completion time and an optimal cost corresponding to the optimal resources configuration. Embodiments may further include dynamically modifying the optimal resources configuration in response to at least one change in at least one of provisioning parameters, computing parameters and quantifying service parameters.
US09213569B2
According to one aspect, a computer system includes a configuration with a machine enabled to operate in a single thread (ST) mode and a multithreading (MT) mode. In addition, the machine includes physical threads. The machine is configured to perform a method that includes executing a guest entity on the core in MT mode. The guest entity includes all or a portion of a guest VM, and a plurality of logical threads executing on the physical threads. An exit event is detected at the machine. Based on detecting the exit event, the machine waits until all of the logical threads that are currently executing on the physical threads have reached a synchronization point. A state that includes exit reason information is saved for each of the logical threads and the execution of a host is initiated in the ST mode on one of the physical threads.
US09213556B2
Methods, techniques, and systems for user interface remoting using video streaming techniques are provided. Example embodiments provide User Interface Remoting and Optimization System (“UIROS”), which enables the efficient remoting of user interfaces on behalf of their guests using generic video streaming techniques, such as H.264, to send compressed user interface image information in the form of video frame encoded bitstreams. With application cooperation, pixels are explicitly cached on the server using lookahead methods to lower latency in remoting the user interface for certain operations. In one embodiment, the UIROS comprises server side support including a UI remoting server, a video encoder, and rendering support and client side support including a UI remoting client, a video decoder, and a display. These components cooperate to implement optimized UI remoting that is bandwidth efficient, low latency and CPU efficient.
US09213552B2
A reprogramming device is used for reprogramming embedded systems. The reprogramming device comprises a microprocessor, a memory programmed with software to accomplish the reprogramming of distinctly different embedded systems architectures, and one or more hardware devices that facilitate communication over multiple protocols contained in a portable package designed for both one-time and multi-occurrence use scenarios. In some embodiments, the reprogramming device is able to be used to enhance one or more attributes of performance of existing embedded systems through the reconfiguration of internally stored parameters. In some embodiments, the reprogramming device is also to be used to extract and receive information and instruction from existing embedded systems and enable useful presentation of this information. As a result, the reprogramming device is able to be used to adjust and/or monitor the parameters of the on-board diagnostics computer of a vehicle to ensure peak performance and detect errors.
US09213549B2
An apparatus for processing a register window overflow and underflow includes register windows each configured to include local registers and incoming registers, dedicated internal memories configured to store contents of the local registers and the incoming registers for each word, dedicated data buses configured to connect the local registers and the incoming registers and the respective dedicated internal memories, a memory word counter configured to perform counting in order to determine whether or not there is a storage space of a word unit in the dedicated internal memories, and a logic block configured to control an operation of the dedicated data buses when one of a window overflow and a window underflow is generated based on the count value of the memory word counter.
US09213536B2
Embodiments include systems and methods for automated versioning of software on a client machine, allowing installation and updates over multiple platforms with modules written in different computer languages. In an embodiment, the client sends a list of installed modules to the server. This may be done by causing a client processor to perform method calls determining version information of the installed product. The server then checks the list and sends updates (if any) that are then automatically installed on the client. Some embodiments can perform software installation over-the-network, and prerequisite software may also be automatically installed on the client machine. The system may work on multiple platforms (e.g. Windows™, UNIX) and support multiple computer languages (e.g. C++, Java®, Python®, .NET, etc.).
US09213522B2
A vehicle includes at least one processor that receives an in-coming communication for a driver, routes the in-coming communication to a mail system in response to a driver workload exceeding a predefined value, and after a predetermined period of time following routing the in-coming communication to the mail system, generates a notification for the driver indicating that a communication was received in response to the driver workload being less than the predefined value at an expiration of the predetermined period of time.
US09213515B2
Concepts and technologies disclosed herein are for on-demand multi-screen computing. According to one aspect disclosed herein, a method for multi-screen computing includes establishing a multi-screen computing session, establishing communication with a primary computing device and an auxiliary device to be included in the multi-screen computing session, creating a web container for the auxiliary device, and propagating the web container to the auxiliary device for presentation on a display of the auxiliary device.
US09213509B2
To provide an electric equipment which has a function in which parameter is set, and enables a user to appropriately adjust the parameters regardless of an ability level of user. A plurality of reception screens having different degrees of detail for received instructions for adjusting parameters are displayed depending on the ability level of user to adjust the appropriate parameters, such as maintenance ability, or presence or absence of the specialized knowledge for the apparatus, or the like, thus the user adjusts the parameter using the reception screen suitable for the user.
US09213506B2
A fully collaborative software management method allows creating, printing, delivering and hanging-in-stores a sequential arrangement of information tags. Customer and printer computers are operably connected to communicate during a design and assembly stage of developing the tags. Customer decision-makers and printer decision-makers collaborate on template authoring, content and template management, printing-event construction, staging and proofing, including integration of various elements such as stored data, timing, customer-driven controls, and event-driven controls. The method allows printer decision-makers to operate a publishing engine that permits viewing the customized information tags as a display prior to viewing as a printed product. The system includes a file transfer protocol (FTP) server connected to an information processing and printing system comprising designer workstation computers, a staging server, a load balancer, production distiller workstation computers, a database server, an SQL server, multiple print servers, and digital presses.
US09213504B2
A power supply control apparatus directs a switching device to stop power supply from a first power source to a main body when a power supply disable condition is satisfied in a first state where the main body is powered by the first power source. The power supply control apparatus also directs the switching device to supply power from the first power source to the main body when a power supply enable condition is satisfied in a second state where the power supply from the first power source to the main body is stopped. The power supply control apparatus is powered by a second power source different from the first power source when the main body is in the second state.
US09213498B2
According to one embodiment, according to one embodiment, a memory system includes a first memory, a second memory, an interface, a managing unit, and a control unit. The second memory stores data read out from the first memory. The interface receives a read command. The managing unit manages a corresponding relationship of a first address included in the read command and a second address. The second address is an address indicating a position in the first memory where data designated by the first address is stored. The control unit acquires a plurality of second addresses corresponding to a sequential first address range including the first address in a case where the read command is received, and determine an amount of data to be read out from the first memory to the second memory based on whether the plurality of second addresses is sequential or not.
US09213497B2
A migration-destination primary storage apparatus (MD-PDKC) comprises a second PVOL and a second journal storage area storing a journal corresponding to write data for the second PVOL, and executes a data copy to the second PVOL from a first PVOL, which is in a migration-source primary storage apparatus (MS-PDKC) and forms a copy pair with an SVOL in a secondary storage apparatus (SDKC). After the data copy has been completed, the MD-PDKC acquires the latest write sequence information from the MS-PDKC, and upon receiving a write request for the second PVOL, writes the write-request write data to the second PVOL, creates a journal by using journal data corresponding to the write data and also by using update information showing write sequence information based on the acquired latest write sequence information, and writes the journal to the second journal storage area.
US09213491B2
In an embodiment, a memory device may contain device processing logic and a mode register. The mode register may a register that may specify a mode of operation of the memory device. A field in the mode register may hold a value that may indicate whether a command associated with the memory device is disabled. The value may be held in the field until either the memory device is power-cycled or reset. The device processing logic may acquire an instance of the command. The device processing logic may determine whether the command is disabled based on the value held by the mode register. The device processing logic may not execute the instance of the command if the device processing logic determines the command is disabled. If the device processing logic determines the command is not disabled, the device processing logic may execute the instance of the command.
US09213480B2
A method is provided for enhancing a user interface with a mobile device by joining the displays of multiple devices together to function together with one another. In particular, example methods may provide for detecting a first touch or drag event, receiving a message indicating a second touch or drag event from a nearby device occurring during the first touch or drag event, creating a join event, and providing for transmission of the join event to the nearby device. The method may also include updating a registry of nearby devices in response to receiving a message regarding a touch or drag event from a nearby device. The method may further include providing for presentation of content on a display of a device and direction of content to be presented on a display of the nearby device.
US09213470B2
Various areas of a displayed document (e.g., text, image, etc.) may be selected and clipped as a separate document. In some arrangements, a user may wish to change the area of the clipped area without having to retrieve the displayed document again. Accordingly, the area of the clipped region may be modified by retrieving and storing the displayed document when the region is initially clipped. When the selected region is to be modified at a later time, the stored document may be used instead of having to retrieve the document from a source location.
US09213468B2
This document describes techniques for application reporting in an application-selectable user interface. These techniques permit a user to view reports for applications in a user interface through which these applications may be selected. By so doing, a user may quickly and easily determine which applications to select based on their respective reports and then select them or their content through the user interface.
US09213466B2
A computer implemented method displays an object. The method includes causing the display of a context specific shortcut menu in response to a user command. The menu can include a set of functions relating to the context of the displayed object and a set of a predetermined number of the most recently used functions relating to the context of the displayed object. The most recently used functions can be displayed above the other functions.
US09213462B2
A unified communications application is described herein. The unified communications application is displayable in one of two views: a full view and a condensed view. When displayed in the condensed view, which consumes less than fifty percent of a display screen, the unified communications application is employable by a user thereof to participate in real-time conversations/meetings with contacts of the user.
US09213459B2
A two-point touch determining module performs determination of a one-point touch or a two-point touch. A one-point touch coordinate detecting module detects a coordinate of the one-point touch. A two-point touch coordinate detecting module detects two-point coordinates of the two-point touch. A display screen generating module generates a display screen of a resistive film type touch panel. A touch input controlling module determines whether the display screen is a one-point detecting screen or a two-point detecting screen. The touch input controlling module performs the coordinate detection using the one-point touch coordinate detecting module in a case of the one-point detecting screen. The touch input controlling module performs the coordinate detection using the one-point touch coordinate detecting module or the two-point touch coordinate detecting module according to a determination result of the two-point touch determining module in a case of the two-point detecting screen.
US09213455B2
In one embodiment, at least one resonant circuit in a stylus receives a first signal from a touch sensor of a device. The first signal is received at the resonant circuit by capacitive coupling between the resonant circuit and a conductive element of the device's touch sensor. A second signal based on the first signal and at least one of the at least one resonant circuit is then transmitted from the stylus to the device by capacitive coupling between the stylus and the touch sensor of the device.
US09213449B2
A mobile terminal and a method of controlling the mobile terminal are provided. The method includes displaying a first screen on a display module; if a pressure-touch input is detected from the first screen, displaying one or more menu items associated with the first screen; choosing one of the menu items according to a level of pressure corresponding to the pressure-touch input; and if a predetermined amount of time elapses after the choosing of one of the menu items, performing an operation corresponding to the chosen menu item. Therefore, it is possible to control various operations performed by the mobile terminal in response to a pressure-touch input.
US09213443B2
A touch screen system, including a near-infrared transparent screen including a plurality of reflective elements embedded therein, a circuit board including circuitry for controlled selective activation of electronic components connected thereto, at least one light source connected to the circuit board, for emitting light, and at least one light detector connected to the circuit board, for detecting light emitted by the at least one light source and reflected by the reflective elements.
US09213442B2
Provided is an electronic underlay with a wireless transmission function, designed not to sense a hand holding a writing tool at the time of writing on a sheet. The electronic underlay with a wireless transmission function can be laid under a sheet to perform writing with a writing tool. The electronic underlay is provided with: a sheet-like optical waveguide formed by sandwiching lattice-like cores between a sheet-like under cladding layer and a sheet-like over cladding layer; a light emitting element connected to one end surface of the core; a light receiving element connected to another end surface of the core; and wireless transmission means for wirelessly transmitting inputted letters as electronic data. An elasticity modulus of the core is larger than an elasticity modulus of the under cladding layer and the over cladding layer.
US09213434B2
An apparatus including a display; and at least one piezoelectric member connected to the display. The at least one piezoelectric member is configured to move the display. When the display is pressed to mechanically stress the at least one piezoelectric member, the apparatus is configured to wake up the apparatus from a sleep mode based upon electricity from the at least one piezoelectric member, and/or determine a location where the display was pressed based upon respective signals from at least two of the piezoelectric members.
US09213421B2
A gesture is detected by an electronic device including a display. In response to detecting a first part of the gesture, a first part of first information is displayed on the display. In response to detecting a second part of the gesture subsequent to the first part of the gesture, the display of the first part of the first information is maintained. In response to detecting a third part of the gesture subsequent to the second part of the gesture, an additional part of the information is displayed.
US09213420B2
Information from a position and/or gesture detection system can be embedded in a Web page, or other such presentation of content, and used to select or otherwise interact with content on the page. In some embodiments, video is captured and displayed showing a current view of the user. Position data corresponding to the video is provided and used to determine directions and extents of motion without having to do significant amounts of image processing. The position data is used to determine locations on the page where the user is attempting to provide input, such as to select an item of content. The content can be modified and/or rendered to appear to be associated with the user in the rendered view. Information from multiple gesture systems can be combined on a single page, and information from one or more gesture systems can be shared among multiple pages and devices.
US09213409B2
Devices disclosed herein include a housing component, a touch screen, a haptic actuator for moving the touch screen relative to the housing component, and at least one dual stiffness suspension system that couples the touch screen and housing component together such that the touch screen is movable relative to the housing component. The dual stiffness suspension system has a first element of a first stiffness and a second element of a second stiffness which is stiffer than the first stiffness. The dual stiffness suspension system is configured to limit movement between the touch screen and the housing component in a first direction due to the first element of the dual stiffness suspension system while also being configured to allow movement of the touch screen relative to the housing component in a second opposing direction due to the second element of the dual stiffness suspension system.
US09213403B1
Methods, apparatus, and computer-readable media are described herein related to displaying and cropping viewable objects. A viewable object can be displayed on a display of a head-mountable device (HMD) configured with a hand-movement input device. The HMD can receive both head-movement data corresponding to head movements and hand-movement data from the hand-movement input device. The viewable object can be panned on the display based on the head-movement data. The viewable object can be zoomed on the display based on the hand-movement data. The HMD can receive an indication that navigation of the viewable object is complete. The HMD can determine whether a cropping mode is activated. After determining that the cropping mode is activated, the HMD can generate a cropped image of the viewable object on the display when navigation is complete and perform an operation on the cropped image.
US09213400B2
Apparatus and methods of reducing power consumption in solid-state disks (SSDs) that can reduce power levels in SSDs below levels achievable in known SSD reduced power states. The apparatus is a power management subsystem operative to detect whether an SSD subsystem has been enabled to enter a reduced power state, and to receive a control signal from a host directing the power management subsystem to place the SSD subsystem in the reduced power state. In the event the SSD subsystem is enabled to enter the reduced power state and the host asserts the control signal, the power management subsystem effectively disconnects at least a portion of the SSD subsystem from the power rail. In the event power-up clear circuitry asserts a clear signal to the power management subsystem, or the host negates the control signal, the power management subsystem reestablishes the connection between the SSD subsystem and the power rail.
US09213390B2
Methods and systems may provide for determining a latency constraint associated with a platform and determine an idle window based on the latency constraint. In addition, a plurality of devices on the platform may be instructed to cease one or more activities during the idle window. In one example, the platform is placed in a sleep state during the idle window.
US09213384B2
The subject matter described herein relates to a system and a method for generation of energy consumption profiles corresponding to a plurality of computing systems. For each of the plurality of the computing systems, a plurality of consumption parameters from at least one measurement device is received. The consumption parameters include a processor utilization parameter and an energy consumption parameter. Further, a normalization factor corresponding to each of the plurality of the computing systems is identified. Based on the normalization factor, the processor utilization parameter is normalized. Based on the normalized processor utilization parameter and the energy consumption parameter, the energy consumption profile is generated. The energy consumption profile is indicative of energy efficiency of the plurality of the computing systems.
US09213382B2
Described is a linear voltage regulator circuit comprising a first voltage regulator comprising a first source follower having a first node to provide a first power supply, and a second node different from the first node; and a second voltage regulator comprising a second source follower having a first node to provide a second power supply, and a second node different from the first node, wherein the second nodes of the first and second voltage regulators are electrically shorted.
US09213378B2
Embodiments of the present invention provide for non interruptive fluid cooling of an electronic enclosure. One or more electronic component packages may be removable from a circuit card having a fluid flow system. When installed, the electronic component packages are coincident to and in a thermal relationship with the fluid flow system. If a particular electronic component package becomes non-functional, it may be removed from the electronic enclosure without affecting either the fluid flow system or other neighboring electronic component packages.
US09213373B2
A portable electronic device includes a main body, a keyboard, and a connecting assembly connected between the main body and the keyboard. An electromagnetic module is mounted in the main body. The connecting assembly includes a latch member configured to latch the main body and a magnet module corresponding to the electromagnetic module. The magnet module is fixed to the latch member. When the electromagnetic module is powered off, the latch member is located at a first position and locks the main body to the connecting assembly. When the electromagnetic module is powered on, the electromagnetic module pushes the magnet module and the latch member to a second position, where the latch member is unlocked from the main body and the main body is detachable from the connecting assembly.
US09213369B2
A power supply base for a payment terminal is provided with a housing having an opening for receiving a memory card. The power supply base includes a guide for guiding the payment terminal towards a position wherein it can receive the power supply, the guide including at least one guiding part shaped in such a way as to enable the insertion thereof into the opening of the payment terminal.
US09213367B1
A kit for providing shipping cartons and apparatus used to transport electrical cabinets between a seller and a buyer. The kit includes: a pallet for supporting the cabinet; and a pair of scored panels. The panels are folded along the scores into a pair of flat units disposed over the pallet. The scores are arranged to provide, when the units are unfolded, a pair of opposing outer U-shaped side covering for the cabinet. Stacked engageable ramp-like members are disposed over the pallet to form, when engaged, an elongated ramp. The kit includes a pair of opposing outer U-shaped side members disposed about: sides of the pallet; side of the pair of folded panels; and sides of the ramp-like members to provide sidewalls of shipping package for the kit.
US09213361B1
A computing device and method including a thermal sensor positioned on a flexible circuit located in close proximity to the device enclosure or hot-spot to most accurately track and control skin temperature of the electronic device. One or more flexible circuits may be implemented to include one or more low profile temperature sensors specifically located to detect temperature in close proximity to the enclosure and/or components of interest or hot spots which may be more accurately monitored by locating the low profile temperature sensor on the flexible circuit within the enclosure without substantially increasing the z-height of the existing flexible circuits or taking up additional room within the enclosure.
US09213360B2
The present invention provides a time setting system and method thereof that are capable of correctly setting time if a delay occurs in the transmission of time information. In the system for setting a master time outputted from a master apparatus to a slave time of a slave apparatus that counts time independently of the master apparatus, the slave apparatus has transmission section for transmitting master time request information to the master apparatus via a network and the master apparatus has an allowable range information acquisition section for acquiring allowable range information indicative of an allowable time in which the master time may be set to the slave time of the slave apparatus and transmission section for transmitting the master time and allowable range information to the slave apparatus. The slave apparatus obtains a time difference between a first slave time to be obtained before or after the transmission of master time request information and a second slave time to be obtained at reception of the master time and the allowable range information. If the allowable time is greater than the obtained time difference, the master time is set.
US09213358B2
Monolithic three dimensional (3D) integrated circuit (IC) (3DIC) cross-tier clock skew management systems are disclosed. Methods and related components are also disclosed. In an exemplary embodiment, to offset the skew that may result across the tiers in the clock tree, a cross-tier clock balancing scheme makes use of automatic delay adjustment. In particular, a delay sensing circuit detects a difference in delay at comparable points in the clock tree between different tiers and instructs a programmable delay element to delay the clock signals on the faster of the two tiers. In a second exemplary embodiment, a metal mesh is provided to all elements within the clock tree and acts as a signal aggregator that provides clock signals to the clocked elements substantially simultaneously.
US09213356B2
A tangible computer-readable memory having instructions stored thereon that when executed cause a zone player to: receive control information from any one of a plurality of user interface modules; based on the received control information enter into a synchrony group with a second zone player; and transmit status information to the plurality of user interface modules, wherein the status information provides an indication of an operational status of the synchrony group.
US09213347B2
A low-dropout regulator comprises an analog-to-digital converter that converts a feedback analog voltage signal into a digital signal, a phase synthesizing unit that generates a first control signal having a pulse width corresponding to error information in the digital signal by performing phase synthesis according to clock skew control, a charge pump circuit that selects a charge loop or a discharge loop based on polarity information in the digital signal, and generates an output control voltage according to current that flows during a period corresponding to the pulse width of the first control signal in the selected loop, and an output circuit that generates an output voltage based on an input voltage and the output control voltage, and generates the feedback analog voltage signal based on the output voltage.
US09213338B1
A method is provided that includes receiving user input identifying a travel destination for a first vehicle, determining, by a processor, a first route for the first vehicle to follow, and configuring the first vehicle to follow the first route. The method further includes obtaining a model for a second vehicle that shares a road with the first vehicle and comparing model to a pre-determined template for a vehicle that is known to be a special purpose vehicle in order to determine whether the first template and the second template match. The method further includes determining, by the processor, a second route that leads to the travel destination, when a match is found to exist, and switching the first vehicle from following the first route to following the second route.
US09213314B2
A two-directional date corrector mechanism controlled by a pull-out piece for a date mechanism. The mechanism includes a 24 hour wheel, a date updating finger pivoting integrally therewith, a date driving star-wheel, and a corrector star-wheel meshing therewith and located between the date driving star-wheel and the finger and configured to be uncouplable from the finger under action of an uncoupling mechanism controlled by the pull-out piece, the uncoupling mechanism having a coupling position where the corrector star-wheel meshes with the finger, and an uncoupling position where it is released from the finger to allow the date to be corrected. A date mechanism can include such a date corrector mechanism and a timepiece can include such a date corrector mechanism.
US09213304B2
A cartridge includes: a frame; an agitator; a coupling; a first transmission gear; a closing member; and a cover member. The frame has a first wall having a developer filling port, and a second wall spaced apart from the first wall. The agitator is supported to the first and second walls. The coupling is provided at the first wall and receives a drive force from an external drive source. The first transmission gear is provided at the first wall and transmits the drive force received by the coupling to the agitator. The closing member is provided at the first wall and closes the developer filling port. The cover member is provided at the first wall. The cover member includes: a first cover to cover the first transmission gear; and a second cover provided separately from the first cover and to cover the closing member.
US09213303B2
A replaceable unit for an image forming device according to one example embodiment includes a drive coupler accessible on an exterior portion of a body of the replaceable unit. The drive coupler includes an axial locking member that prevents the drive coupler of the replaceable unit from axially disengaging from a corresponding drive coupler of the image forming device. The drive coupler of the replaceable unit includes an axial opening that permits the drive coupler of the replaceable unit to axially disengage from the corresponding drive coupler of the image forming device when the corresponding drive coupler of the image forming device is rotated relative to the drive coupler of the replaceable unit from its operative engagement with the drive coupler of the replaceable unit in a direction opposite an operative rotational direction of the drive coupler of the replaceable unit.
US09213298B2
An image forming apparatus includes a power supply portion, a driving portion, a detection portion, and a control portion. The power supply portion is connected to an external power supply and configured to generate a DC voltage. The driving portion is configured to drive with, as power, the DC voltage generated by the power supply portion. The detection portion is configured to detect a cut-off state of the external power supply with respect to the power supply portion. The control portion is configured to perform control so as to drive the driving portion when the cut-off state of the external power supply is detected by the detection portion.
US09213294B2
An image forming unit forms an electrostatic latent image on an image carrier based on image data converted by a conversion unit, and the image is developed by a developing portion using toner. A replenishment control unit controls an amount of the toner with which the developing portion is replenished based on a toner density in the developing portion so that the toner density in the developing portion reaches a target density. A first determination unit determines a target density based on a result of a first measurement image being measured. A correction unit corrects conversion conditions based on a result of measuring a second measurement image and a correction condition. A second determination unit determines the correction condition based on the target density determined by the first determination unit.
US09213288B2
An operation panel support mechanism according to the present disclosure includes a first support member, a second support member, a swing mechanism, and a movement mechanism. The first support member is fixed to an apparatus main body. The second support member is fixed to an operation panel. The swing mechanism supports the second support member swingably up and down, and holds the second support member at an arbitrary angle. The movement mechanism supports the second support member movably up and down in a translation manner with respect to the first support member, and holds the second support member at an arbitrary height.