发明授权
US09213792B2 Semiconductor chip including digital logic circuit including at least six transistors with some transistors forming cross-coupled transistor configuration and associated methods
有权
包括数字逻辑电路的半导体芯片包括至少六个晶体管，其中一些晶体管形成交叉耦合晶体管配置和相关方法
- 专利标题： Semiconductor chip including digital logic circuit including at least six transistors with some transistors forming cross-coupled transistor configuration and associated methods
- 专利标题（中）： 包括数字逻辑电路的半导体芯片包括至少六个晶体管，其中一些晶体管形成交叉耦合晶体管配置和相关方法
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申请号： US14642633申请日： 2015-03-09
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公开(公告)号： US09213792B2公开(公告)日： 2015-12-15
- 发明人: Scott T. Becker , Jim Mali , Carole Lambert
- 申请人： Tela Innovations, Inc.
- 申请人地址： US CA Los Gatos
- 专利权人： Tela Innovations, Inc.
- 当前专利权人： Tela Innovations, Inc.
- 当前专利权人地址： US CA Los Gatos
- 代理机构： Martine Penilla Group, LLP
- 主分类号： H01L27/11
- IPC分类号： H01L27/11 ; G06F17/50 ; H01L27/02 ; H01L27/092 ; H01L27/088 ; H01L23/538 ; H01L27/118 ; H01L23/498
摘要：
A first gate level feature forms gate electrodes of a first transistor of a first transistor type and a first transistor of a second transistor type. A second gate level feature forms a gate electrode of a second transistor of the first transistor type. A third gate level feature forms a gate electrode of a second transistor of the second transistor type. The gate electrodes of the second transistors of the first and second transistor types are positioned on opposite sides of a gate electrode track along which the gate electrodes of the first transistors of the first and second transistor types are positioned. The gate electrodes of the second transistors of the first and second transistor types are electrically connected to each other through an electrical connection that includes respective gate contacts and one or more conductive interconnect structures.
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