Hybrid signal filter
    1.
    发明授权

    公开(公告)号:US12184257B2

    公开(公告)日:2024-12-31

    申请号:US17689256

    申请日:2022-03-08

    Abstract: A signal filter includes a notch filter and a wideband filter. The notch filter is configured to perform a band-rejection filtering operation according to a band-rejection filtering property. The wideband filter is coupled to the notch filter, and is configured to perform a wideband filtering operation according to a wideband filtering property. The band-rejection filtering property includes a first cutoff frequency, a frequency bandwidth, a relatively high quality factor and a relatively low coupling coefficient. The wideband filtering property includes a second cutoff frequency, a relatively low quality factor and a relatively high coupling coefficient. The first and the second cutoff frequencies have a frequency difference therebetween. A ratio of the frequency difference to the frequency bandwidth is within a preset ratio range being from 2.5% to 20%.

    Radio frequency auto-transformer, radio frequency device and method of construction of an auto-transformer

    公开(公告)号:US12106884B2

    公开(公告)日:2024-10-01

    申请号:US17651868

    申请日:2022-02-21

    Applicant: NXP B.V.

    CPC classification number: H01F27/2804 H01F41/041 H03H7/00 H01F2027/2809

    Abstract: A radio frequency, RF, auto-transformer circuit (300, 700, 901) and method (1000) of constructing a RF auto-transformer are described. The RF, auto-transformer circuit (300, 700, 901) includes: an inner coil formed (1102) with a first metal layer (MT1) to create a first shunt inductor (302), wherein at least a portion of the inner coil is overlayed (1106) with a second metal layer (MT2) that creates a first series inductor (303) that exhibits inductive coupling to the first shunt inductor (302). An outer coil is formed (1104) with the first metal layer (MT1) that creates a second series inductor (304), where the outer coil is located adjacent the inner coil and provides inductive coupling between the second series inductor (304) and each of the first shunt inductor (302) and first series inductor (303). At least a portion of the outer coil is overlayed (1008) with the second metal layer (MT2) that creates a second shunt inductor (301) that exhibits inductive coupling between the second shunt inductor (301) and each of the first shunt inductor (302) and first series inductor (303) and second series inductor (304). The outer coil is connected (1112) to the inner coil using vias and the respective first metal layer (MT1) is connected to the second layer (MT2) using vias.

    DEVICE FOR GENERATING IQ SIGNALS AND METHOD FOR PRODUCING A DEVICE FOR GENERATING IQ SIGNALS

    公开(公告)号:US20240219513A1

    公开(公告)日:2024-07-04

    申请号:US18392539

    申请日:2023-12-21

    Inventor: Jidan Al-Eryani

    CPC classification number: G01S7/03 H03H7/00

    Abstract: A device for generating IQ signals. An input port receives a differential input signal via a first and a second terminal of the input port. A first output port outputs a differential I output signal. A first terminal is electrically connected to the first terminal of the first output port via a first connecting line and a second terminal is electrically connected to the second terminal of the first output port via a second connecting line. A second output port outputs a differential Q output signal via a first and a second terminal of the second output port. The first terminal of the second output port is electrically connected to a first terminal of an isolated port via a third connecting line, and the second terminal of the second output port is electrically connected to a second terminal of the isolated port via a fourth connecting line.

    POWER REGULATION CIRCUIT AND METHOD FOR CHIP

    公开(公告)号:US20230341883A1

    公开(公告)日:2023-10-26

    申请号:US18344871

    申请日:2023-06-30

    CPC classification number: G05F3/08 H03H7/38 H03H7/004

    Abstract: Provided are a power regulation circuit and method for a chip, and a power supply circuit for a circuit. The power regulation circuit includes an LC circuit and an LC correction circuit. One terminal of the LC circuit is electrically connected to a positive pole of a chip and a positive electrode of a power supply. The other terminal of the LC circuit is electrically connected to a negative pole of the chip and a negative pole of the power supply. The LC correction circuit is electrically connected to the chip and the LC circuit, and is used to regulate a working parameter of the LC circuit according to the current working mode of the chip.

    Level shifter system and capacitive-coupled level shifter

    公开(公告)号:US11329636B2

    公开(公告)日:2022-05-10

    申请号:US16990325

    申请日:2020-08-11

    Abstract: A capacitive-coupled level shifter includes a capacitive divider circuit having a first capacitive divider branch configured to couple a first input terminal to a first comparator terminal and a second capacitive divider branch configured to couple a second input terminal to a second comparator terminal. The first capacitive divider branch and the second capacitive divider branch are symmetric so as to cancel out a common mode voltage of a modulated signal input to the capacitive divider circuit. A level shifter system which includes the capacitive-coupled level shifter is also described.

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