公开(公告)号：US06741133B2

公开(公告)日：2004-05-25

申请号：US10175369

申请日：2002-06-19

申请人： Kenji Kinsho ,  Hideo Akama

发明人： Kenji Kinsho ,  Hideo Akama

IPC分类号： H03F326

CPC分类号： H03F3/303 ,  H03F3/26 ,  H03F2203/30096 ,  H03F2203/30129

摘要： A high output amplifier includes a comparison amplifier having a first input, a second input, and an output, wherein a set voltage is applied to the first input, a voltage of the output is coupled to the second input, and the output is generated in response to a difference between the voltage applied to the first input and the voltage coupled to the second input. The high output amplifier also includes a low-pass filtering device that receives and performs low-pass filtering on the output of the comparison amplifier, a conversion device that converts the output of the low-pass filtering device to complementary signals, and a push-pull output device, driven by the complementary signals, that supplies electrical current to a load, wherein an increase in the electrical current supplied by the push-pull output device is decreased by changes in the load due to the low-pass filtering device.

摘要翻译： 高输出放大器包括具有第一输入，第二输入和输出的比较放大器，其中将设定电压施加到第一输入，输出的电压耦合到第二输入，并且输出在 响应于施加到第一输入的电压与耦合到第二输入的电压之间的差。 高输出放大器还包括低通滤波装置，其在比较放大器的输出上接收并执行低通滤波，将低通滤波装置的输出转换为互补信号的转换装置， 由互补信号驱动的拉出输出装置，其向负载提供电流，其中由于低通滤波装置的负载变化，由推挽输出装置提供的电流的增加减小。

公开(公告)号：US06646508B1

公开(公告)日：2003-11-11

申请号：US10139037

申请日：2002-05-03

申请人： Anthony T. Barbetta

发明人： Anthony T. Barbetta

IPC分类号： H03F326

CPC分类号： H03F3/3018 ,  H03F1/086 ,  H03F1/342 ,  H03F3/265

摘要： The disclosure describes a phase-splitter/level shifter comprising a first MOS transistor has a drain coupled to the first output node and a source coupled to a feedback node through a source resistor and a gate. A second MOS transistor has a drain coupled to a second output node and a source coupled to the feedback node through a source resistor and a gate. A first operational amplifier has a non-inverting input coupled to a single-ended input node, and an inverting input coupled to a second reference current source, an output coupled to the gate of the first MOS transistor. A second operational amplifier has a non-inverting input coupled to a single-ended input node, an inverting input coupled to a first reference current source, and an output coupled to the gate of the second MOS transistor. A variable resistor is coupled between the source of the first and second MOS transistor.

摘要翻译： 本公开描述了一种包括第一MOS晶体管的相位分离器/电平移位器，其具有耦合到第一输出节点的漏极和通过源极电阻器和栅极耦合到反馈节点的源极。 第二MOS晶体管具有耦合到第二输出节点的漏极和通过源电阻器和栅极耦合到反馈节点的源极。 第一运算放大器具有耦合到单端输入节点的非反相输入和耦合到第二参考电流源的反相输入，耦合到第一MOS晶体管的栅极的输出。 第二运算放大器具有耦合到单端输入节点的非反相输入，耦合到第一参考电流源的反相输入和耦合到第二MOS晶体管的栅极的输出。 可变电阻器耦合在第一和第二MOS晶体管的源极之间。

公开(公告)号：US06414549B1

公开(公告)日：2002-07-02

申请号：US09896850

申请日：2001-06-28

申请人： Anthony T. Barbetta

发明人： Anthony T. Barbetta

IPC分类号： H03F326

CPC分类号： H03F1/086 ,  H03F1/342 ,  H03F3/265 ,  H03F3/3001 ,  H03F3/3018

摘要： A wide bandwidth, multi-FET current sharing output stage, MOS audio power amplifier employs multiple feedback loops. An audio input is supplied to a voltage feedback amplifier stage driving a push-pull voltage gain/phase splitter stage. A bias adjustment stage driven from the push-pull voltage gain/phase splitter stage drives a current drive stage. The current drive stage drives an output stage comprising a plurality of paralleled current shared individual MOS output transistors driving an output nodeconnected to a load. Up to three feedback loops are employed. A first voltage feedback loop comprises a voltage feedback stage having an input connected to a voltage divider driven from the first terminal of the load and an output connected to a feedback input node in the voltage feedback amplifier stage. A second voltage feedback loop comprises a voltage feedback stage having an input connected to the first terminal of the load and an output connected to a feedback input node in the push-pull voltage gain/phase splitter stage. A third feedback loop comprises a current feedback stage having an input in series between the output node and the load and an output connected to a feedback input node in the voltage feedback amplifier stage. The current feedback connection works in conjunction with input stage to lower distortion and provide a relatively flat frequency response.

摘要翻译： 宽带宽，多FET电流共享输出级，MOS音频功率放大器采用多个反馈回路。 将音频输入提供给驱动推挽式电压增益/分相器级的电压反馈放大器级。 由推挽电压增益/分相器级驱动的偏置调节级驱动电流驱动级。 当前驱动级驱动包括多个并联的当前共享的单独的MOS输出晶体管的输出级，驱动与负载连接的输出。 最多使用三个反馈回路。 第一电压反馈回路包括电压反馈级，其具有连接到从负载的第一端子驱动的分压器的输入端和连接到电压反馈放大器级中的反馈输入节点的输出端。 第二电压反馈回路包括具有连接到负载的第一端子的输入的电压反馈级和连接到推挽式电压增益/分相器级中的反馈输入节点的输出。 第三反馈回路包括具有在输出节点和负载之间串联的输入的电流反馈级和连接到电压反馈放大器级中的反馈输入节点的输出。 电流反馈连接与输入级一起工作，以降低失真并提供相对平坦的频率响应。

公开(公告)号：US06297699B1

公开(公告)日：2001-10-02

申请号：US09692017

申请日：2000-10-19

申请人： Kenneth W. Murray ,  Joel M. Halbert

发明人： Kenneth W. Murray ,  Joel M. Halbert

IPC分类号： H03F326

CPC分类号： H03F3/3079 ,  H03F3/3066 ,  H03F3/3076 ,  H03F3/3081 ,  H03F3/343 ,  H03F3/45139 ,  H03F3/45152 ,  H03F3/45475 ,  H03F3/45502 ,  H03F3/4556 ,  H03F3/456 ,  H03F3/45609 ,  H03F3/45937

摘要： A bias rail buffer circuit and method in accordance with the present invention overcomes many shortcomings of the prior art. A bias rail buffer circuit for providing a reference signal is suitably configured to absorb external disturbances appearing on an output reference signal. A method for absorbing the external disturbances appearing at the output reference signal suitably includes the use of complementary transistors to source current and sink current to said output reference signal, depending on whether the external disturbances are providing a decrease or an increase to the output reference signal. The bias rail buffer circuit suitably includes an input transistor, a first pair of complementary transistors and a second pair of complementary transistors, such that the second pair of complementary transistors operate to source current and sink current to absorb external disturbances imparted on said output reference signal.

摘要翻译： 根据本发明的偏轨缓冲电路和方法克服了现有技术的许多缺点。 用于提供参考信号的偏置轨缓冲电路被适当地配置为吸收出现在输出参考信号上的外部干扰。 用于吸收出现在输出参考信号处的外部干扰的方法适当地包括使用互补晶体管来根据外部干扰是否对输出参考信号提供减小或增加而将电流和电流吸收到所述输出参考信号 。 偏置轨缓冲电路适当地包括输入晶体管，第一对互补晶体管和第二对互补晶体管，使得第二对互补晶体管操作以源电流和吸收电流以吸收施加在所述输出参考信号上的外部干扰 。

公开(公告)号：US06268770B1

公开(公告)日：2001-07-31

申请号：US09415039

申请日：1999-10-07

申请人： Anthony T. Barbetta

发明人： Anthony T. Barbetta

IPC分类号： H03F326

CPC分类号： H03F1/086 ,  H03F1/342 ,  H03F3/265 ,  H03F3/3001 ,  H03F3/3018

摘要： A wide bandwidth, multi-FET current sharing output stage, MOS audio power amplifier employs multiple feedback loops. An audio input is supplied to a voltage feedback amplifier stage driving a push-pull voltage gain/phase splitter stage. A bias adjustment stage driven from the push-pull voltage gain/phase splitter stage drives a current drive stage. The current drive stage drives an output stage comprising a plurality of paralleled current shared individual MOS output transistors driving an output nodeconnected to a load. Up to three feedback loops are employed. A first voltage feedback loop comprises a voltage feedback stage having an input connected to a voltage divider driven from the first terminal of the load and an output connected to a feedback input node in the voltage feedback amplifier stage. A second voltage feedback loop comprises a voltage feedback stage having an input connected to the first terminal of the load and an output connected to a feedback input node in the push-pull voltage gain/phase splitter stage. A third feedback loop comprises a current feedback stage having an input in series between the output node and the load and an output connected to a feedback input node in the voltage feedback amplifier stage. The current feedback connection works in conjunction with input stage to lower distortion and provide a relatively flat frequency response.

摘要翻译： 宽带宽，多FET电流共享输出级，MOS音频功率放大器采用多个反馈回路。 将音频输入提供给驱动推挽式电压增益/分相器级的电压反馈放大器级。 由推挽电压增益/分相器级驱动的偏置调节级驱动电流驱动级。 当前驱动级驱动包括多个并联的当前共享的单独的MOS输出晶体管的输出级，驱动与负载连接的输出。 最多使用三个反馈回路。 第一电压反馈回路包括电压反馈级，其具有连接到从负载的第一端子驱动的分压器的输入端和连接到电压反馈放大器级中的反馈输入节点的输出端。 第二电压反馈回路包括具有连接到负载的第一端子的输入的电压反馈级和连接到推挽式电压增益/分相器级中的反馈输入节点的输出。 第三反馈回路包括具有在输出节点和负载之间串联的输入的电流反馈级和连接到电压反馈放大器级中的反馈输入节点的输出。 电流反馈连接与输入级一起工作，以降低失真并提供相对平坦的频率响应。

公开(公告)号：US06693490B2

公开(公告)日：2004-02-17

申请号：US10092968

申请日：2002-03-07

申请人： Praveen Manapragada ,  Stephen W. Dow

发明人： Praveen Manapragada ,  Stephen W. Dow

IPC分类号： H03F326

CPC分类号： H03G3/3036 ,  H03F3/45085 ,  H03F2200/294 ,  H03F2200/372 ,  H03F2203/45464

摘要： An adjustable gain control (AGC) system with improved gain control accuracy and method thereof is disclosed. The system includes an offset circuit for providing an offset signal that is selectable; a gain setting source for providing a gain set signal that is dependent on a desired gain and the offset signal; and an AGC circuit, coupled to the offset signal and gain set signal, for providing a gain control signal, the AGC circuit compensating, according to the offset signal, the gain control signal for process variables corresponding to the AGC circuit to provide a plurality of predetermined gains for the amplifier that correspond, respectively, to a plurality of desired gains indicated by respective gain select signals.

摘要翻译： 公开了一种具有改进的增益控制精度的可调增益控制（AGC）系统及其方法。 该系统包括用于提供可选择的偏移信号的偏移电路; 用于提供取决于期望增益的增益设置信号和偏移信号的增益设置源; 以及AGC电路，其耦合到所述偏移信号和增益设置信号，用于提供增益控制信号，所述AGC电路根据所述偏移信号补偿与所述AGC电路相对应的处理变量的增益控制信号，以提供多个 放大器的预定增益分别对应于由各个增益选择信号指示的多个期望增益。

公开(公告)号：US06630866B2

公开(公告)日：2003-10-07

申请号：US10005463

申请日：2001-12-03

申请人： Neil Gibson ,  Marco Corsi ,  Tobin Hagan

发明人： Neil Gibson ,  Marco Corsi ,  Tobin Hagan

IPC分类号： H03F326

CPC分类号： H03F3/26 ,  H03F3/3072 ,  H03F2203/30078 ,  H03F2203/30111

摘要： The present invention provides an high beta, high speed operational amplifier output stage (100). The advantages of the operational amplifier output stage over conventional methods disclosed is up to &bgr;2 rather than a single beta. The present invention achieves this using an pre-driver sub-stage (122) having a plurality of translinear loops so that there is no net signal loss to the final sub-stage (123). The output of the disclosed operational amplifier output stage takes the form: &dgr;Io≈&bgr;n*&bgr;p*&dgr;Iin. When used with a localized feedback circuitry, speed performance is increased and bandwidth is extended.

摘要翻译： 本发明提供一种高β运算放大器输出级（100）。 运算放大器输出级与所公开的常规方法的优点高达beta2而不是单个beta。 本发明使用具有多个跨线回路的预驱动器子级（122）来实现这一点，使得没有到最终子级（123）的净信号损耗。 所公开的运算放大器输出级的输出采用以下形式：当与局部反馈电路一起使用时，速度性能增加并且带宽被扩展。

公开(公告)号：US06603356B1

公开(公告)日：2003-08-05

申请号：US10047960

申请日：2002-01-14

申请人： Chun-Sup Kim ,  Ara Bicakci ,  Sang-Soo Lee

发明人： Chun-Sup Kim ,  Ara Bicakci ,  Sang-Soo Lee

IPC分类号： H03F326

CPC分类号： H03F1/308 ,  H03F3/3064

摘要： A method and circuit control a quiescent current of an amplifier including a preamplifier, error amplifiers, and output devices driven by the error amplifiers, the error amplifiers having an input-referred offset voltage. The method includes (a) applying a calibration voltage to an input of the error amplifiers, (b) calibrating a quiescent current of the output devices by changing the calibration voltage so that the calibrated quiescent current has a predetermined current value, the calibration voltage corresponding to the calibrated quiescent current being set as a correction voltage, and (c) operating the amplifier with the correction voltage applied to the input of the error amplifiers. The circuit includes a correction voltage generator supplying a correction voltage to the error amplifier input, a quiescent current detector detecting the quiescent current, and a calibration circuit adjusting the correction voltage so that the quiescent current is calibrated to a predetermined current value.

摘要翻译： 一种方法和电路控制包括由误差放大器驱动的前置放大器，误差放大器和输出装置的放大器的静态电流，误差放大器具有输入参考偏移电压。 该方法包括（a）将校准电压施加到误差放大器的输入端，（b）通过改变校准电压来校准输出装置的静态电流，使得校准的静态电流具有预定的电流值，校准电压对应 将校正的静态电流设置为校正电压，以及（c）使用施加到误差放大器的输入的校正电压来操作放大器。 该电路包括校正电压发生器，其向误差放大器输入端提供校正电压，静态电流检测器检测静态电流;校准电路调节校正电压，使得静态电流被校准到预定电流值。

公开(公告)号：US06586999B2

公开(公告)日：2003-07-01

申请号：US09901897

申请日：2001-07-11

申请人： Edward Richley

发明人： Edward Richley

IPC分类号： H03F326

CPC分类号： H03F3/72 ,  H03F3/211 ,  H03F2200/198

摘要： A method and an apparatus that reduce power consumption in an ultra wideband (UWB) transmitter that includes a push-pull RF amplifier and a switch that powers up or powers down the amplifier between UWB pulses. The gated push-pull amplifier amplifies the UWB pulses, including spurious signal energy appearing at the detector input, by splitting the signal with a 180-degree phase splitter, amplifying the split signals with substantially identical amplifiers, and combining the amplifier outputs with a 180-degree combiner. The 180-degree combiner essentially cancels common-mode spurious signals typically generated by the UWB amplifier during power-down and power-up.

公开(公告)号：US06429702B2

公开(公告)日：2002-08-06

申请号：US09345059

申请日：1999-06-30

申请人： Dima David Shulman

发明人： Dima David Shulman

IPC分类号： H03F326

CPC分类号： H03K5/2481 ,  H03F3/3023 ,  H03F3/45264 ,  H03F2203/30096 ,  H03F2203/30117 ,  H03F2203/30129

摘要： A class AB buffer (or amplifier) is disclosed for driving a large capacitive load. The disclosed CMOS class AB buffer can drive capacitive loads, for example, in excess of 100 pF, while operating from a voltage supply as low as 1.5 volts. The disclosed class AB buffer includes a pair of driving transistors that are cross-coupled through an amplifier and level shifting circuitry, such as transistor circuitry, and a pair of current source transistors each having a gate terminal connected to an output of the corresponding amplifier and a gate terminal of an output transistor, and a drain terminal connected to a source terminal of the driving transistors. The driving transistors are prevented from entering a linear region by connecting a drain terminal of each of the driving transistors to a positive power supply voltage. The threshold voltage of only one transistor must be overcome before the transistors conduct current, since the gate-sources of the driving and current source transistors are not in series. Performance enhancements may be achieved by using cascode transistors in the input stage or output stage, or both. The stability of the circuit is ensured by selecting the capacitance of the load to ensure that a first non-dominant pole of the class AB buffer is greater than the unity gain bandwidth of the class AB buffer over substantially all operating conditions.

摘要翻译： 公开了用于驱动大容性负载的AB类缓冲器（或放大器）。 所公开的CMOS类AB缓冲器可以驱动容性负载，例如超过100pF，同时从低至1.5伏的电压供电。 所公开的AB类缓冲器包括通过放大器交叉耦合的一对驱动晶体管和诸如晶体管电路的电平移位电路，以及一对电流源晶体管，每个具有连接到相应放大器的输出的栅极端子， 输出晶体管的栅极端子和连接到驱动晶体管的源极端子的漏极端子。 通过将每个驱动晶体管的漏极端子连接到正电源电压来防止驱动晶体管进入线性区域。 在晶体管导通电流之前，必须克服仅一个晶体管的阈值电压，因为驱动和电流源晶体管的栅极源不是串联的。 通过在输入级或输出级中使用共源共栅晶体管，或两者都可以实现性能增强。 通过选择负载的电容来确保电路的稳定性，以确保AB类缓冲器的第一非主导极大于基本上所有操作条件下AB类缓冲器的单位增益带宽。