公开(公告)号：US06549434B2

公开(公告)日：2003-04-15

申请号：US09956780

申请日：2001-09-20

申请人： Dongsheng Zhou ,  Gary L. Skibinski ,  Walt A. Maslowski ,  Brian R. Buchholz ,  Nick N. Guskov

发明人： Dongsheng Zhou ,  Gary L. Skibinski ,  Walt A. Maslowski ,  Brian R. Buchholz ,  Nick N. Guskov

IPC分类号： H02J102

CPC分类号： H02J3/01 ,  H02M1/126 ,  Y02E40/40

摘要： A harmonic mitigating apparatus connected between a three phase power source and a load provides a multiple-winding reactor for reducing harmonics directed from the load to the source, the apparatus including, for each system phase, first and second line windings in series between the source and load and oriented so as to have the same polarity such that the winding fluxes add thereby increasing total reactance to harmonics directed from the load to the supply, the apparatus also including at least one trap circuit including a series inductance and capacitor for each phase and linked between the first and second line windings and a neutral point (or another phase), the trap circuit characterized by a reactance that is lower than the reactance of the first line winding such that harmonics flow into the trap circuit, for each phase, at least two of the first and second line windings and the trap winding arranged on the same core.

摘要翻译： 连接在三相电源和负载之间的谐波减轻装置提供一个用于减少从负载引导到源的谐波的多绕组电抗器，该装置包括对于每个系统相位，在源极之间串联的第一和第二线绕组 并且负载和取向以具有相同的极性，使得绕组通量相加，从而增加对从负载到电源的谐波的总电抗，该装置还包括至少一个包括用于每相的串联电感和电容器的陷波电路，以及 连接在第一和第二线绕组和中性点（或另一相位）之间，该陷阱电路的特征在于低于第一线绕组的电抗的电抗，使得每个相的谐波流入陷阱电路 第一和第二线绕组中的至少两个和陷波绕组布置在相同的芯上。

公开(公告)号：US06559561B1

公开(公告)日：2003-05-06

申请号：US09700982

申请日：2000-12-15

申请人： Lennart Angquist

发明人： Lennart Angquist

IPC分类号： H02J102

CPC分类号： H02J3/24

摘要： In a method for damping power oscillations in a transmission line, at least one first angular-frequency signal is generated, representing a first angular frequency which is given by a prior knowledge of oscillation frequencies expected in the power system, and a first phase-reference signal is formed as the time integral of the angular-frequency signal. A power quantity in the transmission line characterizing the power is sensed and a first estimated power quantity is formed, representing for an oscillation of the first angular frequency, its amplitude and phase position relative to the first phase-reference signal. A first damping signal is formed with an amplitude dependent on the amplitude of the first estimated power quantity and with a first phase shift in relation to the phase position thereof, and the first damping signal is supplied to an actuator for influencing the power transmitted in the transmission line.

摘要翻译： 在一种用于阻尼传输线中的功率振荡的方法中，产生至少一个第一角频率信号，其表示由电力系统中预期的振荡频率的先前知识给出的第一角频率，以及第一相位参考 信号形成为角频率信号的时间积分。 检测表征功率的传输线路中的功率量，并且形成第一估计功率量，代表第一角频率的振荡，相对于第一相位参考信号的振幅和相位位置。 形成第一衰减信号，其幅度取决于第一估计功率量的振幅，并且相对于其相位位置具有第一相移，并且第一阻尼信号被提供给致动器，用于影响在 传输线。

公开(公告)号：US06433521B1

公开(公告)日：2002-08-13

申请号：US09920630

申请日：2001-08-03

申请人： An-Tung Chen ,  Yung-Peng Hwang

发明人： An-Tung Chen ,  Yung-Peng Hwang

IPC分类号： H02J102

CPC分类号： H04L25/0298 ,  G11C5/147 ,  G11C7/1048 ,  G11C7/1066 ,  G11C11/4074 ,  G11C11/4093

摘要： The present invention provides a regulator used in an active terminator of a bus. The regulator comprises a voltage-regulated terminal, a first operational amplifier and a non-inverting input terminal thereof coupled to a reference voltage. An inverting input terminal of a second operational amplifier is coupled to the reference voltage. A control gate of a first transistor is coupled to an output terminal of the first operational amplifier. A source of the first transistor is coupled to an inverting input terminal of the first operational amplifier to form a feedback network and to provide a stable circuit of sourcing current. A control gate of a second transistor is coupled to an output terminal of the second operational amplifier and a drain of the second transistor to a non-inverting input terminal of the second operational amplifier to form the feedback network and to provide a stable circuit of sinking current. The prevent invention prevents from utility of complementary output power transistors and shoot-through current.

摘要翻译： 本发明提供一种用于总线的有源终端器中的调节器。 调节器包括耦合到参考电压的电压调节端子，第一运算放大器和非反相输入端子。 第二运算放大器的反相输入端耦合到参考电压。 第一晶体管的控制栅极耦合到第一运算放大器的输出端。 第一晶体管的源极耦合到第一运算放大器的反相输入端，以形成反馈网络并提供电流电流的稳定电路。 第二晶体管的控制栅极耦合到第二运算放大器的输出端和第二晶体管的漏极到第二运算放大器的非反相输入端，以形成反馈网络并提供稳定的下沉电路 当前。 防止发明防止互补输出功率晶体管和直通电流的效用。

公开(公告)号：US06307760B1

公开(公告)日：2001-10-23

申请号：US09653064

申请日：2000-09-01

申请人： Takashi Ikimi

发明人： Takashi Ikimi

IPC分类号： H02J102

CPC分类号： H02P27/14 ,  H02M5/4585 ,  H02M7/527 ,  Y02P80/116

摘要： A three level inverter apparatus for suppressing a resonance current flowing therethrough, to thus improve its conversion efficiency and operational stability. This inverter apparatus includes a converter 1 for converting AC power source power to DC power, an inverter for converting thus converted DC power to AC power, and a DC link for interconnecting these converter and inverter. This DC link has two first smoothing capacitors connected in series between a positive-polarity potential bus P and a negative-polarity potential bus N for storing DC power obtained by the converter 1 and two second smoothing capacitors connected in series between the positive-polarity potential bus P and the negative-polarity potential bus N for storing DC power to be supplied to the inverter. The positive-polarity and negative-polarity potential buses each have a resonance-suppressing reactor inserted therein and the intermediate-potential bus, a resonance-suppressing resistor inserted therein.

摘要翻译： 用于抑制流过其中的谐振电流的三电平逆变器装置，从而提高其转换效率和操作稳定性。 该逆变器装置包括：将交流电源功率转换为直流电力的转换器1，将转换后的直流电变换为交流电力的逆变器，以及将这些变换器和逆变器互连的直流母线。 该DC链路具有串联连接在正极性电位总线P和负极性电位总线N之间的两个第一平滑电容器，用于存储由转换器1获得的直流电力和两个串联连接在正极性电位之间的第二平滑电容器 总线P和负极性电位总线N，用于存储要提供给逆变器的直流电力。 正极性和负极性电位总线各自具有插入其中的谐振抑制电抗器和中间电位总线，插入谐振抑制电阻器。

公开(公告)号：US06545885B2

公开(公告)日：2003-04-08

申请号：US09803945

申请日：2001-03-13

申请人： Shoji Nishimura ,  Yoshifumi Minowa ,  Masakuni Asano ,  Noriaki Tokuda ,  Tokuo Emura ,  Yoshihiro Hada

发明人： Shoji Nishimura ,  Yoshifumi Minowa ,  Masakuni Asano ,  Noriaki Tokuda ,  Tokuo Emura ,  Yoshihiro Hada

IPC分类号： H02J102

CPC分类号： H02J3/1842 ,  H02J3/01 ,  H02J3/24 ,  Y02E40/22 ,  Y02E40/40

摘要： A power fluctuation monitoring unit which monitors and detects the power fluctuation at a receiving point 9 by means of the measurement results of the voltage at injection point 14 of an intermediate-order harmonic current and the current at incoming line 10, a power compensation unit which forms the compensation power injection signal for canceling out the power fluctuation based on the detection results of the power fluctuation, and an inverter device 18 which is driven and controlled by the signal resulting from the addition of the intermediate-order harmonic current injection signal and the compensation power injection signal and injects the intermediate-order harmonic current and the compensation power into the injection point, are equipped.

公开(公告)号：US06462967B1

公开(公告)日：2002-10-08

申请号：US09454264

申请日：1999-12-03

申请人： Teruhiko Fujisawa ,  Makoto Okeya

发明人： Teruhiko Fujisawa ,  Makoto Okeya

IPC分类号： H02J102

CPC分类号： G04G19/02

摘要： An oscillation circuit 80 produces an oscillation signal in accordance with the oscillation frequency of a quartz oscillator 81, and a frequency dividing circuit 90 divides the frequency of the oscillation signal to produce a sampling clock CKs having a duty ratio of 1/8. A constant-voltage circuit 70 is operated during the period in which the sampling clock CKs takes an “H” level, and is stopped during the period in which the sampling clock CKs takes an “L” level. During the period in which the constant-voltage circuit 70 stops the operation, a voltage Vreg affected by fluctuations in a second lower potential side voltage Vss2 is generated. However, since the cycle of the sampling clock CKs is short, a fluctuation width of the voltage Vreg is suppressed. Power consumption of the constant-voltage circuit 70 is reduced.

摘要翻译： 振荡电路80根据石英振荡器81的振荡频率产生振荡信号，分频电路90分频振荡信号的频率，产生占空比为1/8的采样时钟CKs。 在采样时钟CK为“H”电平的期间，恒定电压电路70动作，在采样时钟CK为“L”电平的期间停止。 在恒压电路70停止动作的期间，产生受第二低电位侧电压Vss2的波动影响的电压Vreg。 然而，由于采样时钟CKs的周期短，因此电压Vreg的波动宽度被抑制。 恒压电路70的功耗降低。

公开(公告)号：US06288917B1

公开(公告)日：2001-09-11

申请号：US09456101

申请日：1999-12-06

申请人： James E. Redburn ,  Leonard E. Webster

发明人： James E. Redburn ,  Leonard E. Webster

IPC分类号： H02J102

CPC分类号： H03H7/03 ,  H02H9/005 ,  H02H9/042 ,  H03H7/0107 ,  H03H7/427

摘要： A power conditioning circuit for conditioning power supplied by a power source at a nominal frequency over line, neutral and ground conductors includes first, second and third stages. The first stage provides voltage suppression and includes a set of three metal oxide varistors (MOVs). The second stage provides high frequency power suppression and includes three inductors coupled to the line, neutral and ground conductors, respectively, and to output lines. Each of the inductors prevents power at frequencies greater than the nominal frequency from reaching the output lines and each of the inductors may be rated to compensate for the capacitive impedance characteristics of a load supplied by the power conditioning circuit. The third stage provides voltage suppression and voltage clamping and includes an MOVs and a set of first and second rectifier diodes.

摘要翻译： 用于调节由电源以标称频率在线，中性线和接地导体供电的功率的功率调节电路包括第一，第二和第三级。 第一级提供电压抑制，并包括一组三个金属氧化物变阻器（MOV）。 第二级提供高频功率抑制，并且包括分别耦合到线路，中性线和接地导线的三个电感器和输出线路。 每个电感器防止在大于标称频率的频率处的功率到达输出线，并且每个电感器可以被额定为补偿由功率调节电路提供的负载的电容性阻抗特性。 第三级提供电压抑制和电压钳位，并包括MOV和一组第一和第二整流二极管。

公开(公告)号：US06195274B1

公开(公告)日：2001-02-27

申请号：US09555334

申请日：2000-05-30

申请人： Petri Schroderus ,  Samuli Heikkilä

发明人： Petri Schroderus ,  Samuli Heikkilä

IPC分类号： H02J102

CPC分类号： G01R19/0092

摘要： A method of defining an instantaneous value of a current (i2e) of a pulse-controlled inductive load when the impedance of the load is known, the method comprising the steps of: measuring the output voltage (u1) of a pulsed voltage source, and measuring the output current (i1) of the pulsed voltage source. The method is characterized by further comprising the steps of: low-pass filtering the measured output current (i1) of the pulsed voltage source to produce a fundamental wave current (i1lp), defining a load current estimate (i2est) by computation on the basis of the measured output voltage (u1) of the pulsed voltage source and the impedance of the load, high-pass filtering the load current estimate (i2est), and defining the instantaneous value of the load current (i2e) by adding the high-pass-filtered load current estimate (i2hp) to the fundamental wave current (i1p).

摘要翻译： 一种在已知负载阻抗时定义脉冲控制电感负载的电流（i2e）的瞬时值的方法，所述方法包括以下步骤：测量脉冲电压源的输出电压（u1），以及 测量脉冲电压源的输出电流（i1）。 该方法的特征还在于包括以下步骤：对所测量的脉冲电压源的输出电流（i1）进行低通滤波，以产生基波电流（i1lp），通过计算基础确定负载电流估计（i2est） 的脉冲电压源的测量输出电压（u1）和负载阻抗，对负载电流估计（i2est）进行高通滤波，并通过加上高通量来定义负载电流（i2e）的瞬时值 - 滤波负载电流估计（i2hp）到基波电流（i1p）。

公开(公告)号：US06788166B2

公开(公告)日：2004-09-07

申请号：US10372261

申请日：2003-02-25

申请人： Shan-Jui Lu

发明人： Shan-Jui Lu

IPC分类号： H02J102

CPC分类号： H01G4/35 ,  H01C7/12 ,  H02M1/126 ,  H03H1/0007

摘要： A harmonic wave distortion suppressor includes a main body, at least a connecting pin and a coating. The main body is made of a first material and covered with a second material for absorbing an instantaneous high voltage or sharp wave. The connecting pin is coupled to two lateral sides of the main body respectively so as to form a capacitor. The coating is coated on the main body locally with a clearance being exposed and the clearance provides a function of charging and discharging locally. When the high voltage or sharp wave passes through the harmonic wave distortion suppressor, peak discharging effect of the clearance can not only isolate the high voltage or sharp wave from entering an electronic device but also prevent an iron core in the electronic device from occurring magnetization effect resulting from the high voltage or sharp wave so that quality of signal transmission and receiving can be secured.

公开(公告)号：US06665198B2

公开(公告)日：2003-12-16

申请号：US10208214

申请日：2002-07-30

申请人： Wen-Yin Tasi ,  Hung-Liang Chou ,  Chin-Chang Wu

发明人： Wen-Yin Tasi ,  Hung-Liang Chou ,  Chin-Chang Wu

IPC分类号： H02J102

CPC分类号： H02J3/01 ,  H02J3/1814 ,  Y02E40/18 ,  Y02E40/40 ,  Y10T307/516 ,  Y10T307/527 ,  Y10T307/625

摘要： An power supply apparatus for the input harmonic current suppression, input power factor compensation, and an output voltage regulation and a method thereof is provided. The power supply apparatus electrically connected to a AC power has a first power converter electrically connected in parallel with the AC power for providing a first compensating voltage and controlling the first compensating voltage to reduce harmonic components of an input current so as to cause the input current as a substantial sinusoidal wave and in phase with the input voltage, and a second power converter electrically connected in series with an output end of the power supply apparatus for providing a second compensating voltage in order to maintain the output voltage at a desired level and waveform. The related methods are also discussed.