公开(公告)号：US08178472B2

公开(公告)日：2012-05-15

申请号：US11806175

申请日：2007-05-30

Applicant: Yoshihiro Ishimaru ,  Yoshinobu Tarutani ,  Keiichi Tanabe

Inventor： Yoshihiro Ishimaru ,  Yoshinobu Tarutani ,  Keiichi Tanabe

IPC: H01L39/22

CPC classification number: H01L27/18 ,  G01R33/0354 ,  H01L39/225 ,  H01L39/2496 ,  Y10S505/861 ,  Y10S505/864 ,  Y10S505/865 ,  Y10S505/874

Abstract: The present invention provides a superconducting device including a substrate, a first superconducting pattern formed on the substrate, an insulating pattern formed on the first superconducting pattern, and a second superconducting pattern formed at the uppermost level in the multilayered superconducting pattern. A barrier layer of a Josephson junction is formed on the lower side of, or within the second superconducting pattern. The second superconducting pattern constitutes a circuit element on the insulating pattern.

Abstract translation: 本发明提供一种超导装置，其包括基板，形成在基板上的第一超导图案，形成在第一超导图案上的绝缘图案，以及形成在多层超导图案中的最上层的第二超导图案。 约瑟夫逊结的阻挡层形成在第二超导图案的下侧或内部。 第二超导图案构成绝缘图案上的电路元件。

公开(公告)号：US5287057A

公开(公告)日：1994-02-15

申请号：US850918

申请日：1992-03-13

Applicant: Kohtaroh Gotoh

Inventor： Kohtaroh Gotoh

IPC: G01R33/035 ,  H01L39/22 ,  H03K19/195 ,  G01R19/22 ,  H03K3/38 ,  H03K17/92

CPC classification number: H03K19/1956 ,  H03K19/1952 ,  Y10S505/845 ,  Y10S505/861 ,  Y10S505/864

Abstract: A superconducting circuit system comprises a biasing circuit for producing a bias current that changes periodically, and a superconducting rectifier circuit driven by the bias current. The superconducting rectifier circuit is supplied with a first pulse train including therein positive and negative pulses in synchronization with the bias current and produces a second pulse train of unipolar pulses in response to a transition of a Josephson junction caused by the pulses of the first pulse train.

Abstract translation: 超导电路系统包括用于产生周期性变化的偏置电流的偏置电路和由偏置电流驱动的超导整流电路。 超导整流电路被提供有第一脉冲串，其中包括与偏置电流同步的正脉冲和负脉冲，并响应于由第一脉冲串的脉冲引起的约瑟夫逊结的转变而产生单极性脉冲的第二脉冲串 。

公开(公告)号：US4400631A

公开(公告)日：1983-08-23

申请号：US233949

申请日：1981-02-12

Applicant: Theodore A. Fulton

Inventor： Theodore A. Fulton

IPC: H03K17/92 ,  H03K19/195 ,  H03K3/38

CPC classification number: H03K17/92 ,  H03K19/1952 ,  Y10S505/861

Abstract: A superconductive circuit is described for diverting bias current to an output line in response to magnetic field control means. A first plurality of branches containing magnetically switchable Josephson junction gates are connected in parallel, and a second plurality of the same gates, less than or equal in number to the first plurality, are actuated essentially simultaneously by the control means. As a consequence, high-gain, high-speed operation is made possible.

Abstract translation: 描述了用于响应于磁场控制装置将偏置电流转移到输出线的超导电路。 并联地连接包含可磁性切换的约瑟夫逊结门的第一多个分支，并且数量小于或等于第一多个的第二多个相同的栅极基本上由控制装置同时被致动。 因此，高增益高速运行成为可能。

公开(公告)号：US3204115A

公开(公告)日：1965-08-31

申请号：US12824861

申请日：1961-07-31

Applicant: RCA CORP

Inventor： PARMENTER ROBERT H

IPC: G11C11/44 ,  H01B1/00 ,  H01L27/00 ,  H01L39/00 ,  H01L39/22 ,  H03F19/00 ,  H03K3/38

CPC classification number: H03K3/38 ,  G11C11/44 ,  H01B1/00 ,  H01L27/00 ,  H01L39/00 ,  H01L39/22 ,  H01L39/223 ,  H01L39/228 ,  H03F19/00 ,  Y10S505/861

公开(公告)号：US5296749A

公开(公告)日：1994-03-22

申请号：US831582

申请日：1992-02-05

Applicant: Ted G. Berlincourt

Inventor： Ted G. Berlincourt

IPC: H01L39/22 ,  H03K17/92

CPC classification number: H01L39/223 ,  Y10S505/861

Abstract: Magnetic flux concentrating materials are introduced in superconducting moelectronic devices and circuits as a method and means for fabrication of more compact, higher speed superconducting microelectronic devices and circuits.

Abstract translation: 在超导微电子器件和电路中引入磁通量集中材料作为制造更紧凑，更高速度的超导微电子器件和电路的方法和装置。

公开(公告)号：US5124583A

公开(公告)日：1992-06-23

申请号：US650933

申请日：1991-02-05

Applicant: Yuji Hatano ,  Shinichiro Yano ,  Hiroyuki Mori ,  Hirozi Yamada ,  Mikio Hirano

Inventor： Yuji Hatano ,  Shinichiro Yano ,  Hiroyuki Mori ,  Hirozi Yamada ,  Mikio Hirano

IPC: H01L39/22 ,  G06F7/38 ,  H01L27/18 ,  H03K3/38 ,  H03K19/195

CPC classification number: H01L27/18 ,  G06F7/381 ,  H03K19/1952 ,  H03K3/38 ,  Y10S505/861 ,  Y10S505/865

Abstract: A DC powered integrated circuit includes a plurality of magnetic flux coupling type Josephson elements. First and second Josephson elements are connected in series to form a first element series circuit of Josephson elements. Third and fourth Josephson elements are connected in series to form a second element series circuit of Josephson elements. The first and second element series circuits are connected in series to form a huffle circuit, with a load inductance, three resistors and a DC current source.

公开(公告)号：US4902908A

公开(公告)日：1990-02-20

申请号：US146160

申请日：1988-01-20

Applicant: Yutaka Harada

Inventor： Yutaka Harada

IPC: H03K19/195

CPC classification number: H03K19/1952 ,  Y10S505/858 ,  Y10S505/861 ,  Y10S505/864

Abstract: A superconducting circuit comprises a quantum flux parametron. In the superconducting circuit, at least one of two Josephson devices is a voltage controlled superconducting device, the critical current of which can be controlled by applying a voltage. By adjusting the applied voltage, the critical currents of the two Josephson devices can be equalized. If an input signal is used as the applied voltage, the input signal can be isolated from an output signal. And further, if both critical currents of the two Josephson devices are increased after an input signal is supplied, the input signal can be stably amplified.

Abstract translation: 超导电路包括量子通量参数。 在超导电路中，两个约瑟夫逊器件中的至少一个是压控超导器件，其临界电流可以通过施加电压来控制。 通过调整施加的电压，两个约瑟夫逊器件的临界电流可以相等。 如果输入信号用作施加的电压，输入信号可以与输出信号隔离。 此外，如果在提供输入信号之后两个约瑟夫逊器件的两个临界电流都增加，则可以稳定地放大输入信号。

公开(公告)号：US4275314A

公开(公告)日：1981-06-23

申请号：US34569

申请日：1979-04-30

Applicant: Theodore A. Fulton

Inventor： Theodore A. Fulton

IPC: H03K3/38 ,  H03K17/92 ,  H03K19/195 ,  H03K19/20

CPC classification number: H03K19/1956 ,  H03K17/92 ,  H03K19/1954 ,  H03K3/38 ,  Y10S505/859 ,  Y10S505/861

Abstract: A current-switched gate is described which comprises two Josephson tunnel junctions and a small resistor in a triangular loop. Directly combined bias and control currents flow through one junction in the zero-voltage state, causing the switching. The second junction and the resistor provide isolation between input and output after switching. Switching speeds of a few tens of picoseconds and the microwatt power dissipation are attained. Latching as well as nonlatching schemes and memory circuits are described.

Abstract translation: 描述了一个电流切换门，其包括两个约瑟夫逊隧道结和三角形环路中的小电阻。 直接组合的偏置和控制电流在零电压状态下流过一个结，导致开关。 第二个接点和电阻在切换后提供输入和输出之间的隔离。 达到几十皮秒的开关速度和微瓦功率消耗。 描述了锁存以及非锁存方案和存储器电路。

公开(公告)号：US4245169A

公开(公告)日：1981-01-13

申请号：US20359

申请日：1979-03-14

Applicant: Clark Hamilton

Inventor： Clark Hamilton

IPC: G11C11/44 ,  G11C27/02 ,  H03K5/153 ,  H03K5/24

CPC classification number: G11C27/022 ,  G11C11/44 ,  Y10S505/861

Abstract: A sampling circuit and method therefor including a first Josephson junctionor producing a series of sampling pulses for activating a second Josephson junction that is receptive of both the analog current signal being sampled and a bias current. The first Josephson junction is continually triggered at a fixed time relative to the repetitive analog signal to provide a series of sampling pulses and before each sampling pulse the bias level to the second Josephson junction is changed until the sum of the current from the sampling pulse, from the analog signal, and from the bias source exceeds the critical current value of the second Josephson junction causing it to switch from one voltage state to another. The value of the bias current at the point of switching is proportional to the current in the analog signal.In one embodiment, the bias current is increased in a step-like fashion for each sampling pulse from the first Josephson junction until the critical value of the second Josephson junction is reached. The resolution of the analog signal for this embodiment is 1/N if there are N samples.In another embodiment where the analog signal is known to exist between two extremes, the bias current for the first sample is initially positioned at a mid-range value between the extremes. If, at the sample time, the second Josephson junction is switched, the bias current for the next sample is reduced by 1/2. If the second Josephson junction has not switched, the bias current is increased by 1/2 for the next sample. This process continues for N samples, the resulting resolution being 1/2.sup.N.

Abstract translation: 一种采样电路及其方法，包括第一约瑟夫逊结，用于产生用于激活接收待采样的模拟电流信号和偏置电流的第二约瑟夫逊结的一系列采样脉冲。 第一约瑟夫逊结在相对于重复模拟信号的固定时间连续触发以提供一系列采样脉冲，并且在每个采样脉冲之前，向第二约瑟夫逊结的偏置电平改变，直到来自采样脉冲的电流之和， 来自模拟信号，偏置源超过第二约瑟夫逊结的临界电流值，使其从一个电压状态切换到另一个电压状态。 切换点处的偏置电流的值与模拟信号中的电流成比例。 在一个实施例中，对于来自第一约瑟夫逊结的每个采样脉冲，阶梯式地增加偏置电流，直到达到第二约瑟夫逊结的临界值。 如果存在N个采样，则该实施例的模拟信号的分辨率为1 / N。 在已知模拟信号存在于两个极端之间的另一个实施例中，第一样本的偏置电流最初位于极端之间的中间范围值。 如果在采样时间切换第二个约瑟夫逊结，则下一个采样的偏置电流减少1/2。 如果第二个约瑟夫逊结没有切换，则下一个样本的偏置电流增加1/2。 对于N个样本，该过程继续进行，得到的解析度为1 / 2N。

公开(公告)号：US20070281861A1

公开(公告)日：2007-12-06

申请号：US11806175

申请日：2007-05-30

Applicant: Yoshihiro Ishimaru ,  Yoshinobu Tarutani ,  Keiichi Tanabe

Inventor： Yoshihiro Ishimaru ,  Yoshinobu Tarutani ,  Keiichi Tanabe

IPC: H01L39/24

CPC classification number: H01L27/18 ,  G01R33/0354 ,  H01L39/225 ,  H01L39/2496 ,  Y10S505/861 ,  Y10S505/864 ,  Y10S505/865 ,  Y10S505/874

Abstract: The present invention provides a superconducting device including a substrate, a first superconducting pattern formed on the substrate, an insulating pattern formed on the first superconducting pattern, and a second superconducting pattern formed at the uppermost level in the multilayered superconducting pattern. A barrier layer of a Josephson junction is formed on the lower side of, or within the second superconducting pattern. The second superconducting pattern constitutes a circuit element on the insulating pattern.

Abstract translation: 本发明提供一种超导装置，其包括基板，形成在基板上的第一超导图案，形成在第一超导图案上的绝缘图案，以及形成在多层超导图案中的最上层的第二超导图案。 约瑟夫逊结的阻挡层形成在第二超导图案的下侧或内部。 第二超导图案构成绝缘图案上的电路元件。