公开(公告)号：US09337871B2

公开(公告)日：2016-05-10

申请号：US14714616

申请日：2015-05-18

申请人： HUAWEI TECHNOLOGIES CO.,LTD.

发明人： Bin Li ,  Hui Shen

IPC分类号： H03M7/34 ,  H03M13/29 ,  H03M13/13 ,  H04L1/00 ,  H03M13/00 ,  H03M13/09

CPC分类号： H03M13/155 ,  H03M13/09 ,  H03M13/13 ,  H03M13/2792 ,  H03M13/2906 ,  H03M13/2924 ,  H03M13/2957 ,  H03M13/611 ,  H03M13/6356 ,  H03M13/6516 ,  H04L1/0057

摘要： Embodiments of the present invention provide a method and an apparatus for processing data. The method includes: performing code block segmentation on a data block to obtain multiple first blocks, wherein a difference between numbers of bits of any two first blocks in the multiple first blocks is not more than 1 bit; determining multiple second blocks according to a padding bit and the multiple first blocks, wherein a value of the padding bit is a preset value; adding consecutive N−K fixed bits to each of the multiple second blocks to obtain multiple third blocks, wherein a value of the fixed bit is a preset value, and N−K≧0; and performing polar encoding according to the multiple third blocks.

摘要翻译： 本发明的实施例提供了一种用于处理数据的方法和装置。 该方法包括：对数据块执行码块分段以获得多个第一块，其中多个第一块中的任何两个第一块的比特数之间的差不大于1比特; 根据填充位和多个第一块确定多个第二块，其中所述填充位的值是预设值; 向所述多个第二块中的每一个添加连续的N-K个固定比特，以获得多个第三块，其中所述固定比特的值是预设值，并且N-K≥0; 并根据多个第三块执行极化编码。

公开(公告)号：US08869011B2

公开(公告)日：2014-10-21

申请号：US13733847

申请日：2013-01-03

申请人： International Business Machines Corporation

发明人： Roy D. Cideciyan ,  Robert A. Hutchins ,  Thomas Mittelholzer ,  Keisuke Tanaka

IPC分类号： H03M13/00 ,  H04L1/00 ,  H03M13/29 ,  G06F11/10 ,  G11B7/007 ,  G11B20/18 ,  H03M13/03

CPC分类号： G06F11/1012 ,  G11B7/007 ,  G11B20/1809 ,  G11B20/1833 ,  G11B20/1866 ,  G11B2020/1836 ,  H03M13/03 ,  H03M13/09 ,  H03M13/1102 ,  H03M13/1515 ,  H03M13/2909 ,  H03M13/2924 ,  H03M13/293 ,  H03M13/356 ,  H03M13/373 ,  H03M13/3746 ,  H04L1/0061

摘要： In one embodiment, a method includes receiving a headerized SDS protected by unequal error protection; decoding a header from the headerized SDS and removing an impact of the header from C1 row parity to obtain a SDS; for a number of iterations: performing C2 column decoding, for no more than a number of interleaves in each row of the SDS: overwriting a number of columns with successfully decoded C2 codewords, erasing a number of C2 codewords, and maintaining remaining columns as uncorrected, performing C1 row decoding; for no more than a number of interleaves in each row of the SDS: overwriting a number of rows with successfully decoded C1 codewords, erasing a number of C1 codewords, and maintaining remaining rows as uncorrected; and outputting the SDS when all rows include only C1 codewords and all columns include only C2 codewords; otherwise, outputting indication that the SDS cannot be decoded properly.

摘要翻译： 在一个实施例中，一种方法包括接收由不相等的错误保护保护的标题化的SDS; 从标题化的SDS解码报头，并从C1行奇偶校验中消除报头的影响以获得SDS; 对于多次迭代：执行C2列解码，在SDS的每行中不超过多个交织：用成功解码的C2码字重写多个列，擦除多个C2码字，并将剩余列保持为未校正 执行C1行解码; 在SDS的每一行中不超过多个交织：用成功解码的C1码字重写多行，擦除多个C1码字，并将剩余行维持为未校正; 并且当所有行仅包括C1码字时输出SDS，并且所有列仅包括C2码字; 否则，输出SDS无法正确解码的指示。

公开(公告)号：US20140189461A1

公开(公告)日：2014-07-03

申请号：US13733847

申请日：2013-01-03

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Roy D. Cideciyan ,  Robert A. Hutchins ,  Thomas Mittelholzer ,  Keisuke Tanaka

IPC分类号： H04L1/00

CPC分类号： G06F11/1012 ,  G11B7/007 ,  G11B20/1809 ,  G11B20/1833 ,  G11B20/1866 ,  G11B2020/1836 ,  H03M13/03 ,  H03M13/09 ,  H03M13/1102 ,  H03M13/1515 ,  H03M13/2909 ,  H03M13/2924 ,  H03M13/293 ,  H03M13/356 ,  H03M13/373 ,  H03M13/3746 ,  H04L1/0061

摘要： In one embodiment, a method includes receiving a headerized SDS protected by unequal error protection; decoding a header from the headerized SDS and removing an impact of the header from C1 row parity to obtain a SDS; for a number of iterations: performing C2 column decoding, for no more than a number of interleaves in each row of the SDS: overwriting a number of columns with successfully decoded C2 codewords, erasing a number of C2 codewords, and maintaining remaining columns as uncorrected, performing C1 row decoding; for no more than a number of interleaves in each row of the SDS: overwriting a number of rows with successfully decoded C1 codewords, erasing a number of C1 codewords, and maintaining remaining rows as uncorrected; and outputting the SDS when all rows include only C1 codewords and all columns include only C2 codewords; otherwise, outputting indication that the SDS cannot be decoded properly.

摘要翻译： 在一个实施例中，一种方法包括接收由不相等的错误保护保护的标题化的SDS; 从标题化的SDS解码报头，并从C1行奇偶校验中消除报头的影响以获得SDS; 对于多次迭代：执行C2列解码，在SDS的每行中不超过多个交织：用成功解码的C2码字重写多个列，擦除多个C2码字，并将剩余列保持为未校正 执行C1行解码; 在SDS的每一行中不超过多个交织：用成功解码的C1码字重写多行，擦除多个C1码字，并将剩余行维持为未校正; 并且当所有行仅包括C1码字时输出SDS，并且所有列仅包括C2码字; 否则，输出SDS无法正确解码的指示。

公开(公告)号：US20130318417A1

公开(公告)日：2013-11-28

申请号：US13957639

申请日：2013-08-02

申请人： Cisco Technology, Inc.

发明人： Markus Danninger ,  Paul Presslein ,  Theodor Kupfer

IPC分类号： H03M13/29

CPC分类号： H03M13/29 ,  H03M13/15 ,  H03M13/1515 ,  H03M13/152 ,  H03M13/2732 ,  H03M13/2924 ,  H04L1/0071

摘要： This invention relates to a receiver circuit which comprises an equalizer (27) and an error decorrelator (25). The error decorrelator being configured for changing (501; 601, 602) the position of symbols. The invention further relates to a corresponding method. This invention finally relates to an interleaving or deinterleaving method which comprises selecting a first number of symbols (204; 302) within a stream of digital data (13; 28) thereby obtaining selected symbols. The method further comprises exchanging (601, 602) the position of at least half of said first number of symbols of said selected symbols with the position of other symbols from said selected symbols. The invention further relates to an interleaving or deinterleaving circuit.

摘要翻译： 本发明涉及一种包括均衡器（27）和误差解相关器（25）的接收机电路。 错误解相关器被配置为改变（501; 601,602）符号的位置。 本发明还涉及相应的方法。 本发明最终涉及交织或解交织方法，其包括在数字数据流（13; 28）内选择第一数量的符号（204; 302），从而获得所选择的符号。 该方法还包括将所述选定符号的所述第一数量的符号的至少一半的位置与所述所选符号的其他符号的位置交换（601,602）。 本发明还涉及交错或解交织电路。

公开(公告)号：US08555132B2

公开(公告)日：2013-10-08

申请号：US11924397

申请日：2007-10-25

申请人： Markus Danninger ,  Paul Presslein ,  Theodor Kupfer

发明人： Markus Danninger ,  Paul Presslein ,  Theodor Kupfer

IPC分类号： H03M13/27 ,  H03M13/53

CPC分类号： H03M13/29 ,  H03M13/15 ,  H03M13/1515 ,  H03M13/152 ,  H03M13/2732 ,  H03M13/2924 ,  H04L1/0071

摘要： This invention relates to a receiver circuit which comprises an equalizer (27) and an error decorrelator (25). The error decorrelator being configured for changing (501; 601, 602) the position of symbols. The invention further relates to a corresponding method. This invention finally relates to an interleaving or deinterleaving method which comprises selecting a first number of symbols (204; 302) within a stream of digital data (13; 28) thereby obtaining selected symbols. The method further comprises exchanging (601, 602) the position of at least half of said first number of symbols of said selected symbols with the position of other symbols from said selected symbols. The invention further relates to an interleaving or deinterleaving circuit.

摘要翻译： 本发明涉及一种包括均衡器（27）和误差解相关器（25）的接收器电路。 错误解相关器被配置为改变（501; 601,602）符号的位置。 本发明还涉及相应的方法。 本发明最终涉及交织或解交织方法，其包括在数字数据流（13; 28）内选择第一数量的符号（204; 302），从而获得所选择的符号。 该方法还包括将所述选定符号的所述第一数量的符号的至少一半的位置与所述所选符号的其他符号的位置交换（601,602）。 本发明还涉及交错或解交织电路。

公开(公告)号：US06961879B1

公开(公告)日：2005-11-01

申请号：US09578217

申请日：2000-05-23

申请人： Li-Huan Jen

发明人： Li-Huan Jen

IPC分类号： G06F11/00 ,  H03M13/00 ,  H03M13/15 ,  H03M13/29

CPC分类号： H03M13/2927 ,  H03M13/15 ,  H03M13/2924

摘要： A method and system are disclosed for counting error rates occurring within an optical compact disk system as data is read from an optically encoded compact disk. In a preferred embodiment error flag data are generated as errors occur within the optical compact disk system. From the error flag data, error flag bits corresponding to errors in reading information from an optically encoded disk are identified for further processing. Further processing includes, among other things, generating an error rate over a predetermined time period. The operation of some or all of the functions within the optical compact disk system may be interrupted upon the exceeding of a predetermined threshold error rate. From the error rate information, the hardware, software and firmware within the optical compact disk system may be optimized for increased performance.

摘要翻译： 公开了一种方法和系统，用于计算在从光学编码的光盘读取数据时在光学光盘系统内发生的错误率。 在优选实施例中，当光学光盘系统内发生错误时，产生错误标志数据。 从错误标志数据中，识别与从光学编码盘读取信息中的错误对应的错误标志位，用于进一步处理。 除其他之外，进一步处理包括在预定时间段内产生错误率。 在超过预定阈值错误率的情况下，可能会中断在光学光盘系统内的一些或所有功能的操作。 根据错误率信息，可以优化光学光盘系统内的硬件，软件和固件以提高性能。

公开(公告)号：US06912682B1

公开(公告)日：2005-06-28

申请号：US09831505

申请日：2000-09-08

申请人： Toru Aoki

发明人： Toru Aoki

IPC分类号： G11B20/18 ,  H03M13/15 ,  H03M13/27 ,  H03M13/29 ,  G11C29/00 ,  G11B5/09

CPC分类号： H03M13/6566 ,  G11B20/1833 ,  G11B20/1866 ,  H03M13/1515 ,  H03M13/2924 ,  H03M13/2927

摘要： A signal processor performs error correction on data which has been subjected to predetermined signal processing, for each predetermined block unit, by an error correction block, in parallel with an operation of sequentially storing the data in a cache memory. Then, error detection is performed on the data for each predetermined block unit by a descrambling/error detection block, and the data is stored in a buffer memory. Based on the results of the error detection and the error correction, when there exists some error in the data, the data with the error, which is stored in the buffer memory, is read out to be subjected to error correction again. When there is no error, the data corresponding to one block and stored in the buffer memory is transmitted to a host computer without performing error correction again.

摘要翻译： 信号处理器对与数据顺序地存储在高速缓冲存储器中的操作并行地对纠错块执行针对每个预定块单元的预定信号处理的数据进行纠错。 然后，通过解扰/错误检测块对每个预定块单元的数据执行错误检测，并将数据存储在缓冲存储器中。 基于错误检测和纠错的结果，当数据存在一些错误时，读出存储在缓冲存储器中的具有错误的数据再次进行错误校正。 当没有错误时，对应于一个块并存储在缓冲存储器中的数据被发送到主计算机，而不再次进行纠错。

公开(公告)号：US20040073852A1

公开(公告)日：2004-04-15

申请号：US10467339

申请日：2003-08-21

发明人： Yoichiro Sako ,  Tatsuya Inokuchi ,  Shunsuke Furukawa ,  Takashi Kihara

IPC分类号： H04L001/22

CPC分类号： G11B20/1833 ,  G11B20/00086 ,  G11B20/0021 ,  G11B20/00253 ,  G11B20/00282 ,  G11B20/00369 ,  G11B20/00579 ,  G11B20/00731 ,  H03M13/2924

摘要： A recording medium on which at least one piece of data that has been encoded with a first error correction code and data that can be decoded with the first error correction code and that can be decoded with a second error correction code that is different from the first error correction code.

摘要翻译： 一种记录介质，其上已经用第一纠错码编码的至少一条数据和可以用第一纠错码解码的数据，并且可以用与第一纠错码不同的第二纠错码进行解码 纠错码。

公开(公告)号：US06243845B1

公开(公告)日：2001-06-05

申请号：US09098095

申请日：1998-06-16

申请人： Yuichiro Tsukamizu ,  Shinichiro Tomisawa

发明人： Yuichiro Tsukamizu ,  Shinichiro Tomisawa

IPC分类号： G11C2900

CPC分类号： H03M13/2924 ,  G11B20/10527 ,  G11B20/1833 ,  G11B2020/1062 ,  H03M13/151 ,  H03M13/2921

摘要： An error correcting and detecting apparatus for a CD-ROM or DVD system executes a high speed decode process. The apparatus includes an input interface, a temporary memory, a correcting circuit, a detecting circuit, a principal memory, and an output interface. The input interface fetches digital data in a block by block manner. The temporary memory stores the fetched digital data in a block by block manner. The correcting circuit performs error correction on digital data read from the temporary memory in a block by block manner using the error correction code and rewrites erroneous digital data to the temporary memory with the corrected digital data. The detecting circuit performs error detection on the error corrected digital data and supplied from the temporary memory in a block by block manner using the error detection code and sets an error flag based on a detection result. The principal memory stores, in a block by block manner, the error corrected digital data supplied to the detecting circuit from the temporary memory. The output interface transfers the error corrected digital data stored in the principal memory to an external unit.

摘要翻译： 用于CD-ROM或DVD系统的纠错和检测装置执行高速解码处理。 该装置包括输入接口，临时存储器，校正电路，检测电路，主存储器和输出接口。 输入接口以块的方式取出数字数据。 临时存储器以逐块方式存储所读取的数字数据。 校正电路使用纠错码以逐块方式对从临时存储器读取的数字数据执行纠错，并用经校正的数字数据将错误的数字数据重写到临时存储器。 检测电路对误差校正后的数字数据执行错误检测，并使用错误检测码逐块地从临时存储器提供，并根据检测结果设置错误标志。 主存储器以块的方式存储从临时存储器提供给检测电路的纠错数字数据。 输出接口将存储在主存储器中的纠错数字数据传送到外部单元。

公开(公告)号：US6047395A

公开(公告)日：2000-04-04

申请号：US16563

申请日：1998-01-30

申请人： Christopher P. Zook

发明人： Christopher P. Zook

IPC分类号： G11B20/18 ,  H03M13/15 ,  H03M13/29 ,  H03M13/00

CPC分类号： H03M13/154 ,  G11B20/1833 ,  H03M13/158 ,  H03M13/29 ,  H03M13/2909 ,  H03M13/2924 ,  H03M13/293 ,  G11B20/18

摘要： An error correction processor is disclosed for correcting errors in binary data read from a disk storage medium, wherein the binary data comprises a first and second set of intersecting ECC codewords of a multi-dimensional codeword. The error correction processor comprises a data buffer for storing the ECC codewords read from the disk storage medium; a syndrome generator for generating ECC syndromes in response to a codeword in the second set; an error-locator polynomial generator for generating an error locator polynomial .sigma.(x) in response to the ECC syndromes; a selector for selecting between the error-locator polynomial .sigma.(x) and an erasure polynomial .sigma.(x).sub.EP, wherein:(i) the erasure polynomial .sigma.(x).sub.EP is generated while processing the first set codewords; and(ii) the erasure polynomial .sigma.(x).sub.EP is used to correct at least two codewords in the second set; andan error corrector for generating correction values in response to either the error-locator polynomial .sigma.(x) or the erasure polynomial .sigma.(x).sub.EP output by the selector, the correction values for correcting errors in the codeword in the second set.

摘要翻译： 公开了一种用于校正从盘存储介质读取的二进制数据中的错误的纠错处理器，其中二进制数据包括多维码字的第一和第二组相交ECC码字。 纠错处理器包括用于存储从盘存储介质读取的ECC码字的数据缓冲器; 用于响应于第二组中的码字生成ECC综合征的校正子发生器; 一个误差定位器多项式发生器，用于响应ECC校验子产生误差定位多项式sigma（x）; 用于在误差定位多项式sigma（x）和擦除多项式sigma（x）EP之间进行选择的选择器，其中：（i）在处理第一集合码字时产生擦除多项式sigma（x）EP; 和（ii）擦除多项式sigma（x）EP用于校正第二组中的至少两个码字; 以及用于响应于由选择器输出的误差定位多项式sigma（x）或擦除多项式sigma（x）EP）产生校正值的纠错器，用于校正第二组中码字中的错误的校正值。