公开(公告)号：US20230207307A1

公开(公告)日：2023-06-29

申请号：US17906733

申请日：2021-04-01

Applicant: SHIN-ETSU CHEMICAL CO., LTD.

Inventor： Shoji AKIYAMA

IPC: H01L21/02 ,  H01L21/225 ,  H01L21/304 ,  H01L21/762 ,  H01L23/00

CPC classification number: H01L21/02123 ,  H01L21/02255 ,  H01L21/02439 ,  H01L21/2253 ,  H01L21/304 ,  H01L21/76262 ,  H01L24/05 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2924/1068 ,  C30B29/30

Abstract: Provided are a composite substrate in which a wafer to be bonded has a sufficiently small surface roughness and which can be prevented from causing film peeling, and a method for producing the composite substrate. The composite substrate 40 of the present invention has a silicon wafer 10, an interlayer 11, and a single-crystal silicon thin film or oxide single-crystal thin film 20a stacked in the order listed and has a damaged layer 12a in a portion of the silicon wafer 10 on the side of the interlayer 11.

公开(公告)号：US20120159778A1

公开(公告)日：2012-06-28

申请号：US13330422

申请日：2011-12-19

Applicant: Hans Krueger ,  Alexander Schmajew ,  Alois Stelzl

Inventor： Hans Krueger ,  Alexander Schmajew ,  Alois Stelzl

IPC: H05K3/36

CPC classification number: H01L24/94 ,  B81B7/007 ,  B81B2207/098 ,  H01L24/24 ,  H01L24/82 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/24011 ,  H01L2224/24051 ,  H01L2224/24147 ,  H01L2224/24991 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06551 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01068 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1068 ,  H01L2924/14 ,  H01L2924/1461 ,  Y10T29/49126 ,  H01L2224/81 ,  H01L2224/82

Abstract: A plurality of unpackaged substrates connected to one another is disclosed. The stepped structures on and/or in a first main area of a first substrate include a plurality of integrated circuits. The stepped structures run between the integrated circuits. The first conductor tracks extend from at least some contact connections of the respective integrated circuits as far as the stepped structures. The first substrate is connected on the side of the first main area to a further substrate. The first substrate is severed from a second main area opposite to the first main area such that the first substrate is divided into a plurality of substrate pieces. Each substrate piece has one of the integrated circuits. The first conductor tracks are accessible in interspaces between the substrate pieces. The second conductor tracks are formed from the second main area. At least some of the second conductor tracks lead from the second main area over side walls of the substrate pieces as far as the first conductor tracks.

Abstract translation: 公开了彼此连接的多个未封装的基板。 第一基板的第一主区域和/或第一主区域中的阶梯结构包括多个集成电路。 阶梯式结构在集成电路之间运行。 第一导体轨道从各个集成电路的至少一些接触连接延伸到阶梯式结构。 第一基板在第一主区域的一侧连接到另一基板。 第一基板从与第一主区域相对的第二主区域切断，使得第一基板被分成多个基板块。 每个衬底片具有一个集成电路。 第一导体轨迹可在基片之间的间隙中接近。 第二导体轨道由第二主区域形成。 至少一些第二导体轨道从第二主区域超过衬底片的侧壁延伸，直到第一导体轨迹。

公开(公告)号：US20170236800A1

公开(公告)日：2017-08-17

申请号：US15519203

申请日：2015-10-14

Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES

Inventor： Paul GONDCHARTON ,  Lamine BENAISSA ,  Bruno IMBERT

IPC: H01L23/00

CPC classification number: H01L24/83 ,  H01L21/187 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L2224/2745 ,  H01L2224/278 ,  H01L2224/29082 ,  H01L2224/29124 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29166 ,  H01L2224/2918 ,  H01L2224/29186 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/83054 ,  H01L2224/83092 ,  H01L2224/83099 ,  H01L2224/83193 ,  H01L2224/83895 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/10253 ,  H01L2924/1068 ,  H01L2924/20102 ,  H01L2924/00014

Abstract: A method for assembling a first substrate and a second substrate via metal adhesion layers, the method including: depositing, on a surface of each of the first and second substrates, a metal layer with a thickness controlled to limit surface roughness of each of the deposited metal layers to below a roughness threshold; exposing the metal layers deposited on the surface of the first and second substrates to air; directly adhering the first and second substrates by placing the deposited metal adhesion layers in contact, the surface roughness of the contacted layers being that obtained at an end of the depositing. The adhesion can be carried out in the air, at atmospheric pressure and at room temperature, without applying pressure to the assembly of the first and second substrates resulting from directly contacting the deposited metal adhesion layers.

公开(公告)号：US09165905B2

公开(公告)日：2015-10-20

申请号：US13330422

申请日：2011-12-19

Applicant: Hans Krueger ,  Alexander Schmajew ,  Alois Stelzl

Inventor： Hans Krueger ,  Alexander Schmajew ,  Alois Stelzl

IPC: H05K3/02 ,  H05K3/10 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  B81B7/00

CPC classification number: H01L24/94 ,  B81B7/007 ,  B81B2207/098 ,  H01L24/24 ,  H01L24/82 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/24011 ,  H01L2224/24051 ,  H01L2224/24147 ,  H01L2224/24991 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06551 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01068 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1068 ,  H01L2924/14 ,  H01L2924/1461 ,  Y10T29/49126 ,  H01L2224/81 ,  H01L2224/82

Abstract: A plurality of unpackaged substrates connected to one another is disclosed. The stepped structures on and/or in a first main area of a first substrate include a plurality of integrated circuits. The stepped structures run between the integrated circuits. The first conductor tracks extend from at least some contact connections of the respective integrated circuits as far as the stepped structures. The first substrate is connected on the side of the first main area to a further substrate. The first substrate is severed from a second main area opposite to the first main area such that the first substrate is divided into a plurality of substrate pieces. Each substrate piece has one of the integrated circuits. The first conductor tracks are accessible in interspaces between the substrate pieces. The second conductor tracks are formed from the second main area. At least some of the second conductor tracks lead from the second main area over side walls of the substrate pieces as far as the first conductor tracks.

Abstract translation: 公开了彼此连接的多个未封装的基板。 第一基板的第一主区域和/或第一主区域中的阶梯结构包括多个集成电路。 阶梯式结构在集成电路之间运行。 第一导体轨道从各个集成电路的至少一些接触连接延伸到阶梯式结构。 第一基板在第一主区域的一侧连接到另一基板。 第一基板从与第一主区域相对的第二主区域切断，使得第一基板被分成多个基板块。 每个衬底片具有一个集成电路。 第一导体轨迹可在基片之间的间隙中接近。 第二导体轨道由第二主区域形成。 至少一些第二导体轨道从第二主区域超过衬底片的侧壁延伸，直到第一导体轨迹。