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    Systems and methods for enabling virtual environments to mount non-native storage disks
    2.
    发明授权
    Systems and methods for enabling virtual environments to mount non-native storage disks 有权
    支持虚拟环境安装非本地存储磁盘的系统和方法

    公开(公告)号：US09336131B1

    公开(公告)日：2016-05-10

    申请号：US13863886

    申请日：2013-04-16

    Applicant: Symantec Corporation

    Inventor： Check Sabjan ,  Lokesha Krishnamurthy

    IPC: G06F12/02

    CPC classification number: G06F12/02 ,  G06F11/00 ,  G06F11/1446 ,  G06F2212/00 ,  G06F2212/15 ,  G06F2212/152

    Abstract: A computer-implemented method for enabling virtual environments to mount non-native storage disks may include (1) identifying a storage disk formatted in a format that is non-native to a virtual environment, (2) locating disk information of the storage disk that includes (i) a plurality of non-native partition table entries and (ii) a partition table pointer that points to the non-native partition table entries, and then (3) modifying the disk information to enable the virtual environment to mount the storage disk as though the storage disk were formatted in a format that is native to the virtual environment by (i) adding a plurality of native partition table entries that identify the plurality of volumes within the storage disk and then (ii) modifying the partition table pointer to point to the native partition table entries instead of the non-native partition table entries. Various other methods, systems, and computer-readable media are also disclosed.

    Abstract translation: 用于使虚拟环境能够安装非本地存储磁盘的计算机实现的方法可以包括（1）识别以虚拟环境非本地格式格式化的存储盘，（2）定位存储盘的磁盘信息， 包括（i）多个非本机分区表条目和（ii）指向非本地分区表条目的分区表指针，然后（3）修改磁盘信息以使虚拟环境能够安装存储 就像通过（i）添加多个本地分区表条目来标识存储盘中的多个卷，然后（ii）修改分区表指针 指向本机分区表条目，而不是非本机分区表条目。 还公开了各种其它方法，系统和计算机可读介质。

    Method, system and apparatus including logic to manage multiple memories as a unified exclusive memory
    3.
    发明授权
    Method, system and apparatus including logic to manage multiple memories as a unified exclusive memory 有权
    方法，系统和装置包括将多个存储器作为统一排他性存储器来管理的逻辑

    公开(公告)号：US09424198B2

    公开(公告)日：2016-08-23

    申请号：US13691107

    申请日：2012-11-30

    Applicant: Intel Corporation

    Inventor： Shlomo Raikin ,  Zvika Greenfield

    IPC: G06F12/08 ,  G06F12/06

    CPC classification number: G06F12/0893 ,  G06F12/0646 ,  G06F12/0864 ,  G06F12/0888 ,  G06F2212/15

    Abstract: A processor includes at least one execution unit, a near memory, and memory management logic to manage the near memory and a far memory external to the processor as a unified exclusive memory. Each of a plurality of data blocks may be exclusively stored in either the far memory or the near memory. The unified exclusive memory space may be divided into a plurality of sets and a plurality of ways. In response to a request for a first block stored in the far memory, the memory management logic may move the first block from the far memory to the near memory, and may move a second block from the near memory to the far memory. A tag buffer may store tags associated with blocks being moved between the near memory and the far memory. Fill and drain buffers may also be used. Other implementations are described and claimed.

    Abstract translation: 处理器包括至少一个执行单元，近存储器和存储器管理逻辑，用于将近端存储器和作为统一独占存储器的处理器外部的远处存储器进行管理。 多个数据块中的每一个可以专门存储在远存储器或近存储器中。 统一的独占存储器空间可以被分成多个集合和多个方式。 响应于对存储在远存储器中的第一块的请求，存储器管理逻辑可以将第一块从远存储器移动到近存储器，并且可以将第二块从近存储器移动到远存储器。 标签缓冲器可以存储与在近存储器和远存储器之间移动的块相关联的标签。 也可以使用填充和排出缓冲液。 描述和要求保护其他实现。

    Memory control device, memory control method, data processing device, and image processing system
    4.
    发明授权
    Memory control device, memory control method, data processing device, and image processing system 有权
    存储控制装置，存储器控制方法，数据处理装置和图像处理系统

    公开(公告)号：US09183131B2

    公开(公告)日：2015-11-10

    申请号：US14531787

    申请日：2014-11-03

    Applicant: RENESAS ELECTRONICS CORPORATION

    Inventor： Yasuyuki Ninomiya

    IPC: G06F12/02 ,  G06F13/28 ,  G06F15/80

    CPC classification number: G06F12/0238 ,  G06F12/0223 ,  G06F12/0292 ,  G06F13/28 ,  G06F15/8007 ,  G06F2212/15 ,  Y02D10/14

    Abstract: A memory control device that transfers data from an external memory to a data processing unit having plural processing mechanisms, includes an absolute address storage unit that stores an absolute address serving as a common reference value in a given data transfer period; a differential address storage unit that stores plural differential addresses therein; a differential address selection unit that selects any one of the plurality of differential addresses in a given order; a memory address generation unit that combines any differential address selected by the differential address selection unit with the absolute address to generate a memory address; and a data transfer unit that inputs the memory address generated by the memory address generation unit to the external memory, reads the data from the memory address, and transfers the data to the data processing unit.

    Abstract translation: 一种将数据从外部存储器传送到具有多个处理机构的数据处理单元的存储器控​​制装置，包括绝对地址存储单元，其在给定数据传送期间存储用作公共参考值的绝对地址; 差分地址存储单元，其中存储多个差分地址; 差分地址选择单元，以给定的顺序选择所述多个差分地址中的任何一个; 存储器地址生成单元，其将由差分地址选择单元选择的任何差分地址与绝对地址组合以产生存储器地址; 以及数据传送单元，其将由存储器地址生成单元生成的存储器地址输入到外部存储器，从存储器地址读取数据，并将数据传送到数据处理单元。

    MEMORY CONTROL DEVICE, MEMORY CONTROL METHOD, DATA PROCESSING DEVICE, AND IMAGE PROCESSING SYSTEM
    5.
    发明申请
    MEMORY CONTROL DEVICE, MEMORY CONTROL METHOD, DATA PROCESSING DEVICE, AND IMAGE PROCESSING SYSTEM 有权

    公开(公告)号：US20130097393A1

    公开(公告)日：2013-04-18

    申请号：US13619448

    申请日：2012-09-14

    Applicant: Yasuyuki NINOMIYA

    Inventor： Yasuyuki NINOMIYA

    IPC: G06F12/00

    CPC classification number: G06F12/0238 ,  G06F12/0223 ,  G06F12/0292 ,  G06F13/28 ,  G06F15/8007 ,  G06F2212/15 ,  Y02D10/14

    Abstract: A memory control device that transfers data from an external memory to a data processing unit having plural processing mechanisms, includes an absolute address storage unit that stores an absolute address serving as a common reference value in a given data transfer period; a differential address storage unit that stores plural differential addresses therein; a differential address selection unit that selects any one of the plurality of differential addresses in a given order; a memory address generation unit that combines any differential address selected by the differential address selection unit with the absolute address to generate a memory address; and a data transfer unit that inputs the memory address generated by the memory address generation unit to the external memory, reads the data from the memory address, and transfers the data to the data processing unit.

    Memory control and data processing using memory address generation based on differential addresses
    8.
    发明授权
    Memory control and data processing using memory address generation based on differential addresses 有权
    使用基于差分地址的存储器地址生成的存储器控​​制和数据处理

    公开(公告)号：US08880848B2

    公开(公告)日：2014-11-04

    申请号：US13619448

    申请日：2012-09-14

    Applicant: Yasuyuki Ninomiya

    Inventor： Yasuyuki Ninomiya

    IPC: G06F12/02 ,  G06F13/28

    CPC classification number: G06F12/0238 ,  G06F12/0223 ,  G06F12/0292 ,  G06F13/28 ,  G06F15/8007 ,  G06F2212/15 ,  Y02D10/14

    Abstract: A memory control device that transfers data from an external memory to a data processing unit having plural processing mechanisms, includes an absolute address storage unit that stores an absolute address serving as a common reference value in a given data transfer period; a differential address storage unit that stores plural differential addresses therein; a differential address selection unit that selects any one of the plurality of differential addresses in a given order; a memory address generation unit that combines any differential address selected by the differential address selection unit with the absolute address to generate a memory address; and a data transfer unit that inputs the memory address generated by the memory address generation unit to the external memory, reads the data from the memory address, and transfers the data to the data processing unit.

    Abstract translation: 一种将数据从外部存储器传送到具有多个处理机构的数据处理单元的存储器控​​制装置，包括绝对地址存储单元，其在给定数据传送期间存储用作公共参考值的绝对地址; 差分地址存储单元，其中存储多个差分地址; 差分地址选择单元，以给定的顺序选择所述多个差分地址中的任何一个; 存储器地址生成单元，其将由差分地址选择单元选择的任何差分地址与绝对地址组合以产生存储器地址; 以及数据传送单元，其将由存储器地址生成单元生成的存储器地址输入到外部存储器，从存储器地址读取数据，并将数据传送到数据处理单元。

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