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    Arbitration allocating requests during backpressure
    1.
    发明授权
    Arbitration allocating requests during backpressure 有权

    公开(公告)号：US11886367B2

    公开(公告)日：2024-01-30

    申请号：US17545930

    申请日：2021-12-08

    申请人： ATI Technologies ULC

    发明人： Michael E. McLean ,  Philip Ng

    IPC分类号： G06F13/372 ,  G06F13/364 ,  G06F9/48 ,  G06F13/40 ,  G06F13/366

    CPC分类号： G06F13/372 ,  G06F9/4812 ,  G06F13/364 ,  G06F13/366 ,  G06F13/4059

    摘要： An arbitration system receives requests to access a destination during an arbitration window that spans multiple processor clock cycles. During each clock cycle, the destination is monitored to determine whether the destination is suffering from backpressure by receiving more requests than the destination is able to accommodate during the clock cycle. In response to detecting backpressure, a masking index value assigned to a requesting source is incremented, which limits an amount of requests from the source that will be granted destination access during a subsequent arbitration window. Alternatively, in response to detecting an absence of backpressure during an arbitration window, the masking index value is decremented, which increases the amount of requests from the source that will be granted destination access during a subsequent arbitration window. This arbitration process continues for successive arbitration windows, oscillating between incrementing and decrementing the masking index value during the successive arbitration windows.

    Penalty based arbitration
    2.
    发明授权
    Penalty based arbitration 有权

    公开(公告)号：US11868292B1

    公开(公告)日：2024-01-09

    申请号：US17656710

    申请日：2022-03-28

    申请人： Amazon Technologies, Inc.

    发明人： Lev Vaskevich ,  Noam Katz

    IPC分类号： G06F13/366 ,  G06F9/50

    CPC分类号： G06F13/366 ,  G06F9/5033

    摘要： A plurality of resource requesters may be configured to consume a resource to perform a task. Each of the plurality of resource requesters can be allocated a resource budget to consume the resource to perform the task. An arbiter can select one of the plurality of resource requesters to consume the resource based on an arbitration scheme. When a resource requester is selected, the amount of resource consumed by the resource requester can be deducted from its resource budget. When the resource requester is idle for a number of cycles when selected, the corresponding resource budget can be further reduced to account for the actual amount of resource consumed and wasted by the resource requester, which can provide fairness in resource consumption over few rounds of arbitration.

    APPARATUS AND ASSOCIATED METHOD
    4.
    发明申请
    APPARATUS AND ASSOCIATED METHOD 审中-公开

    公开(公告)号：US20180081841A1

    公开(公告)日：2018-03-22

    申请号：US15647874

    申请日：2017-07-12

    申请人： NXP B.V.

    发明人： Evert-Jan Pol

    IPC分类号： G06F13/362 ,  G06F13/366

    CPC分类号： G06F13/3625 ,  G06F13/1642 ,  G06F13/366

    摘要： An apparatus comprising: a plurality of processors, a data bus, shared by the plurality of processors, and configured to at least receive data processed by each of the plurality of processors when performing predetermined tasks, the plurality of processors and data bus comprising at least part of a hardware based real-time computing system; a controller configured to provide for control of a maximum data rate at which data is provided to the data bus for transmission thereover by at least one of the plurality of processors in performing at least one of the predetermined tasks, wherein the controller is configured to provide for a maximum data rate at least comprising an impeded rate for the at least one predetermined tasks and an unimpeded rate wherein the impeded rate is less than the unimpeded rate.

    ACCESSING STATUS INFORMATION
    5.
    发明申请
    ACCESSING STATUS INFORMATION 审中-公开

    公开(公告)号：US20180032458A1

    公开(公告)日：2018-02-01

    申请号：US15220177

    申请日：2016-07-26

    申请人： Micron Technology, Inc.

    发明人： Debra M. Bell

    IPC分类号： G06F13/366 ,  G06F13/28 ,  G06F13/24

    CPC分类号： G06F13/366 ,  G06F11/00 ,  G06F13/1668 ,  G06F13/24 ,  G06F13/287 ,  G11C7/00 ,  G11C7/24

    摘要： The present disclosure includes apparatuses and methods related to accessing status information. One example apparatus comprises a host and a memory device coupled to the host. The memory device includes a controller configured to provide, to a status arbiter, a status signal indicating whether a status register of the controller contains generated status information. Responsive to the status signal indicating that the status register contains the generated status information, the controller can also provide the status information from the controller to the status arbiter via a status intermediary.

    Arbitration monitoring for serial attached small computer system interface systems during discovery
    7.
    发明授权
    Arbitration monitoring for serial attached small computer system interface systems during discovery 有权
    发现期间连接小型计算机系统接口系统的仲裁监控

    公开(公告)号：US09542348B2

    公开(公告)日：2017-01-10

    申请号：US14248171

    申请日：2014-04-08

    申请人： LSI CORPORATION

    发明人： Reid A. Kaufmann ,  Charles D. Henry ,  Jeffrey D. Weide ,  James A. Seely

    IPC分类号： G06F13/40 ,  G06F13/366 ,  G06F3/06

    CPC分类号： G06F13/4045 ,  G06F3/06 ,  G06F13/366 ,  G06F13/4022 ,  G06F13/4031

    摘要： Methods and structure for detecting that arbitration is delaying discovery. One embodiment is a Serial Attached Small Computer System Interface (SAS) expander. The SAS expander includes multiple SAS ports, a port monitor, and a controller. The port monitor is able to track physical link events during arbitration for at least one of the ports while discovery is in progress at the expander, and to detect based on the physical link events that arbitration is delaying discovery. The controller is able to prioritize discovery requests at the expander responsive to detecting that arbitration is delaying discovery.

    摘要翻译： 检测仲裁延迟发现的方法和结构。 一个实施例是串行连接小型计算机系统接口（SAS）扩展器。 SAS扩展器包括多个SAS端口，端口监视器和控制器。 端口监视器能够在扩展器期间发现正在进行的至少一个端口的仲裁期间跟踪物理链路事件，并且基于仲裁延迟发现的物理链路事件来检测。 控制器能够根据检测到仲裁延迟发现来对扩展器的发现请求进行优先级排序。

    MEMORY CONTROLLER, INFORMATION PROCESSING APPARATUS, AND METHOD OF CONTROLLING MEMORY CONTROLLER
    8.
    发明申请
    MEMORY CONTROLLER, INFORMATION PROCESSING APPARATUS, AND METHOD OF CONTROLLING MEMORY CONTROLLER 有权
    记忆控制器，信息处理装置和控制存储器控制器的方法

    公开(公告)号：US20150149675A1

    公开(公告)日：2015-05-28

    申请号：US14542730

    申请日：2014-11-17

    申请人： FUJITSU LIMITED

    发明人： Yuta Toyoda ,  Koji HOSOE ,  AKIO TOKOYODA ,  Masatoshi Aihara ,  Makoto SUGA

    IPC分类号： G06F13/16 ,  G06F13/366

    CPC分类号： G06F13/1605 ,  G06F13/161 ,  G06F13/366

    摘要： A memory controller has a request holding unit holding a write request and a read request; a transmission unit transmitting any one of the write request and the read request to a memory through a transmission bus; a reception unit receiving read data corresponding to the read request through a reception bus; and a request arbitration unit performing: a first processing of transmitting the write request before the read request, when a first reception time is not later than a second reception time, and a second processing of transmitting the read request before the write request, when the first reception time is later than the second reception time. The first reception time is when reception of the read data is started when the write request is transmitted first, and the second reception time is when the reception of the read data is started when the read request is transmitted first.

    摘要翻译： 存储器控制器具有保持写请求和读请求的请求保持单元; 发送单元，通过发送总线将写入请求和读取请求中的任一个发送到存储器; 接收单元，通过接收总线接收对应于读取请求的读取数据; 以及请求仲裁单元，执行：当第一接收时间不晚于第二接收时间时，在所述读取请求之前发送所述写入请求的第一处理，以及在所述写入请求之前发送所述读取请求的第二处理， 第一接收时间晚于第二接收时间。 第一接收时间是当首先发送写请求时开始读取数据的接收，并且第二接收时间是当首先发送读取请求时开始读取数据的接收。

    Unified system Networking with PCIE-CEE Tunneling
    9.
    发明申请
    Unified system Networking with PCIE-CEE Tunneling 有权
    具有PCIE-CEE隧道的统一系统网络

    公开(公告)号：US20140169381A1

    公开(公告)日：2014-06-19

    申请号：US14138697

    申请日：2013-12-23

    申请人： International Business Machines Corporation

    发明人： Casimer M. DeCusati ,  Rajaram B. Krishnamurthy

    IPC分类号： H04L12/46 ,  G06F13/366

    CPC分类号： H04L45/66 ,  G06F13/366 ,  G06F13/387 ,  G06F2213/0026 ,  H04L12/413 ,  H04L12/4633

    摘要： Peripheral Component Interconnect Express (PCIe) tunneling over Converged Enhanced Ethernet (CEE) networks. The CEE networks comprise devices configured to use PCIe. An initiating device initiates a command. The command is associated with initiator control signals, which are associated with the initiating device. The initiating device requests permission from an arbiter, and receives a request grant from the arbiter. Based on the request grant, a mapping device maps the initiator control signals, an target device address, and the command into a CEE control frame. Based on the mapping, the initiating device transmits an inquiry to the devices. Based on transmitting the inquiry, the initiating device receives a response from a corresponding device. The corresponding device is associated with the target device address. The response comprises target control signals associated with the corresponding device. Based on the response, the initiating device initiates a transaction to the corresponding device through CEE control frames.

    摘要翻译： 通过融合增强型以太网（CEE）网络的外围组件互连Express（PCIe）隧道。 CEE网络包括配置为使用PCIe的设备。 启动设备启动命令。 该命令与与启动设备相关联的启动器控制信号相关联。 启动设备请求仲裁器的许可，并从仲裁器接收请求许可。 基于请求授权，映射设备将发起者控制信号，目标设备地址和命令映射到CEE控制帧中。 基于映射，发起设备向设备发送查询。 基于发送查询，发起设备从对应的设备接收响应。 相应的设备与目标设备地址相关联。 响应包括与相应设备相关联的目标控制信号。 基于响应，启动设备通过CEE控制帧发起对相应设备的事务。

    Device security features supporting a distributed shared memory system
    10.
    发明授权
    Device security features supporting a distributed shared memory system 有权
    支持分布式共享内存系统的设备安全功能

    公开(公告)号：US08683114B2

    公开(公告)日：2014-03-25

    申请号：US13238989

    申请日：2011-09-21

    申请人： Joseph R. M. Zbiciak ,  Amitabh Menon

    发明人： Joseph R. M. Zbiciak ,  Amitabh Menon

    IPC分类号： G06F13/00

    CPC分类号： G06F12/1483 ,  G06F12/14 ,  G06F12/1425 ,  G06F12/1433 ,  G06F12/1441 ,  G06F12/1458 ,  G06F12/1491 ,  G06F13/366 ,  G06F21/78 ,  G06F21/79 ,  G06F2212/1052 ,  Y02D10/14

    摘要： A memory management and protection system that incorporates device security features that support a distributed, shared memory system. The concept of secure regions of memory and secure code execution is supported, and a mechanism is provided to extend a chain of trust from a known, fixed secure boot ROM to the actual secure code execution. Furthermore, the system keeps a secure address threshold that is only programmable by a secure supervisor, and will only allow secure access requests that are above this threshold.

    摘要翻译： 内存管理和保护系统，其中集成了支持分布式共享内存系统的设备安全功能。 支持存储器和安全代码执行的安全区域的概念，并且提供了一种机制来将信任链从已知的固定安全引导ROM扩展到实际的安全代码执行。 此外，系统保持仅由安全监督程序编程的安全地址阈值，并且将仅允许高于该阈值的安全访问请求。