公开(公告)号：US07850657B2

公开(公告)日：2010-12-14

申请号：US12651485

申请日：2010-01-04

Applicant: Yehoshua Yeshurun ,  Meir Hefetz ,  Meint de Boer ,  J.W. Berenschot ,  J.G.E. Gardeniers

Inventor： Yehoshua Yeshurun ,  Meir Hefetz ,  Meint de Boer ,  J.W. Berenschot ,  J.G.E. Gardeniers

IPC: A61M5/00

CPC classification number: B81C1/005 ,  A61M37/0015 ,  A61M2037/003 ,  A61M2037/0053 ,  B81B2203/0361

Abstract: A method for processing a wafer to form a plurality of hollow microneedles projecting from a substrate includes forming, by use of a dry etching process, a number of groups of recessed features, each including at least one slot deployed to form an open shape having an included area and at least one hole located within the included area. The internal surfaces of the holes and the slots are then coated with a protective layer. An anisotropic wet etching process is then performed in such a manner as to remove material from outside the included areas while leaving a projecting feature within each of the included areas. The protective layer is then removed to reveal the microneedles.

Abstract translation: 用于处理晶片以形成从基板突出的多个中空微针的方法包括通过使用干蚀刻工艺形成多个凹陷特征组，每组包括展开以形成具有 包括区域和位于所包含区域内的至少一个孔。 然后用保护层涂覆孔和槽的内表面。 然后以这样的方式进行各向异性湿法蚀刻工艺，以便在包含区域的外部移除材料，同时在每个所包含的区域内留下突出特征。 然后去除保护层以显露微针。

公开(公告)号：US08603920B2

公开(公告)日：2013-12-10

申请号：US12805569

申请日：2010-08-05

Applicant: Katsuhiko Kanamori ,  Masashi Totokawa ,  Hiroshi Tanaka

Inventor： Katsuhiko Kanamori ,  Masashi Totokawa ,  Hiroshi Tanaka

IPC: H01L21/302 ,  H01L21/461

CPC classification number: B81C1/005 ,  B81B2203/0136 ,  B81B2203/0315 ,  B81C1/00484 ,  B81C2201/0143 ,  H01L21/02532 ,  H01L21/02675 ,  H01L21/02691 ,  H01L21/32137

Abstract: A manufacturing method of a semiconductor device includes: irradiating a laser beam on a single crystal silicon substrate, and scanning the laser beam on the substrate so that a portion of the substrate is poly crystallized, wherein at least a part of a poly crystallized portion of the substrate is exposed on a surface of the substrate; and etching the poly crystallized portion of the substrate with an etchant. In this case, a process time is improved.

Abstract translation: 半导体器件的制造方法包括：将激光束照射在单晶硅衬底上，并且将衬底上的激光束扫描以使得衬底的一部分多晶化，其中至少部分多晶结晶部分 将衬底暴露在衬底的表面上; 并用蚀刻剂蚀刻基片的多晶化部分。 在这种情况下，处理时间得到改善。

公开(公告)号：US06533949B1

公开(公告)日：2003-03-18

申请号：US09677175

申请日：2000-10-02

Applicant: Yehoshua Yeshurun ,  Meir Hefetz ,  Meint de Boer ,  J. W. Berenschot ,  J. G. E. Gardeniers

Inventor： Yehoshua Yeshurun ,  Meir Hefetz ,  Meint de Boer ,  J. W. Berenschot ,  J. G. E. Gardeniers

IPC: A61M3700

CPC classification number: B81C1/005 ,  A61M37/0015 ,  A61M2037/003 ,  A61M2037/0053 ,  B81B2203/0361

Abstract: A method for processing a wafer to form a plurality of hollow microneedles projecting from a substrate includes forming, by use of a dry etching process, a number of groups of recessed features, each including at least one slot deployed to form an open shape having an included area and at least one hole located within the included area. The internal surfaces of the holes and the slots are then coated with a protective layer. An anisotropic wet etching process is then performed in such a manner as to remove material from outside the included areas while leaving a projecting feature within each of the included areas. The protective layer is then removed to reveal the microneedles.

Abstract translation: 用于处理晶片以形成从基板突出的多个中空微针的方法包括通过使用干蚀刻工艺形成多个凹陷特征组，每组包括展开以形成具有开口形状的开口形状的至少一个凹槽， 包括区域和位于所包含区域内的至少一个孔。 然后用保护层涂覆孔和槽的内表面。 然后以这样的方式进行各向异性湿法蚀刻工艺，以便在包含区域的外部移除材料，同时在每个所包含的区域内留下突出特征。 然后去除保护层以显露微针。

公开(公告)号：US08766381B2

公开(公告)日：2014-07-01

申请号：US13230035

申请日：2011-09-12

Applicant: Fabrice Casset ,  Lionel Cadix ,  Perceval Coudrain ,  Alexis Farcy ,  Laurent-Luc Chapelon ,  Yacine Felk ,  Pascal Ancey

Inventor： Fabrice Casset ,  Lionel Cadix ,  Perceval Coudrain ,  Alexis Farcy ,  Laurent-Luc Chapelon ,  Yacine Felk ,  Pascal Ancey

IPC: H01L29/06

CPC classification number: B81C1/00246 ,  B81B2201/014 ,  B81B2201/0235 ,  B81B2201/0271 ,  B81B2203/0353 ,  B81B2207/012 ,  B81C1/005 ,  G01P15/125 ,  G01P2015/082 ,  H01L2924/0002 ,  H03H3/0073 ,  H03H9/2426 ,  H01L2924/00

Abstract: The integrated circuit comprises a support substrate having opposite first and second main surfaces. A cavity passes through the support substrate and connects the first and second main surfaces. The integrated circuit comprises a device with a mobile element, the mobile element and a pair of associated electrodes of which are included in a cavity. An anchoring node of the mobile element is located at the level of the first main surface. The integrated circuit comprises a first elementary chip arranged at the level of the first main surface and electrically connected to the device with a mobile element.

Abstract translation: 集成电路包括具有相对的第一和第二主表面的支撑基板。 空腔通过支撑基板并连接第一和第二主表面。 集成电路包括具有移动元件的装置，移动元件和一对相关联的电极包括在空腔中。 移动元件的锚定节点位于第一主表面的水平面上。 集成电路包括布置在第一主表面的电平处的第一基本芯片，并与移动元件电连接到该装置。

公开(公告)号：US07648484B2

公开(公告)日：2010-01-19

申请号：US10362835

申请日：2001-08-28

Applicant: Yehoshua Yeshurun ,  Mier Hefetz ,  Meint De Boer ,  J. W. Berenschot ,  J. G. E. Gardeniers

Inventor： Yehoshua Yeshurun ,  Mier Hefetz ,  Meint De Boer ,  J. W. Berenschot ,  J. G. E. Gardeniers

IPC: A61M5/00

CPC classification number: B81C1/005 ,  A61M37/0015 ,  A61M2037/003 ,  A61M2037/0053 ,  B81B2203/0361

Abstract: A method for processing a wafer to form a plurality of hollow microneedles projecting from a substrate includes forming, by use of a dry etching process, a number of groups of recessed features, each including at least one slot deployed to form an open shape having an included area and at least one hole located within the included area. The internal surfaces of the holes and the slots are then coated with a protective layer. An anisotropic wet etching process is then performed in such a manner as to remove material from outside the included areas while leaving a projecting feature within each of the included areas. The protective layer is then removed to reveal the microneedles.

公开(公告)号：US07255800B1

公开(公告)日：2007-08-14

申请号：US10710984

申请日：2004-08-16

Applicant: Shekhar Bhansali ,  Abdu Rub Abdur ,  Sunny Kedia

Inventor： Shekhar Bhansali ,  Abdu Rub Abdur ,  Sunny Kedia

IPC: B44C1/22

CPC classification number: B81C1/005 ,  B81B2203/0353 ,  B81C1/00619 ,  B81C2201/0115 ,  B81C2201/0133 ,  B81C2201/0136 ,  H01L21/02052 ,  H01L21/3063

Abstract: The present invention illustrates a bulk silicon etching technique that yields straight sidewalls, through wafer structures in very short times using standard silicon wet etching techniques. The method of the present invention employs selective porous silicon formation and dissolution to create high aspect ratio structures with straight sidewalls for through wafer MEMS processing.

Abstract translation: 本发明示出了使用标准硅湿式蚀刻技术在非常短的时间内通过晶片结构产生直的侧壁的体硅蚀刻技术。 本发明的方法采用选择性多孔硅形成和溶解以产生具有用于晶片MEMS加工的直侧壁的高纵横比结构。

公开(公告)号：US20050029223A1

公开(公告)日：2005-02-10

申请号：US10362835

申请日：2001-08-28

Applicant: Yehoshua Yeshurun ,  Mier Hefetz ,  Meint De Boer ,  J. W. Berenschot ,  J. G. E. Gardeniers

Inventor： Yehoshua Yeshurun ,  Mier Hefetz ,  Meint De Boer ,  J. W. Berenschot ,  J. G. E. Gardeniers

IPC: B81C1/00 ,  A61M5/32 ,  A61M37/00 ,  B81B1/00 ,  H01B13/00

CPC classification number: B81C1/005 ,  A61M37/0015 ,  A61M2037/003 ,  A61M2037/0053 ,  B81B2203/0361

Abstract: A method for processing a wafer to form a plurality of hollow microneedles projecing from a substrate includes forming, by use of a dry etching process, a number of groups of recessed features, each including at least one slot deployed to form an open shape having an included area and at least one hole located within the included area. The internal surfaces of the holes and the slots are then coated with a protective layer. An anisotropic wet etching process is then performed in such a manner as to remove material from outside the included areas while leaving a projecting feature within each of the included areas. The protective layer is then removed to reveal the microneedles.

Abstract translation: 用于处理晶片以形成从衬底投射的多个中空微针的方法包括通过使用干蚀刻工艺形成多个凹陷特征组，每组包括展开以形成开放形状的至少一个槽， 包括区域和位于所包含区域内的至少一个孔。 然后用保护层涂覆孔和槽的内表面。 然后以这样的方式进行各向异性湿法蚀刻工艺，以便在包含区域的外部移除材料，同时在每个所包含的区域内留下突出特征。 然后去除保护层以显露微针。

公开(公告)号：US08454844B2

公开(公告)日：2013-06-04

申请号：US12958437

申请日：2010-12-02

Applicant: Yehoshua Yeshurun ,  Mier Hefetz ,  Meint De Boer ,  Erwin J W Berenschot ,  Hans Gardeniers

Inventor： Yehoshua Yeshurun ,  Mier Hefetz ,  Meint De Boer ,  Erwin J W Berenschot ,  Hans Gardeniers

IPC: C25F3/00

CPC classification number: B81C1/005 ,  A61M37/0015 ,  A61M2037/003 ,  A61M2037/0053 ,  B81B2203/0361

Abstract: A method for processing a wafer to form a plurality of hollow microneedles projecting from a substrate includes forming, by use of a dry etching process, a number of groups of recessed features, each including at least one slot deployed to form an open shape having an included area and at least one hole located within the included area. The internal surfaces of the holes and the slots are then coated with a protective layer. An anisotropic wet etching process is then performed in such a manner as to remove material from outside the included areas while leaving a projecting feature within each of the included areas. The protective layer is then removed to reveal the microneedles.

公开(公告)号：US20110073560A1

公开(公告)日：2011-03-31

申请号：US12958437

申请日：2010-12-02

Applicant: Yehoshua Yeshurun ,  Mier Hefetz ,  Meint De Boer ,  J.W. Berenschot ,  J.G.E. Gardeniers

Inventor： Yehoshua Yeshurun ,  Mier Hefetz ,  Meint De Boer ,  J.W. Berenschot ,  J.G.E. Gardeniers

IPC: B05D3/10

CPC classification number: B81C1/005 ,  A61M37/0015 ,  A61M2037/003 ,  A61M2037/0053 ,  B81B2203/0361

Abstract: A method for processing a wafer to form a plurality of hollow microneedles projecting from a substrate includes forming, by use of a dry etching process, a number of groups of recessed features, each including at least one slot deployed to form an open shape having an included area and at least one hole located within the included area. The internal surfaces of the holes and the slots are then coated with a protective layer. An anisotropic wet etching process is then performed in such a manner as to remove material from outside the included areas while leaving a projecting feature within each of the included areas. The protective layer is then removed to reveal the microneedles.

Abstract translation: 用于处理晶片以形成从基板突出的多个中空微针的方法包括通过使用干蚀刻工艺形成多个凹陷特征组，每组包括展开以形成具有 包括区域和位于所包含区域内的至少一个孔。 然后用保护层涂覆孔和槽的内表面。 然后以这样的方式进行各向异性湿法蚀刻工艺，以便在包含区域的外部移除材料，同时在每个所包含的区域内留下突出特征。 然后去除保护层以显露微针。

公开(公告)号：US07396479B1

公开(公告)日：2008-07-08

申请号：US10883466

申请日：2004-06-30

Applicant: Kramadhati Ravi ,  Alan M. Myers

Inventor： Kramadhati Ravi ,  Alan M. Myers

IPC: B31D3/00 ,  H01L21/30 ,  H01L21/46

CPC classification number: H01L23/473 ,  B81C1/005 ,  B81C1/00507 ,  B81C2201/0109 ,  B81C2201/0115 ,  F04B19/006 ,  F04B37/02 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for preparing porous silicon in which an oxidized single crystal silicon wafer is first bonded to a polycrystalline wafer. The oxidized high quality wafer is then thinned to the desired thickness by grinding and polishing. An oxide may then be deposited on the wafer and patterned to expose regions were the porous silicon will be formed. The single crystal silicon wafer may then etched in the unmasked areas of the pattern to thin the single crystal silicon wafer to the desired thickness in the range of 0.1 microns to 1.0 microns. Next, the porous silicon may be formed using standard techniques. Once the porous silicon is formed the polycrystalline silicon wafer may be ground away and the oxide layer may be undercut to expose the porous silicon. Finally, an appropriate liner material may be applied to the porous silicon.

Abstract translation: 一种多孔硅的制造方法，其中首先将氧化的单晶硅晶片接合到多晶晶片。 然后通过研磨和抛光将氧化的高质量晶片减薄至所需厚度。 然后可以将氧化物沉积在晶片上并且被图案化以暴露出将形成多孔硅的区域。 然后可以在图案的未屏蔽区域中蚀刻单晶硅晶片，以将单晶硅晶片细化至0.1微米至1.0微米范围内的所需厚度。 接下来，可以使用标准技术形成多孔硅。 一旦多孔硅形成，多晶硅晶片可能被磨掉，并且氧化物层可能被切削以露出多孔硅。 最后，可以将合适的衬垫材料施加到多孔硅上。