公开(公告)号：US07119363B2

公开(公告)日：2006-10-10

申请号：US10911833

申请日：2004-08-05

Applicant: Yoshinobu Satou ,  Katsuhisa Yuda ,  Hiroshi Tanabe

Inventor： Yoshinobu Satou ,  Katsuhisa Yuda ,  Hiroshi Tanabe

IPC: H01L29/04

CPC classification number: H01L27/1296 ,  B23K26/04 ,  B23K26/066 ,  H01L21/02675 ,  H01L21/2026 ,  H01L23/544 ,  H01L27/1285 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/78603 ,  H01L29/78633 ,  H01L2223/54453 ,  H01L2924/0002 ,  Y10S438/975 ,  H01L2924/00

Abstract: A thin-film transistor is formed on a transparent substrate and has a gate electrode film layer and a source and drain regions, and further has an alignment mark made of one and the same constituent material as a constituent material of at least one of the gate electrode film layer and source and drain regions and formed at one and the same position as the gate electrode film layer or source and drain region.

公开(公告)号：US07585708B2

公开(公告)日：2009-09-08

申请号：US11512596

申请日：2006-08-30

Applicant: Yoshinobu Satou ,  Katsuhisa Yuda ,  Hiroshi Tanabe

Inventor： Yoshinobu Satou ,  Katsuhisa Yuda ,  Hiroshi Tanabe

IPC: H01L21/00

CPC classification number: H01L27/1296 ,  B23K26/04 ,  B23K26/066 ,  H01L21/02675 ,  H01L21/2026 ,  H01L23/544 ,  H01L27/1285 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/78603 ,  H01L29/78633 ,  H01L2223/54453 ,  H01L2924/0002 ,  Y10S438/975 ,  H01L2924/00

Abstract: A thin-film transistor is formed on a transparent substrate and has a gate electrode film layer and a source and drain regions, and further has an alignment mark made of one and the same constituent material as a constituent material of at least one of the gate electrode film layer and source and drain regions and formed at one and the same position as the gate electrode film layer or source and drain region.

Abstract translation: 薄膜晶体管形成在透明基板上，具有栅极电极膜层和源极和漏极区域，并且还具有由与栅极中至少一个的构成材料相同的构成材料制成的对准标记 电极膜层和源极和漏极区，并且形成在与栅极电极膜层或源极和漏极区域相同的位置处。

公开(公告)号：US20070045624A1

公开(公告)日：2007-03-01

申请号：US11512596

申请日：2006-08-30

Applicant: Yoshinobu Satou ,  Katsuhisa Yuda ,  Hiroshi Tanabe

Inventor： Yoshinobu Satou ,  Katsuhisa Yuda ,  Hiroshi Tanabe

IPC: H01L29/04

CPC classification number: H01L27/1296 ,  B23K26/04 ,  B23K26/066 ,  H01L21/02675 ,  H01L21/2026 ,  H01L23/544 ,  H01L27/1285 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/78603 ,  H01L29/78633 ,  H01L2223/54453 ,  H01L2924/0002 ,  Y10S438/975 ,  H01L2924/00

Abstract: A thin-film transistor is formed on a transparent substrate and has a gate electrode film layer and a source and drain regions, and further has an alignment mark made of one and the same constituent material as a constituent material of at least one of the gate electrode film layer and source and drain regions and formed at one and the same position as the gate electrode film layer or source and drain region.

Abstract translation: 薄膜晶体管形成在透明基板上，具有栅极电极膜层和源极和漏极区域，并且还具有由与栅极中至少一个的构成材料相同的构成材料制成的对准标记 电极膜层和源极和漏极区，并且形成在与栅极电极膜层或源极和漏极区域相同的位置处。

公开(公告)号：US06822263B2

公开(公告)日：2004-11-23

申请号：US10457928

申请日：2003-06-09

Applicant: Yoshinobu Satou ,  Katsuhisa Yuda ,  Hiroshi Tanabe

Inventor： Yoshinobu Satou ,  Katsuhisa Yuda ,  Hiroshi Tanabe

IPC: H01L2904

CPC classification number: H01L27/1296 ,  B23K26/04 ,  B23K26/066 ,  H01L21/02675 ,  H01L21/2026 ,  H01L23/544 ,  H01L27/1285 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/78603 ,  H01L29/78633 ,  H01L2223/54453 ,  H01L2924/0002 ,  Y10S438/975 ,  H01L2924/00

Abstract: A thin-film transistor is formed on a transparent substrate and has a gate electrode film layer and a source and drain regions, and further has an alignment mark made of one and the same constituent material as a constituent material of at least one of the gate electrode film layer and source and drain regions and formed at one and the same position as the gate electrode film layer or source and drain region.

Abstract translation: 薄膜晶体管形成在透明基板上，具有栅极电极膜层和源极和漏极区域，并且还具有由与栅极中至少一个的构成材料相同的构成材料制成的对准标记 电极膜层和源极和漏极区，并且形成在与栅极电极膜层或源极和漏极区域相同的位置处。

公开(公告)号：US20050012098A1

公开(公告)日：2005-01-20

申请号：US10911833

申请日：2004-08-05

Applicant: Yoshinobu Satou ,  Katsuhisa Yuda ,  Hiroshi Tanabe

Inventor： Yoshinobu Satou ,  Katsuhisa Yuda ,  Hiroshi Tanabe

IPC: G02F1/136 ,  B23K26/04 ,  B23K26/06 ,  G02F1/1368 ,  H01L21/027 ,  H01L21/20 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L23/544 ,  H01L27/12 ,  H01L27/146 ,  H01L29/786 ,  H01L31/036

CPC classification number: H01L27/1296 ,  B23K26/04 ,  B23K26/066 ,  H01L21/02675 ,  H01L21/2026 ,  H01L23/544 ,  H01L27/1285 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/78603 ,  H01L29/78633 ,  H01L2223/54453 ,  H01L2924/0002 ,  Y10S438/975 ,  H01L2924/00

Abstract: A thin-film transistor is formed on a transparent substrate and has a gate electrode film layer and a source and drain regions, and further has an alignment mark made of one and the same constituent material as a constituent material of at least one of the gate electrode film layer and source and drain regions and formed at one and the same position as the gate electrode film layer or source and drain region.

Abstract translation: 薄膜晶体管形成在透明基板上，具有栅极电极膜层和源极和漏极区域，并且还具有由与栅极中至少一个的构成材料相同的构成材料制成的对准标记 电极膜层和源极和漏极区，并且形成在与栅极电极膜层或源极和漏极区域相同的位置处。

公开(公告)号：US20110169092A1

公开(公告)日：2011-07-14

申请号：US12941616

申请日：2010-11-08

Applicant: Teruhisa IKUTA ,  Yoshinobu Satou

Inventor： Teruhisa IKUTA ,  Yoshinobu Satou

IPC: H01L29/739

CPC classification number: H01L27/0259 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The present invention mainly provides an ESD protective element which can be built in high voltage semiconductor integrated circuit devices without increasing the chip area. An ESD protective element according to one embodiment has a construction comprising a semiconductor layer, a first region of a first conduction type formed in the semiconductor layer, a first region of a second conduction type formed in the semiconductor layer away from the first region of the first conduction type, a second region of the second conduction type formed in the first region of the second conduction type and has a higher impurity concentration than it, and a second region of the first conduction type formed in the second region of the second conduction type and has a high impurity concentration. The first and second regions of the second conduction type are in an electrically floating state.

Abstract translation: 本发明主要提供一种ESD保护元件，可以在不增加芯片面积的情况下内置在高压半导体集成电路器件中。 根据一个实施例的ESD保护元件具有包括半导体层，形成在半导体层中的第一导电类型的第一区域的第一区域，形成在半导体层中的远离第一区域的第二导电类型的第一区域 第一导电类型，第二导电类型的第二区域形成在第二导电类型的第一区域中并且具有比其高的杂质浓度，以及形成在第二导电类型的第二区域中的第一导电类型的第二区域 并且杂质浓度高。 第二导电类型的第一和第二区域处于电浮动状态。

公开(公告)号：US08823106B2

公开(公告)日：2014-09-02

申请号：US12941616

申请日：2010-11-08

Applicant: Teruhisa Ikuta ,  Yoshinobu Satou

Inventor： Teruhisa Ikuta ,  Yoshinobu Satou

IPC: H01L23/62 ,  H01L27/02

CPC classification number: H01L27/0259 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The present invention mainly provides an ESD protective element which can be built in high voltage semiconductor integrated circuit devices without increasing the chip area. An ESD protective element according to one embodiment has a construction comprising a semiconductor layer, a first region of a first conduction type formed in the semiconductor layer, a first region of a second conduction type formed in the semiconductor layer away from the first region of the first conduction type, a second region of the second conduction type formed in the first region of the second conduction type and has a higher impurity concentration than it, and a second region of the first conduction type formed in the second region of the second conduction type and has a high impurity concentration. The first and second regions of the second conduction type are in an electrically floating state.

Abstract translation: 本发明主要提供一种ESD保护元件，可以在不增加芯片面积的情况下内置在高压半导体集成电路器件中。 根据一个实施例的ESD保护元件具有包括半导体层，形成在半导体层中的第一导电类型的第一区域的第一区域，形成在半导体层中的远离第一区域的第二导电类型的第一区域 第一导电类型，第二导电类型的第二区域形成在第二导电类型的第一区域中并且具有比其高的杂质浓度，以及形成在第二导电类型的第二区域中的第一导电类型的第二区域 并且杂质浓度高。 第二导电类型的第一和第二区域处于电浮动状态。