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    Encoding apparatus, control method of encoding apparatus, and memory device
    1.
    发明授权
    Encoding apparatus, control method of encoding apparatus, and memory device 有权
    编码装置，编码装置的控制方法和存储装置

    公开(公告)号：US09331713B2

    公开(公告)日：2016-05-03

    申请号：US13600929

    申请日：2012-08-31

    Applicant: Yoshiki Saito ,  Shinichi Kanno ,  Toshikatsu Hida

    Inventor： Yoshiki Saito ,  Shinichi Kanno ,  Toshikatsu Hida

    IPC: H03M13/05 ,  H03M13/00

    CPC classification number: H03M13/05 ,  H03M13/6516

    Abstract: According to an embodiment, an encoding apparatus includes a parameter holding unit configured to hold a parameter; an error-detecting code holding unit configured to hold an error-detecting code that is generated from the parameter; an error detecting unit configured to detect an error in the parameter, which is held in the parameter holding unit, with the use of the error-detecting code held in the error-detecting code holding unit; an error correcting unit configured to correct the error detected by the error detecting unit; a selecting unit configured to select the parameter that has been subjected to error correction by the error correcting unit; and an encoding unit configured to encode data with the use of the parameter selected by the selecting unit.

    Abstract translation: 根据实施例，一种编码装置包括：配置为保存参数的参数保持单元; 错误检测码保持单元，被配置为保存从该参数生成的检错码; 错误检测单元，被配置为使用保持在错误检测码保持单元中的检错码来检测保存在参数保持单元中的参数中的错误; 错误校正单元，被配置为校正由所述错误检测单元检测到的所述错误; 选择单元，被配置为通过误差校正单元选择已经经过纠错的参数; 以及编码单元，被配置为使用由所述选择单元选择的参数来对数据进行编码。

    ENCODING APPARATUS, CONTROL METHOD OF ENCODING APPARATUS, AND MEMORY DEVICE
    2.
    发明申请
    ENCODING APPARATUS, CONTROL METHOD OF ENCODING APPARATUS, AND MEMORY DEVICE 有权
    编码装置，编码装置的控制方法和存储装置

    公开(公告)号：US20130254637A1

    公开(公告)日：2013-09-26

    申请号：US13600929

    申请日：2012-08-31

    Applicant: Yoshiki Saito ,  Shinichi Kanno ,  Toshikatsu Hida

    Inventor： Yoshiki Saito ,  Shinichi Kanno ,  Toshikatsu Hida

    IPC: H03M13/05

    CPC classification number: H03M13/05 ,  H03M13/6516

    Abstract: According to an embodiment, an encoding apparatus includes a parameter holding unit configured to hold a parameter; an error-detecting code holding unit configured to hold an error-detecting code that is generated from the parameter; an error detecting unit configured to detect an error in the parameter, which is held in the parameter holding unit, with the use of the error-detecting code held in the error-detecting code holding unit; an error correcting unit configured to correct the error detected by the error detecting unit; a selecting unit configured to select the parameter that has been subjected to error correction by the error correcting unit; and an encoding unit configured to encode data with the use of the parameter selected by the selecting unit.

    Abstract translation: 根据实施例，一种编码装置包括：配置为保存参数的参数保持单元; 错误检测码保持单元，被配置为保存从该参数生成的检错码; 错误检测单元，被配置为使用保持在错误检测码保持单元中的检错码来检测保存在参数保持单元中的参数中的错误; 错误校正单元，被配置为校正由所述错误检测单元检测到的所述错误; 选择单元，被配置为通过误差校正单元选择已经经过纠错的参数; 以及编码单元，被配置为使用由所述选择单元选择的参数来对数据进行编码。

    Method of controlling a semiconductor storage device
    3.
    发明授权
    Method of controlling a semiconductor storage device 有权
    控制半导体存储装置的方法

    公开(公告)号：US08583972B2

    公开(公告)日：2013-11-12

    申请号：US13486718

    申请日：2012-06-01

    Applicant: Toshikatsu Hida ,  Shinichi Kanno ,  Hirokuni Yano ,  Kazuya Kitsunai ,  Shigehiro Asano ,  Junji Yano

    Inventor： Toshikatsu Hida ,  Shinichi Kanno ,  Hirokuni Yano ,  Kazuya Kitsunai ,  Shigehiro Asano ,  Junji Yano

    IPC: G11C29/00

    CPC classification number: G06F11/1412 ,  G06F11/1068 ,  G06F11/1402 ,  G06F12/02 ,  G11C16/0483 ,  G11C16/3418 ,  G11C16/3431

    Abstract: A method of controlling a nonvolatile semiconductor memory including a plurality of blocks, each one of the plurality of blocks being a unit of data erasing, includes determining a monitored block as a candidate for refresh operation from among the plurality of blocks based on a predetermined condition. The method includes monitoring an error count of data stored in the monitored block and not monitoring an error count of data stored in blocks excluding the monitored block among the plurality of blocks. The method also includes performing the refresh operation on data stored in the monitored block in which the error count is larger than a first threshold value.

    Abstract translation: 一种控制包括多个块的非易失性半导体存储器的方法，所述多个块中的每一个是数据擦除单元，包括：基于预定条件，将所监视的块作为所述多个块中的刷新操作的候补确定 。 该方法包括监视存储在所监视的块中的数据的错误计数，并且不监视存储在多个块中的被监视块之外的块中存储的数据的错误计数。 该方法还包括对存储在监视块中的数据执行刷新操作，其中错误计数大于第一阈值。

    SEMICONDUCTOR STORAGE DEVICE AND STORAGE CONTROLLING METHOD
    6.
    发明申请
    SEMICONDUCTOR STORAGE DEVICE AND STORAGE CONTROLLING METHOD 审中-公开
    半导体存储设备和存储控制方法

    公开(公告)号：US20100161885A1

    公开(公告)日：2010-06-24

    申请号：US12555274

    申请日：2009-09-08

    Applicant: Shinichi KANNO ,  Shigehiro Asano ,  Kazuya Kitsunai ,  Hirokuni Yano ,  Toshikatsu Hida

    Inventor： Shinichi KANNO ,  Shigehiro Asano ,  Kazuya Kitsunai ,  Hirokuni Yano ,  Toshikatsu Hida

    IPC: G06F12/00 ,  G06F12/02

    CPC classification number: G11C16/10 ,  G11C11/5628 ,  G11C16/105 ,  G11C2216/14

    Abstract: A semiconductor storage device includes a first storage unit having a plurality of first blocks as data write regions; an instructing unit that issues a write instruction of writing data into the first blocks; a converting unit that converts an external address of input data to a memory position in the first block with reference to a conversion table in which external addresses of the data are associated with the memory positions of the data in the first blocks; and a judging unit that judges whether any of the first blocks store valid data associated with the external address based on the memory positions of the input data, wherein the instructing unit issues the write instruction of writing the data into the first block in which the valid data is not stored, when any of the first blocks does not store the valid data.

    Abstract translation: 半导体存储装置包括具有作为数据写入区域的多个第一块的第一存储单元; 指示单元，其发出将数据写入到所述第一块中的写入指令; 转换单元，参照其中数据的外部地址与第一块中的数据的存储位置相关联的转换表，将输入数据的外部地址转换为第一块中的存储器位置; 以及判断单元，其基于所述输入数据的存储器位置判断所述第一块是否存储与所述外部地址相关联的有效数据，其中，所述指示单元发出将所述数据写入到所述第一块中的写入指令， 当任何第一个块不存储有效数据时，不存储数据。

    MEMORY SYSTEM AND CONTROL METHOD THEREOF
    7.
    发明申请
    MEMORY SYSTEM AND CONTROL METHOD THEREOF 有权
    存储系统及其控制方法

    公开(公告)号：US20100146228A1

    公开(公告)日：2010-06-10

    申请号：US12705431

    申请日：2010-02-12

    Applicant: Shinichi Kanno ,  Hirokuni Yano ,  Toshikatsu Hida ,  Kazuya Kitsunai ,  Junji Yano

    Inventor： Shinichi Kanno ,  Hirokuni Yano ,  Toshikatsu Hida ,  Kazuya Kitsunai ,  Junji Yano

    IPC: G06F12/00 ,  G11C16/04 ,  G06F11/00

    CPC classification number: G11C16/349 ,  G06F11/1068 ,  G06F12/0246 ,  G06F2212/7211 ,  G11C16/16 ,  G11C29/76

    Abstract: A memory system includes a nonvolatile memory including blocks as data erase units, a measuring unit which measures an erase time at which data in each block is erased, a block controller having a block table which associates a state value indicating one of a free state and a used state with the erase time for each block, a detector which detects blocks in which rewrite has collectively occurred within a short period, a first selector which selects a free block having an old erase time as a first block, a second selector which selects a block in use having an old erase time as a second block, and a leveling unit which moves data in the second block to the first block if the first block is included in the blocks detected by the detector.

    Abstract translation: 一种存储器系统，包括：包括作为数据擦除单元的块的非易失性存储器，测量擦除每个块中的数据的擦除时间的测量单元;具有块表的块控制器，其将指示空闲状态之一的状态值和 具有每个块的擦除时间的使用状态，检测在短时间内共同发生重写的块的检测器，选择具有旧擦除时间的空闲块作为第一块的第一选择器，选择 如果第一块被包括在由检测器检测到的块中，则将具有旧擦除时间的块用作第二块;以及调平单元，其将第二块中的数据移动到第一块。

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