公开(公告)号：US20130254637A1

公开(公告)日：2013-09-26

申请号：US13600929

申请日：2012-08-31

Applicant: Yoshiki Saito ,  Shinichi Kanno ,  Toshikatsu Hida

Inventor： Yoshiki Saito ,  Shinichi Kanno ,  Toshikatsu Hida

IPC: H03M13/05

CPC classification number: H03M13/05 ,  H03M13/6516

Abstract: According to an embodiment, an encoding apparatus includes a parameter holding unit configured to hold a parameter; an error-detecting code holding unit configured to hold an error-detecting code that is generated from the parameter; an error detecting unit configured to detect an error in the parameter, which is held in the parameter holding unit, with the use of the error-detecting code held in the error-detecting code holding unit; an error correcting unit configured to correct the error detected by the error detecting unit; a selecting unit configured to select the parameter that has been subjected to error correction by the error correcting unit; and an encoding unit configured to encode data with the use of the parameter selected by the selecting unit.

Abstract translation: 根据实施例，一种编码装置包括：配置为保存参数的参数保持单元; 错误检测码保持单元，被配置为保存从该参数生成的检错码; 错误检测单元，被配置为使用保持在错误检测码保持单元中的检错码来检测保存在参数保持单元中的参数中的错误; 错误校正单元，被配置为校正由所述错误检测单元检测到的所述错误; 选择单元，被配置为通过误差校正单元选择已经经过纠错的参数; 以及编码单元，被配置为使用由所述选择单元选择的参数来对数据进行编码。

公开(公告)号：US09331713B2

公开(公告)日：2016-05-03

申请号：US13600929

申请日：2012-08-31

Applicant: Yoshiki Saito ,  Shinichi Kanno ,  Toshikatsu Hida

Inventor： Yoshiki Saito ,  Shinichi Kanno ,  Toshikatsu Hida

IPC: H03M13/05 ,  H03M13/00

CPC classification number: H03M13/05 ,  H03M13/6516

Abstract: According to an embodiment, an encoding apparatus includes a parameter holding unit configured to hold a parameter; an error-detecting code holding unit configured to hold an error-detecting code that is generated from the parameter; an error detecting unit configured to detect an error in the parameter, which is held in the parameter holding unit, with the use of the error-detecting code held in the error-detecting code holding unit; an error correcting unit configured to correct the error detected by the error detecting unit; a selecting unit configured to select the parameter that has been subjected to error correction by the error correcting unit; and an encoding unit configured to encode data with the use of the parameter selected by the selecting unit.

Abstract translation: 根据实施例，一种编码装置包括：配置为保存参数的参数保持单元; 错误检测码保持单元，被配置为保存从该参数生成的检错码; 错误检测单元，被配置为使用保持在错误检测码保持单元中的检错码来检测保存在参数保持单元中的参数中的错误; 错误校正单元，被配置为校正由所述错误检测单元检测到的所述错误; 选择单元，被配置为通过误差校正单元选择已经经过纠错的参数; 以及编码单元，被配置为使用由所述选择单元选择的参数来对数据进行编码。

公开(公告)号：US08598599B2

公开(公告)日：2013-12-03

申请号：US13064454

申请日：2011-03-25

Applicant: Yoshiki Saito ,  Koji Okuno ,  Yasuhisa Ushida

Inventor： Yoshiki Saito ,  Koji Okuno ,  Yasuhisa Ushida

IPC: H01L33/00

CPC classification number: H01L33/02 ,  H01L33/007 ,  H01L33/32

Abstract: The present invention provides a Group III nitride semiconductor light-emitting device whose main surface is a plane which provides an internal electric field of zero, and which exhibits improved emission performance. The light-emitting device includes a sapphire substrate which has, in a surface thereof, a plurality of dents which are arranged in a stripe pattern as viewed from above; an n-contact layer formed on the dented surface of the sapphire substrate; a light-emitting layer formed on the n-contact layer; an electron blocking layer formed on the light-emitting layer; a p-contact layer formed on the electron blocking layer; a p-electrode; and an n-electrode. The electron blocking layer has a thickness of 2 to 8 nm and is formed of Mg-doped AlGaN having an Al compositional proportion of 20 to 30%.

Abstract translation: 本发明提供一种III族氮化物半导体发光器件，其主表面是提供内部电场为零的平面，并且其表现出改善的发射性能。 发光装置包括：蓝宝石基板，其表面具有从上方观察的条纹图案的多个凹部; 形成在蓝宝石衬底的凹陷表面上的n接触层; 形成在所述n接触层上的发光层; 形成在发光层上的电子阻挡层; 形成在电子阻挡层上的p型接触层; p电极; 和n电极。 电子阻挡层的厚度为2〜8nm，由Al组成比例为20〜30％的由Mg掺杂的AlGaN构成。

公开(公告)号：US20110240956A1

公开(公告)日：2011-10-06

申请号：US13064454

申请日：2011-03-25

Applicant: Yoshiki Saito ,  Koji Okuno ,  Yasuhisa Ushida

Inventor： Yoshiki Saito ,  Koji Okuno ,  Yasuhisa Ushida

IPC: H01L33/06

CPC classification number: H01L33/02 ,  H01L33/007 ,  H01L33/32

Abstract: The present invention provides a Group III nitride semiconductor light-emitting device whose main surface is a plane which provides an internal electric field of zero, and which exhibits improved emission performance. The light-emitting device includes a sapphire substrate which has, in a surface thereof, a plurality of dents which are arranged in a stripe pattern as viewed from above; an n-contact layer formed on the dented surface of the sapphire substrate; a light-emitting layer formed on the n-contact layer; an electron blocking layer formed on the light-emitting layer; a p-contact layer formed on the electron blocking layer; a p-electrode; and an n-electrode. The electron blocking layer has a thickness of 2 to 8 nm and is formed of Mg-doped AlGaN having an Al compositional proportion of 20 to 30%.

Abstract translation: 本发明提供一种III族氮化物半导体发光器件，其主表面是提供内部电场为零的平面，并且其表现出改善的发射性能。 发光装置包括：蓝宝石基板，其表面具有从上方观察的条纹图案的多个凹部; 形成在蓝宝石衬底的凹陷表面上的n接触层; 形成在所述n接触层上的发光层; 形成在发光层上的电子阻挡层; 形成在电子阻挡层上的p型接触层; p电极; 和n电极。 电子阻挡层的厚度为2〜8nm，由Al组成比例为20〜30％的由Mg掺杂的AlGaN构成。

公开(公告)号：US20090039373A1

公开(公告)日：2009-02-12

申请号：US12219455

申请日：2008-07-22

Applicant: Yoshiki Saito ,  Takayoshi Yajima ,  Yasuhisa Ushida

Inventor： Yoshiki Saito ,  Takayoshi Yajima ,  Yasuhisa Ushida

IPC: H01L33/00

CPC classification number: H01L33/025 ,  H01L33/22 ,  H01L33/42

Abstract: A group III nitride-based compound semiconductor light emitting device includes a polarity inversion layer including a surface with a convex portion, and a transparent electrode formed on the polarity inversion layer. The polarity inversion layer may have a magnesium concentration of not less than 1×1020 atoms/cm3, or not less than 2×1020 atoms/cm3 and not more than 5×1021 atoms/cm3. The polarity inversion layer may be formed of AlxGa1−xN (0≦x

Abstract translation: III族氮化物类化合物半导体发光器件包括具有凸部表面的极性反转层和形成在极性反转层上的透明电极。 极性反转层可以具有不小于1×10 20原子/ cm 3或不小于2×10 20原子/ cm 3且不大于5×10 21原子/ cm 3的镁浓度。 极性反转层可以由掺杂有镁的Al x Ga 1-x N（0 <= x <1）形成。

公开(公告)号：US08765509B2

公开(公告)日：2014-07-01

申请号：US13137997

申请日：2011-09-23

Applicant: Daisuke Shinoda ,  Shugo Nitta ,  Yoshiki Saito

Inventor： Daisuke Shinoda ,  Shugo Nitta ,  Yoshiki Saito

IPC: H01L33/32

CPC classification number: H01L33/007 ,  H01L21/0242 ,  H01L21/0243 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02576 ,  H01L21/0262 ,  H01L33/12 ,  H01L33/20

Abstract: A method for producing a Group III nitride semiconductor light-emitting device includes an n-type layer, a light-emitting layer, and a p-type layer, each of the layers being formed of Group III nitride semiconductor, being sequentially deposited via a buffer layer on a textured sapphire substrate. A buried layer is formed of Group III nitride semiconductor on the buffer layer, at a temperature lower by 20° C. to 80° C. than the temperature of 1000° C. to 1200° C. when the n-type layer is deposited on the buried layer. The texture provided on the sapphire substrate may have a depth of 1 μm to 2 μm and a side surface inclined by 40° to 80°. A preventing layer may be formed of GaN at 600° C. to 1050° C. so as to cover the entire top surface of the buffer layer.

Abstract translation: 制备III族氮化物半导体发光器件的方法包括n型层，发光层和p型层，每个层由III族氮化物半导体形成，其顺序地经由 纹理蓝宝石衬底上的缓冲层。 当n型层沉积时，在缓冲层上，在比例为1000℃至1200℃的温度低20℃至80℃的温度下，由III族氮化物半导体形成掩埋层 在埋层上。 设置在蓝宝石基板上的纹理可以具有1μm至2μm的深度和倾斜40°至80°的侧面。 防止层可以在600℃至1050℃由GaN形成，以覆盖缓冲层的整个顶表面。

公开(公告)号：US08680564B2

公开(公告)日：2014-03-25

申请号：US13554796

申请日：2012-07-20

Applicant: Hiroaki Makino ,  Yoshiki Saito

Inventor： Hiroaki Makino ,  Yoshiki Saito

IPC: H01L33/00

CPC classification number: H01L33/40 ,  H01L33/38 ,  H01L33/42

Abstract: A Group III nitride semiconductor light-emitting device exhibiting reduced contact resistance between a p contact layer and an ITO electrode. The Group III nitride semiconductor light-emitting device has an AlGaN dot-like structure on the p contact layer, and an ITO electrode on the p contact layer and the dot-like structure. The dot-like structure has a structure in which a plurality of AlGaN dots are discretely distributed on the top surface of the p contact layer. The dot-like structure is bonded to oxygen, and oxygen increases on an interface between the p contact layer and the ITO electrode.

Abstract translation: 在p接触层和ITO电极之间具有降低的接触电阻的III族氮化物半导体发光器件。 III族氮化物半导体发光器件在p接触层上具有AlGaN点状结构，在p接触层上具有ITO电极和点状结构。 点状结构具有多个AlGaN点离散地分布在p接触层的顶表面上的结构。 点状结构键合到氧上，并且在p接触层和ITO电极之间的界面上氧增加。

公开(公告)号：US20120083063A1

公开(公告)日：2012-04-05

申请号：US13137997

申请日：2011-09-23

Applicant: Daisuke Shinoda ,  Shugo Nitta ,  Yoshiki Saito

Inventor： Daisuke Shinoda ,  Shugo Nitta ,  Yoshiki Saito

IPC: H01L33/32

CPC classification number: H01L33/007 ,  H01L21/0242 ,  H01L21/0243 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02576 ,  H01L21/0262 ,  H01L33/12 ,  H01L33/20

Abstract: A method for producing a Group III nitride semiconductor light-emitting device includes an n-type layer, a light-emitting layer, and a p-type layer, each of the layers being formed of Group III nitride semiconductor, being sequentially deposited via a buffer layer on a textured sapphire substrate. A buried layer is formed of Group III nitride semiconductor on the buffer layer, at a temperature lower by 20° C. to 80° C. than the temperature of 1000° C. to 1200° C. when the n-type layer is deposited on the buried layer. The texture provided on the sapphire substrate may have a depth of 1 μm to 2 μm and a side surface inclined by 40° to 80°. A preventing layer may be formed of GaN at 600° C. to 1050° C. so as to cover the entire top surface of the buffer layer.

Abstract translation: 制备III族氮化物半导体发光器件的方法包括n型层，发光层和p型层，每个层由III族氮化物半导体形成，其顺序地经由 纹理蓝宝石衬底上的缓冲层。 当n型层沉积时，在缓冲层上，在比例为1000℃至1200℃的温度低20℃至80℃的温度下，由III族氮化物半导体形成掩埋层 在埋层上。 设置在蓝宝石基板上的纹理可以具有1μm至2μm的深度和倾斜40°至80°的侧面。 防止层可以在600℃至1050℃由GaN形成，以覆盖缓冲层的整个顶表面。

公开(公告)号：US07948061B2

公开(公告)日：2011-05-24

申请号：US12219695

申请日：2008-07-25

Applicant: Yoshiki Saito ,  Yasuhisa Ushida

Inventor： Yoshiki Saito ,  Yasuhisa Ushida

IPC: H01L29/04

CPC classification number: H01L33/32 ,  H01L33/02 ,  H01L33/16 ,  H01L33/20 ,  H01L33/382

Abstract: A characteristic feature of the invention is to form, in a Group III nitride-based compound semiconductor device, a negative electrode on a surface other than a Ga-polar C-plane. In a Group III nitride-based compound semiconductor light-emitting device, there are formed, on an R-plane sapphire substrate, an n-contact layer, a layer for improving static breakdown voltage, an n-cladding layer made of a multi-layer structure having ten stacked sets of an undoped In0.1Ga0.9N layer, an undoped GaN layer, and a silicon (Si)-doped GaN layer, a multi-quantum well (MQW) light-emitting layer made of a combination of In0.25Ga0.75N well layers and GaN barrier layers stacked alternatingly, a p-cladding layer made of a multi-layer structure including a p-type Al0.3Ga0.7N layer and a p-In0.08Ga0.92N layer, and a p-contact layer (thickness: about 80 nm) made of a stacked structure including two p-GaN layers having different magnesium concentrations. Through etching, the n-contact layer having a thickness direction along the c-axis is provided with stripe-patterned microditches each having side walls, which assume a C-plane, whereby ohmic contact is established between a negative electrode and each C-plane side wall.

Abstract translation: 本发明的特征在于，在III族氮化物系化合物半导体装置中，在Ga极C面以外的表面上形成负极。 在III族氮化物系化合物半导体发光元件中，在R面蓝宝石衬底上形成n接触层，用于提高静电击穿电压的层，由多层结构形成的n包层， 具有未堆积的In0.1Ga0.9N层，未掺杂的GaN层和硅（Si）掺杂的GaN层的十个堆叠组的多层结构，由In0组合的多量子阱（MQW）发光层 0.25Ga0.75N阱层和GaN势垒层交替堆叠，由包括p型Al0.3Ga0.7N层和p-In0.08Ga0.92N层的多层结构制成的p型包层，p - 接触层（厚度：约80nm），其由包括具有不同镁浓度的两个p-GaN层的堆叠结构制成。 通过蚀刻，具有沿着c轴的厚度方向的n接触层设置有条形图案化的每个具有侧壁的微阵列，其呈现C面，由此在负极和每个C面之间建立欧姆接触 侧墙。

公开(公告)号：US20100244042A1

公开(公告)日：2010-09-30

申请号：US12659763

申请日：2010-03-19

Applicant: Yoshiki Saito ,  Yasuhisa Ushida

Inventor： Yoshiki Saito ,  Yasuhisa Ushida

IPC: H01L33/44 ,  H01L33/30 ,  H01L21/20

CPC classification number: H01L33/24 ,  H01L33/08 ,  H01L33/32

Abstract: A group III nitride compound semiconductor light emitting element comprising: a first layer which is a single crystal layer of a group III nitride compound semiconductor, the first layer formed on the buffer layer and including a threading dislocation; a second layer of a group III nitride compound semiconductor formed on the first layer, the second layer including a pit and a flat portion, wherein the pit continuing from the threading dislocations and having a cross section parallel to the substrate expanding in a growth direction of the second layer; a luminescent layer including a flat portion and a pit corresponding to those of the second layer. The indium concentration in the pit of the luminescent layer is smaller than that in the flat portion of the luminescent layer. A luminescent spectrum width of thereof is expanded as compared to a case where the pit does not exist.

Abstract translation: 一种III族氮化物化合物半导体发光元件，包括：第一层，其是III族氮化物化合物半导体的单晶层，所述第一层形成在所述缓冲层上并且包括穿透位错; 形成在第一层上的第III族氮化物化合物半导体的第二层，第二层包括凹坑和平坦部分，其中所述凹坑从穿透位错继续并且具有平行于基板沿其生长方向扩展的横截面 第二层; 包括平坦部分和与第二层相对应的凹坑的发光层。 发光层的凹坑中的铟浓度比发光层的平坦部的铟浓度小。 与不存在凹坑的情况相比，其发光光谱宽度扩大。