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公开(公告)号：US20100005324A1
公开(公告)日：2010-01-07
申请号：US12346268
申请日：2008-12-30
申请人： Yonetaro TOTSUKA , Koichiro Ishibashi , Hiroyuki Mizuno , Osamu Nishii , Kunio Uchiyama , Takanori Shimura , Asako Sekine , Yoichi Katsuki , Susumu Narita
发明人： Yonetaro TOTSUKA , Koichiro Ishibashi , Hiroyuki Mizuno , Osamu Nishii , Kunio Uchiyama , Takanori Shimura , Asako Sekine , Yoichi Katsuki , Susumu Narita
IPC分类号： G06F1/26
CPC分类号： G06F1/3296 , G06F1/3203 , Y02D10/172 , Y02D50/20
摘要： The feature of the present invention consists in: a processor main circuit for executing program instruction strings on a processor chip; a substrate bias switching unit for switching voltages of substrate biases applied to a substrate of the processor main circuit; and an operation mode control unit for controlling, in response to the execution of an instruction to proceed to a stand-by mode in the processor main circuit, the substrate bias switching unit in such a way that the biases are switched over to voltages for the stand-by mode, and for controlling, in response to an interruption of the stand-by release from the outside, the substrate bias switching unit in such a way that the biases are switched over to voltages for a normal mode, and also for releasing, after the bias voltages switched thereto have been stabilized, the stand-by of the processor main circuit to restart the operation.
摘要翻译： 本发明的特征在于：处理器主电路，用于在处理器芯片上执行程序指令串; 衬底偏置切换单元，用于切换施加到处理器主电路的衬底的衬底偏压的电压; 以及操作模式控制单元，用于响应于执行处理器主电路中的待机模式的指令，控制所述衬底偏置切换单元，使得所述偏置切换到所述处理器主电路的电压 待机模式，并且为了响应于来自外部的待机释放的中断来控制衬底偏置切换单元，使得偏置被切换到用于正常模式的电压，并且还用于释放 在切换到其上的偏置电压已经稳定之后，处理器主电路的待机重新开始操作。
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2.发明授权Processor for controlling substrate biases in accordance to the operation modes of the processor 有权用于根据处理器的操作模式控制衬底偏压的处理器公开(公告)号：US06715090B1
公开(公告)日：2004-03-30
申请号：US09308488
申请日：1999-05-20
申请人： Yonetaro Totsuka , Koichiro Ishibashi , Hiroyuki Mizuno , Osamu Nishii , Kunio Uchiyama , Takanori Shimura , Asako Sekine , Yoichi Katsuki , Susumu Narita
发明人： Yonetaro Totsuka , Koichiro Ishibashi , Hiroyuki Mizuno , Osamu Nishii , Kunio Uchiyama , Takanori Shimura , Asako Sekine , Yoichi Katsuki , Susumu Narita
IPC分类号： G06F130
CPC分类号： G06F1/3296 , G06F1/3203 , Y02D10/172 , Y02D50/20
摘要： The feature of the present invention consists in: a processor main circuit for executing program instruction strings on a processor chip; a substrate bias switching unit for switching voltages of substrate biases applied to a substrate of the processor main circuit; and an operation mode control unit for controlling, in response to the execution of an instruction to proceed to a stand-by mode in the processor main circuit, the substrate bias switching unit in such a way that the biases are switched over to voltages for the stand-by mode, and for controlling, in response to an interruption of the stand-by release from the outside, the substrate bias switching unit in such a way that the biases are switched over to voltages for a normal mode, and also for releasing, after the bias voltages switched thereto have been stabilized, the stand-by of the processor main circuit to restart the operation.
摘要翻译： 本发明的特征在于：处理器主电路，用于在处理器芯片上执行程序指令串; 衬底偏置切换单元，用于切换施加到处理器主电路的衬底的衬底偏压的电压; 以及操作模式控制单元，用于响应于执行处理器主电路中的待机模式的指令，控制所述衬底偏置切换单元，使得所述偏置切换到所述处理器主电路的电压 待机模式，并且为了响应于来自外部的待机释放的中断来控制衬底偏置切换单元，使得偏置被切换到用于正常模式的电压，并且还用于释放 在切换到其上的偏置电压已经稳定之后，处理器主电路的待机重新开始操作。
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公开(公告)号：US08364988B2
公开(公告)日：2013-01-29
申请号：US13101678
申请日：2011-05-05
申请人： Yonetaro Totsuka , Koichiro Ishibashi , Hiroyuki Mizuno , Osamu Nishii , Kunio Uchiyama , Takanori Shimura , Asako Sekine , Yoichi Katsuki , Susumu Narita
发明人： Yonetaro Totsuka , Koichiro Ishibashi , Hiroyuki Mizuno , Osamu Nishii , Kunio Uchiyama , Takanori Shimura , Asako Sekine , Yoichi Katsuki , Susumu Narita
CPC分类号： G06F1/3296 , G06F1/3203 , Y02D10/172 , Y02D50/20
摘要： The feature of the present invention consists in: a processor main circuit for executing program instruction strings on a processor chip; a substrate bias switching unit for switching voltages of substrate biases applied to a substrate of the processor main circuit; and an operation mode control unit for controlling, in response to the execution of an instruction to proceed to a stand-by mode in the processor main circuit, the substrate bias switching unit in such a way that the biases are switched over to voltages for the stand-by mode, and for controlling, in response to an interruption of the stand-by release from the outside, the substrate bias switching unit in such a way that the biases are switched over to voltages for a normal mode, and also for releasing, after the bias voltages switched thereto have been stabilized, the stand-by of the processor main circuit to restart the operation.
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公开(公告)号：US07475261B2
公开(公告)日：2009-01-06
申请号：US10768136
申请日：2004-02-02
申请人： Yonetaro Totsuka , Koichiro Ishibashi , Hiroyuki Mizuno , Osamu Nishii , Kunio Uchiyama , Takanori Shimura , Asako Sekine , Yoichi Katsuki , Susumu Narita
发明人： Yonetaro Totsuka , Koichiro Ishibashi , Hiroyuki Mizuno , Osamu Nishii , Kunio Uchiyama , Takanori Shimura , Asako Sekine , Yoichi Katsuki , Susumu Narita
CPC分类号： G06F1/3296 , G06F1/3203 , Y02D10/172 , Y02D50/20
摘要： The feature of the present invention consists in: a processor main circuit for executing program instruction strings on a processor chip; a substrate bias switching unit for switching voltages of substrate biases applied to a substrate of the processor main circuit; and an operation mode control unit for controlling, in response to the execution of an instruction to proceed to a stand-by mode in the processor main circuit, the substrate bias switching unit in such a way that the biases are switched over to voltages for the stand-by mode, and for controlling, in response to an interruption of the stand-by release from the outside, the substrate bias switching unit in such a way that the biases are switched over to voltages for a normal mode, and also for releasing, after the bias voltages switched thereto have been stabilized, the stand-by of the processor main circuit to restart the operation.
摘要翻译： 本发明的特征在于：处理器主电路，用于在处理器芯片上执行程序指令串; 衬底偏置切换单元，用于切换施加到处理器主电路的衬底的衬底偏压的电压; 以及操作模式控制单元，用于响应于执行处理器主电路中的待机模式的指令，控制所述衬底偏置切换单元，使得所述偏置切换到所述处理器主电路的电压 待机模式，并且为了响应于来自外部的待机释放的中断来控制衬底偏置切换单元，使得偏置被切换到用于正常模式的电压，并且还用于释放 在切换到其上的偏置电压已经稳定之后，处理器主电路的待机重新开始操作。
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公开(公告)号：US07958379B2
公开(公告)日：2011-06-07
申请号：US12346268
申请日：2008-12-30
申请人： Yonetaro Totsuka , Koichiro Ishibashi , Hiroyuki Mizuno , Osamu Nishii , Kunio Uchiyama , Takanori Shimura , Asako Sekine , Yoichi Katsuki , Susumu Narita
发明人： Yonetaro Totsuka , Koichiro Ishibashi , Hiroyuki Mizuno , Osamu Nishii , Kunio Uchiyama , Takanori Shimura , Asako Sekine , Yoichi Katsuki , Susumu Narita
CPC分类号： G06F1/3296 , G06F1/3203 , Y02D10/172 , Y02D50/20
摘要： The feature of the present invention consists in: a processor main circuit for executing program instruction strings on a processor chip; a substrate bias switching unit for switching voltages of substrate biases applied to a substrate of the processor main circuit; and an operation mode control unit for controlling, in response to the execution of an instruction to proceed to a stand-by mode in the processor main circuit, the substrate bias switching unit in such a way that the biases are switched over to voltages for the stand-by mode, and for controlling, in response to an interruption of the stand-by release from the outside, the substrate bias switching unit in such a way that the biases are switched over to voltages for a normal mode, and also for releasing, after the bias voltages switched thereto have been stabilized, the stand-by of the processor main circuit to restart the operation.
摘要翻译： 本发明的特征在于：处理器主电路，用于在处理器芯片上执行程序指令串; 衬底偏置切换单元，用于切换施加到处理器主电路的衬底的衬底偏压的电压; 以及操作模式控制单元，用于响应于执行处理器主电路中的待机模式的指令，控制所述衬底偏置切换单元，使得所述偏置切换到所述处理器主电路的电压 待机模式，并且为了响应于来自外部的待机释放的中断来控制衬底偏置切换单元，使得偏置被切换到用于正常模式的电压，并且还用于释放 在切换到其上的偏置电压已经稳定之后，处理器主电路的待机重新开始操作。
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公开(公告)号：US20050218965A1
公开(公告)日：2005-10-06
申请号：US11144695
申请日：2005-06-06
IPC分类号： G11C11/413 , G11C5/14 , G11C11/408 , H01L21/822 , H01L23/58 , H01L27/02 , H01L27/04 , H01L27/092
CPC分类号： H01L27/0207 , G11C5/14 , G11C5/146 , G11C5/147 , H01L27/0928 , H01L27/11807 , H01L2924/0002 , H03K19/0016 , H01L2924/00
摘要： In order to provide a semiconductor IC unit such as a microprocessor, etc., which satisfies both fast operation and lower power consumption properties with its high quality kept, the semiconductor IC unit of the present invention is composed so as to include a main circuit (LOG) provided with transistors, which is formed on a semiconductor substrate, and a substrate bias controlling circuit (VBC) used for controlling a voltage to be applied to the substrate, and the main circuit includes switching transistors (MN1 and MP1) used for controlling a voltage to be applied to the substrate and control signals output from the substrate bias controlling circuit is entered to the gate of each of the switching transistors and the control signal is returned to the substrate bias controlling circuit.
摘要翻译： 为了提供满足快速操作和低功耗特性的诸如微处理器等的半导体IC单元，保持其高质量，本发明的半导体IC单元被构成为包括主电路（ LOG），其形成在半导体衬底上的晶体管和用于控制施加到衬底的电压的衬底偏置控制电路（VBC），并且主电路包括使用的开关晶体管（MN 1和MP 1） 用于控制施加到衬底的电压，并且从衬底偏置控制电路输出的控制信号被输入到每个开关晶体管的栅极，并且控制信号返回到衬底偏置控制电路。
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公开(公告)号：US07598796B2
公开(公告)日：2009-10-06
申请号：US11987073
申请日：2007-11-27
IPC分类号： G05F1/10
CPC分类号： H01L27/0207 , G11C5/14 , G11C5/146 , G11C5/147 , H01L27/0928 , H01L27/11807 , H01L2924/0002 , H03K19/0016 , H01L2924/00
摘要： In order to provide a semiconductor IC unit such as a microprocessor, etc., which satisfies both fast operation and lower power consumption properties with its high quality kept, the semiconductor IC unit of the present invention is composed so as to include a main circuit (LOG) provided with transistors, which is formed on a semiconductor substrate, and a substrate bias controlling circuit (VBC) used for controlling a voltage to be applied to the substrate, and the main circuit includes switching transistors (MN1 and MP1) used for controlling a voltage to be applied to the substrate and control signals output from the substrate bias controlling circuit is entered to the gate of each of the switching transistors and the control signal is returned to the substrate bias controlling circuit.
摘要翻译： 为了提供满足快速操作和低功耗特性的诸如微处理器等的半导体IC单元，保持其高质量，本发明的半导体IC单元被构成为包括主电路（ LOG），其形成在半导体衬底上的晶体管和用于控制施加到衬底的电压的衬底偏置控制电路（VBC），并且主电路包括用于控制的开关晶体管（MN1和MP1） 将要施加到衬底的电压和从衬底偏置控制电路输出的控制信号输入到每个开关晶体管的栅极，并且控制信号返回到衬底偏置控制电路。
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公开(公告)号：US20060176101A1
公开(公告)日：2006-08-10
申请号：US11396543
申请日：2006-04-04
IPC分类号： G05F1/10
CPC分类号： H01L27/0207 , G11C5/14 , G11C5/146 , G11C5/147 , H01L27/0928 , H01L27/11807 , H01L2924/0002 , H03K19/0016 , H01L2924/00
摘要： In order to provide a semiconductor IC unit such as a microprocessor, etc. which satisfies both fast operation and lower power consumption properties with its high quality kept, the semiconductor IC unit of the present invention is composed so as to include a main circuit (LOG) provided with transistors, which is formed on a semiconductor substrate, and a substrate bias controlling circuit (VBC) used for controlling a voltage to be applied to the substrate, and the main circuit includes switching transistors (MN1 and MP1) used for controlling a voltage to be applied to the substrate and control signals output from the substrate bias controlling circuit is entered to the gate of each of the switching transistors and the control signal is returned to the substrate bias controlling circuit.
摘要翻译： 为了提供满足快速操作和低功耗特性的诸如微处理器等的半导体IC单元，其保持高质量，本发明的半导体IC单元被构成为包括主电路（LOG ），其形成在半导体衬底上的晶体管和用于控制施加到衬底的电压的衬底偏置控制电路（VBC），并且所述主电路包括：开关晶体管（MN 1和MP 1），用于 控制施加到基板的电压和从基板偏置控制电路输出的控制信号被输入到每个开关晶体管的栅极，并且控制信号返回到基板偏置控制电路。
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公开(公告)号：US06987415B2
公开(公告)日：2006-01-17
申请号：US10765923
申请日：2004-01-29
IPC分类号： H03K3/01
CPC分类号： H01L27/0207 , G11C5/14 , G11C5/146 , G11C5/147 , H01L27/0928 , H01L27/11807 , H01L2924/0002 , H03K19/0016 , H01L2924/00
摘要： In order to provide a semiconductor IC unit such as a microprocessor, etc., which satisfies both fast operation and lower power consumption properties with its high quality kept, the semiconductor IC unit of the present invention is composed so as to include a main circuit (LOG) provided with transistors, which is formed on a semiconductor substrate, and a substrate bias controlling circuit (VBC) used for controlling a voltage to be applied to the substrate, and the main circuit includes switching transistors (MN1 and MP1) used for controlling a voltage to be applied to the substrate and control signals output from the substrate bias controlling circuit is entered to the gate of each of the switching transistors and the control signal is returned to the substrate bias controlling circuit.
摘要翻译： 为了提供满足快速操作和低功耗特性的诸如微处理器等的半导体IC单元，保持其高质量，本发明的半导体IC单元被构成为包括主电路（ LOG），其形成在半导体衬底上的晶体管和用于控制施加到衬底的电压的衬底偏置控制电路（VBC），并且主电路包括使用的开关晶体管（MN 1和MP 1） 用于控制施加到衬底的电压，并且从衬底偏置控制电路输出的控制信号被输入到每个开关晶体管的栅极，并且控制信号返回到衬底偏置控制电路。
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公开(公告)号：US20080136502A1
公开(公告)日：2008-06-12
申请号：US11987073
申请日：2007-11-27
CPC分类号： H01L27/0207 , G11C5/14 , G11C5/146 , G11C5/147 , H01L27/0928 , H01L27/11807 , H01L2924/0002 , H03K19/0016 , H01L2924/00
摘要： In order to provide a semiconductor IC unit such as a microprocessor, etc., which satisfies both fast operation and lower power consumption properties with its high quality kept, the semiconductor IC unit of the present invention is composed so as to include a main circuit (LOG) provided with transistors, which is formed on a semiconductor substrate, and a substrate bias controlling circuit (VBC) used for controlling a voltage to be applied to the substrate, and the main circuit includes switching transistors (MN1 and MP1) used for controlling a voltage to be applied to the substrate and control signals output from the substrate bias controlling circuit is entered to the gate of each of the switching transistors and the control signal is returned to the substrate bias controlling circuit.
摘要翻译： 为了提供满足快速操作和低功耗特性的诸如微处理器等的半导体IC单元，保持其高质量，本发明的半导体IC单元被构成为包括主电路（ LOG），其形成在半导体衬底上的晶体管和用于控制施加到衬底的电压的衬底偏置控制电路（VBC），并且主电路包括使用的开关晶体管（MN 1和MP 1） 用于控制施加到衬底的电压，并且从衬底偏置控制电路输出的控制信号被输入到每个开关晶体管的栅极，并且控制信号返回到衬底偏置控制电路。
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