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    Regulated charge pump with digital resistance control
    1.
    发明申请
    Regulated charge pump with digital resistance control 有权
    具有数字电阻控制的调节电荷泵

    公开(公告)号：US20050189982A1

    公开(公告)日：2005-09-01

    申请号：US10787953

    申请日：2004-02-27

    申请人： Yee Cheung ,  Chun-Ying Chen

    发明人： Yee Cheung ,  Chun-Ying Chen

    IPC分类号： H02M3/07 ,  H03H11/26

    CPC分类号： H02M3/073 ,  H02M2001/0041

    摘要： A charge pump includes a resistor divider connected between an output voltage node and ground and a comparator inputting a reference voltage at one input, and a divided voltage from the resistor divider at another input. A digital control circuit is enabled by the comparator. A first transistor and a second transistor are in series between an input voltage node and the ground, both transistors controlled by the digital control circuit. A pump capacitor is connected between to the output voltage node and between the first and second transistor, and being charged by turning the first and second transistors on and off. A first diode is between the pump capacitor and the input voltage node. A second diode between the pump capacitor and the output voltage node. A reservoir capacitor between the output voltage node and ground. The digital control circuit comprises a first shift register. The first transistor comprises a first plurality of parallel transistors, the first shift register includes any of a first plurality of DQ, RS or JK flip flops connected in series, and outputs of the flip flops control gates of the first plurality of parallel transistors.

    摘要翻译： 电荷泵包括连接在输出电压节点和地之间的电阻分压器和在一个输入端输入参考电压的比较器，以及在另一个输入端分别来自电阻分压器的分压电压。 数字控制电路由比较器使能。 第一晶体管和第二晶体管串联在输入电压节点和地之间，两个晶体管都由数字控制电路控制。 泵浦电容器连接到输出电压节点之间，并且连接在第一和第二晶体管之间，并通过使第一和第二晶体管导通和关断而被充电。 第一个二极管位于泵电容器和输入电压节点之间。 泵电容器和输出电压节点之间的第二个二极管。 输出电压节点与地之间的储层电容。 数字控制电路包括第一移位寄存器。 第一晶体管包括第一多个并联晶体管，第一移位寄存器包括串联连接的第一多个DQ，RS或JK触发器中的任一个以及第一多个并联晶体管的触发器控制栅极的输出。

    Regulated charge pump with digital resistance control
    2.
    发明申请
    Regulated charge pump with digital resistance control 失效
    具有数字电阻控制的调节电荷泵

    公开(公告)号：US20070120591A1

    公开(公告)日：2007-05-31

    申请号：US11585841

    申请日：2006-10-25

    申请人： Yee Cheung ,  Chun-Ying Chen

    发明人： Yee Cheung ,  Chun-Ying Chen

    IPC分类号： G05F1/10

    CPC分类号： H02M3/073 ,  H02M2001/0041

    摘要： A charge pump includes a resistor divider connected between an output voltage node and ground and a comparator inputting a reference voltage at one input, and a divided voltage from the resistor divider at another input. A digital control circuit is enabled by the comparator. A first transistor and a second transistor are in series between an input voltage node and the ground, both transistors controlled by the digital control circuit. A pump capacitor is connected between to the output voltage node and between the first and second transistor, and being charged by turning the first and second transistors on and off. A first diode is between the pump capacitor and the input voltage node. A second diode between the pump capacitor and the output voltage node. A reservoir capacitor between the output voltage node and ground. The digital control circuit comprises a first shift register. The first transistor comprises a first plurality of parallel transistors, the first shift register includes any of a first plurality of DQ, RS or JK flip flops connected in series, and outputs of the flip flops control gates of the first plurality of parallel transistors.

    摘要翻译： 电荷泵包括连接在输出电压节点和地之间的电阻分压器和在一个输入端输入参考电压的比较器，以及在另一个输入端分别来自电阻分压器的分压电压。 数字控制电路由比较器使能。 第一晶体管和第二晶体管串联在输入电压节点和地之间，两个晶体管都由数字控制电路控制。 泵浦电容器连接到输出电压节点之间，并且连接在第一和第二晶体管之间，并通过使第一和第二晶体管导通和关断而被充电。 第一个二极管位于泵电容器和输入电压节点之间。 泵电容器和输出电压节点之间的第二个二极管。 输出电压节点与地之间的储层电容。 数字控制电路包括第一移位寄存器。 第一晶体管包括第一多个并联晶体管，第一移位寄存器包括串联连接的第一多个DQ，RS或JK触发器中的任一个以及第一多个并联晶体管的触发器控制栅极的输出。

    Method and system for a control scheme on power and common-mode voltage reduction for a transmitter
    3.
    发明申请
    Method and system for a control scheme on power and common-mode voltage reduction for a transmitter 失效

    公开(公告)号：US20060105725A1

    公开(公告)日：2006-05-18

    申请号：US10986020

    申请日：2004-11-12

    申请人： Yee Cheung ,  Kevin Chan ,  Jan Mulder

    发明人： Yee Cheung ,  Kevin Chan ,  Jan Mulder

    IPC分类号： H03F1/14 ,  H04B1/04 ,  H01Q11/12

    CPC分类号： H04B1/581

    摘要： Provided is a method and system for controlling current characteristics in a transceiver having a transmitter. The transmitter includes a plurality of current cells. Each cell is configurable for operating in different modes. The method includes determining a first probability associated with transmitting data at a particular symbolic level and determining a second probability associated with each cell being used during a transmission at the particular symbolic level. Next, one of the modes for each cell is selected in accordance with anticipated performance requirements. An average current of the transmitter is then calculated based upon the determined first and second probabilities and the selected modes.

    Signal driving system
    4.
    发明申请
    Signal driving system 失效
    信号驱动系统

    公开(公告)号：US20050057871A1

    公开(公告)日：2005-03-17

    申请号：US10660662

    申请日：2003-09-12

    申请人： Josephus Engelen ,  Yee Cheung ,  Mark Chambers ,  Darwin Cheung

    发明人： Josephus Engelen ,  Yee Cheung ,  Mark Chambers ,  Darwin Cheung

    IPC分类号： H02H9/04 ,  H03K19/0185 ,  H02H3/14

    CPC分类号： H03K19/018528 ,  H02H9/04

    摘要： A signal driving system generates an output swinging between a first power supply (e.g., about 1.2 Volts), powering first and second drivers, and a second power supply (e.g., about 3.3 Volts), powering a first current mirror. The second power supply is generated external to the signal driving system and is used to allow for a desired common-mode differential output signal range. However, the second power supply produces voltage at a level above a rating of the devices in the signal driving system. Therefore, protection devices are used to protect the elements of the signal driving system from the second power supply. Accordingly, through use of the signal driving system of the present invention, a high voltage current mode driver can operate in a low voltage process without damaging the devices in the signal driving system.

    摘要翻译： 信号驱动系统在第一电源（例如，约1.2伏），第一和第二驱动器供电和第二电源（例如，约3.3伏特）之间产生输出摆幅，为第一电流镜供电。 第二电源在信号驱动系统外部产生，并用于允许所需的共模差分输出信号范围。 然而，第二电源产生高于信号驱动系统中的装置额定值的电压。 因此，保护​​装置用于保护信号驱动系统的元件与第二电源。 因此，通过使用本发明的信号驱动系统，高电压电流模式驱动器可以在低压工艺中工作而不会损坏信号驱动系统中的器件。

    Low jitter high phase resolution PLL-based timing recovery system
    5.
    发明申请
    Low jitter high phase resolution PLL-based timing recovery system 有权
    低抖动高相位分辨率基于PLL的定时恢复系统

    公开(公告)号：US20050030073A1

    公开(公告)日：2005-02-10

    申请号：US10937982

    申请日：2004-09-10

    申请人： Myles Wakayama ,  Stephen Jantzi ,  Kwang Kim ,  Yee Cheung ,  Ka Tong

    发明人： Myles Wakayama ,  Stephen Jantzi ,  Kwang Kim ,  Yee Cheung ,  Ka Tong

    IPC分类号： H03L7/089 ,  H03L7/099 ,  H03L7/183 ,  H03L7/06

    CPC分类号： H03L7/0996 ,  H03L7/0891 ,  H03L7/183

    摘要： A low jitter, high phase resolution phase lock loop incorporating a ring oscillator-type VCO is designed and constructed to operate at a characteristic frequency M times higher than a required output clock frequency. Multi-phase output signals are taken from the VCO and selected through a Gray code MUX, prior to being divided down to the output clock frequency by a divide-by-M frequency divider circuit. Operating the VCO at frequencies in excess of the output clock frequency, allows jitter to be averaged across a timing cycle M and further allows a reduction in the number of output phase taps, by a scale factor M, without reducing the phase resolution or granularity of the output signal.

    摘要翻译： 包含环形振荡器型VCO的低抖动，高相位分辨率锁相环被设计和构造成以比要求的输出时钟频率M倍高的特征频率工作。 在通过M分频电路将其分频到输出时钟频率之前，通过格雷码MUX从VCO中取出多相输出信号。 在超过输出时钟频率的频率下操作VCO允许在定时周期M之间平均抖动，并且进一步允许减小比例因子M的输出相位抽头的数量，而不会降低相位分辨率或粒度 输出信号。