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公开(公告)号：US12118219B2
公开(公告)日：2024-10-15
申请号：US17903189
申请日：2022-09-06
发明人： Shay Benisty , Yossi Yoseph Hassan
IPC分类号： G06F3/06
CPC分类号： G06F3/0625 , G06F3/0631 , G06F3/0673
摘要： A data storage device includes a memory device and a controller. The controller is configured to assert a strobe cycle having a plurality of strobes to the memory device, where a die of the memory device may be associated with one or more strobes of the plurality of strobes. The controller is further configured to determine whether the die of the memory device requires additional power and adjust a strobe length of time of the corresponding strobe when the die of the memory device requires additional power. The controller is further configured to decrease a strobe length of time of one or more strobes that do not require additional power. By utilizing a time division peak power management (TD-PPM) feature by dynamically changing a strobe length of time of each strobe of the plurality of strobes, performance and latency of the data storage device may be improved.
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公开(公告)号：US20240338311A1
公开(公告)日：2024-10-10
申请号：US18233125
申请日：2023-08-11
CPC分类号： G06F12/0238 , H03M13/1105
摘要： Data storage devices configured to exploit generative-adversarial-networks (GANs) are described herein, including super-resolution GANs (SRGANs). In some examples, a GAN-based decoding (reconstruction) procedure is implemented within a data storage controller to replace or supplement an error correction coding (ECC) decoding procedure to permit a reduction in the number of parity bits used while storing the data. In other examples, soft bit information is exploited using GANs during decoding. A dissimilarity matrix may be generated to represent differences between an initial image and a GAN-reconstructed image, with matrix values mapped into low-density parity check (LDPC) codewords to facilitate LDPC decoding of data. In still other examples, confidence information obtained from a GAN is incorporated into image pixels. In some examples, GAN reconstruction of image data is limited to modifying valley bits. Multiple GANs may be used in parallel with their outcome aggregated. System and method examples are provided.
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公开(公告)号：US20240338275A1
公开(公告)日：2024-10-10
申请号：US18232105
申请日：2023-08-09
IPC分类号： G06F11/10
CPC分类号： G06F11/1068 , G06F11/1048
摘要： Data storage devices configured to exploit generative-adversarial-networks (GANs) are described herein, including super-resolution GANs (SRGANs). In some examples, a GAN-based decoding (reconstruction) procedure is implemented within a data storage controller to replace or supplement an error correction coding (ECC) decoding procedure to permit a reduction in the number of parity bits used while storing the data. In other examples, soft bit information is exploited using GANs during decoding. A dissimilarity matrix may be generated to represent differences between an initial image and a GAN-reconstructed image, with matrix values mapped into low-density parity check (LDPC) codewords to facilitate LDPC decoding of data. In still other examples, confidence information obtained from a GAN is incorporated into image pixels. In some examples, GAN reconstruction of data is limited to modifying valley bits. Multiple GANs may be used in parallel with their outcome aggregated. System and method examples are provided.
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公开(公告)号：US12112048B2
公开(公告)日：2024-10-08
申请号：US17939186
申请日：2022-09-07
发明人： Shay Benisty , Ariel Navon , Alexander Bazarsky , David Avraham
IPC分类号： G06F3/06
CPC分类号： G06F3/0625 , G06F3/0653 , G06F3/0673
摘要： The present disclosure generally relates to improving adaptive tuning of different clock rates of a memory device. Rather than clock rates only being determined off of one parameter such as workload, the clock rates now will be determined using multiple parameters. The tuning may be based on system parameters to allow the system to withstand challenges that arise during the operation. The clock frequency table is maintained in the device controller. The table holds the clock frequency of each component. The disclosure proposes modifying the table according to different system environment parameters to maintain performance or reduce power consumption. Adaptive tuning allows a more flexible system design that can adapt according to the current system status. Adaptive tuning also reduces peak power consumption, improves performance, and better quality of service (QoS) compatibility characteristics.
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5.发明公开公开(公告)号：US20240232068A1
公开(公告)日：2024-07-11
申请号：US18223150
申请日：2023-07-18
发明人： Shay Benisty , Ariel Navon
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F2212/7203
摘要： A data storage device and method for race-based data access in a multiple host memory buffer system are provided. In one embodiment, the data storage device stores data in a plurality of host memory buffers in the host instead of in just the host memory buffer usually associated with the data. To read the data, the data storage device sends read commands to all of the host memory buffers. That way, even if some of the host memory buffers are busy, the data can be returned from another one of the host memory buffers. In future reads in similar workloads, a read command can be sent to the host memory buffer that returned the data. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.
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公开(公告)号：US12001720B2
公开(公告)日：2024-06-04
申请号：US17860203
申请日：2022-07-08
发明人： Shay Benisty
CPC分类号： G06F3/0659 , G06F3/0611 , G06F3/0679 , G06F13/1668 , G06F13/4282 , G06F2213/0032
摘要： A method and apparatus for operating a solid state drive is disclosed comprising receiving at least two commands from a host requiring an action by the solid state drive in a preliminary order, ordering the at least two commands based upon a quality of service classification for the at least two commands to a final order and executing the at least two commands on the solid state drive in the final order, wherein an operational parameter of the solid state drive is modified by at least one of the at least two commands.
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7.发明授权公开(公告)号：US11983442B2
公开(公告)日：2024-05-14
申请号：US17846335
申请日：2022-06-22
发明人： Shay Benisty , Ariel Navon
IPC分类号： G06F3/06 , G06F12/0862
CPC分类号： G06F3/0659 , G06F3/0611 , G06F3/0613 , G06F3/0673 , G06F12/0862 , G06F2212/6024 , G06F2212/6026
摘要： A data storage device and method for multi-level conditional prediction of future random read commands are provided. In one embodiment, a data storage device is provided comprising a memory and a controller. The controller is configured to receive a random read command from a host, wherein the received random read command is associated with a stream; predict a next stream to be received from the host; and predict a next random read command to be received from the host based on the received random read command and the predicted next stream. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.
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公开(公告)号：US11983428B2
公开(公告)日：2024-05-14
申请号：US17834209
申请日：2022-06-07
发明人： Shay Benisty , Amir Rozen , Amir Segev
CPC分类号： G06F3/0647 , G06F3/0607 , G06F3/0683
摘要： Systems and methods for data migration via a peer communication channel between data storage devices are disclosed. The data storage devices include a host interface configured to connect to at least one host system and a peer interface to connect to the peer communication channel, where the host interface and the peer interface and separate physical interfaces. A source data storage device establishes peer communication with a destination data storage device over the peer communication channel, determines a set of host data, and sends the set of host data to the destination data storage device, while continuing to receive and process host storage operations through the host interface.
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公开(公告)号：US20240134696A1
公开(公告)日：2024-04-25
申请号：US18354150
申请日：2023-07-17
发明人： Eran Moshe , Shay Benisty , Idan Goldenberg
IPC分类号： G06F9/50
CPC分类号： G06F9/5027
摘要： Systems and methods for offloading data storage processing tasks from a data storage device to a graphics processing unit data are described. Data storage devices may include a peripheral interface configured to connect to a host system and provide access to a host memory buffer. The data storage device may store task input data to the host memory buffer. The data storage device may notify a processor device including the graphics processing unit to initiate the storage processing task. The processor device may access the task input data from the host memory buffer and store the task output data to the host memory buffer for access by the data storage device.
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公开(公告)号：US11914468B1
公开(公告)日：2024-02-27
申请号：US17887687
申请日：2022-08-15
IPC分类号： G06F11/10 , G06F9/00 , G06F9/4401 , G06F11/00
CPC分类号： G06F11/1048 , G06F9/441
摘要： A data storage device includes a memory device and a controller coupled to the memory device. The controller is configured to compare a first copy of a boot partition to a second copy of the boot partition. The first copy of the boot partition and the second copy of the boot partition each comprises a same number of a plurality of boot chunks. The boot partition corresponds to data of a boot operation of a host device. The controller is further configured to mark one or more of the compared boot chunks that equals or exceeds a similarity threshold and update a reliability index based on the marking. Based on the marking and the reliability index, the controller may increase or decrease an amount of error correction needed for the boot data.
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