公开(公告)号：US5619063A

公开(公告)日：1997-04-08

申请号：US646382

申请日：1995-12-12

Applicant: Wenn-Jei Chen ,  Huang-Chung Tseng

Inventor： Wenn-Jei Chen ,  Huang-Chung Tseng

IPC: H01L23/525 ,  H01L29/00

CPC classification number: H01L23/5252 ,  H01L2924/0002

Abstract: The present invention is directed to an antifuse structure and fabrication process wherein the bottom oxide of the ONO antifuse material layer is grown over a small area of N- diffusion surrounded by an N+ diffusion area where the N- diffusion could be patterned as N- "islands" or as N- "stripes", or the like, with the active N- area controlled by the formation and drive-in of the N+ diffusion layer. In this way, the bottom oxide layer of the ONO antifuse material layer is thinner at its center (above the N- region) than at its edges because oxide grows slower on the less doped N- region at the center of the antifuse than at the more heavily doped N+ regions at the edges of the antifuse. Forcing the center of the antifuse material layer to be thinner causes the antifuse to preferentially break down at its center and away from its edges. The opening in the antifuse cell opening mask is wider than the width of the N- diffusion area so that both N- and N+ areas are exposed in the antifuse cell opening step. Since the N+ diffusion can be very accurately dimensionally controlled with known techniques, it is thus possible to reduce the dimension of the active N- diffusion down to 0.2 .mu.m or below, comparing favorably with the linear dimension of 1.0 .mu.m used in currently available state-of-the-art manufacturing processes for antifuses. This represents a factor of 25 reduction in the active antifuse area, which in turn can dramatically reduce the defect density of antifuses over current technology and/or dramatically increase the number of antifuses that may be disposed in a given area of silicon.

Abstract translation: 本发明涉及一种反熔丝结构和制造工艺，其中ONO反熔丝层的底部氧化物生长在由N +扩散区域包围的N-扩散区域的小面积上，其中N-扩散区可以被图案化为N-“ 岛“或N”条纹“等，其中活性N区由N +扩散层的形成和驱入控制。 以这种方式，ONO反熔丝材料层的底部氧化物层在其中心（在N-区域之上）比在其边缘处更薄，因为在反熔丝的中心处的较少掺杂的N-区域上的氧化物比在 在反熔丝边缘处的更重掺杂的N +区域。 强制反熔丝材料层的中心较薄会导致反熔丝在其中心处优先分解并远离其边缘。 反熔丝电池开口掩模中的开口宽于N-扩散区域的宽度，使得在反熔丝电池打开步骤中都露出N和N +区域。 由于N +扩散可以用已知的技术进行精确的尺寸控制，因此可以将活性N-扩散的尺寸减小到0.2μm或更低，与当前可用的1.0μm的线性尺寸相比有利 最先进的反熔丝制造工艺。 这表示主动反熔丝区域减少了25倍，这反过来可以显着地减少反熔丝超过现有技术的缺陷密度和/或显着增加可以在硅的给定区域中排列的反熔丝的数量。

公开(公告)号：US5581111A

公开(公告)日：1996-12-03

申请号：US289114

申请日：1994-08-11

Applicant: Wenn-Jei Chen

Inventor： Wenn-Jei Chen

IPC: H01L23/525 ,  H01L27/02

CPC classification number: H01L23/5252 ,  H01L2924/0002 ,  H01L2924/3011 ,  Y10S148/055

Abstract: A novel antifuse structure includes a novel antifuse material layer comprises a first dielectric layer, a first polysilicon layer (which may optionally be lightly doped) disposed over the first dielectric layer, and a second dielectric layer disposed over the first polysilicon layer. The dielectric layers may be formed of silicon nitride, silicon dioxide, silicon oxynitride and combinations of the foregoing. Additional layers may also be included to form D/P/D/P/D, D/P/D/a-Si/D sandwiches, and the like. The polysilicon layer provides the ability to control the breakdown voltage of the antifuse through control of the doping level while maintaining a relatively large thickness of the antifuse material layer resulting in low capacitance for the antifuse. The antifuse material layer is compatible with high temperature processes (500.degree. C.-950.degree. C.) and may be carried out in the range of 400.degree. C.-950.degree. C. making it compatible with a wide range of processes.

Abstract translation: 一种新颖的反熔丝结构包括一种新颖的反熔丝材料层，其包括第一介电层，设置在第一介电层上的第一多晶硅层（其可任选地是轻掺杂的）和设置在第一多晶硅层上的第二介电层。 电介质层可以由氮化硅，二氧化硅，氮氧化硅以及前述的组合形成。 还可以包括另外的层以形成D / P / D / P / D，D / P / D / a-Si / D三明治等。 多晶硅层提供通过控制掺杂水平来控制反熔丝的击穿电压的能力，同时保持反熔丝材料层的相对较大的厚度，从而导致反熔丝的低电容。 反熔丝材料层与高温工艺（500℃〜950℃）兼容，可在400℃〜950℃的范围内进行，使其与广泛的工艺相容。

公开(公告)号：US5449947A

公开(公告)日：1995-09-12

申请号：US88298

申请日：1993-07-07

Applicant: Wenn-Jei Chen ,  Steve S. Chiang ,  Esam Elashmawi

Inventor： Wenn-Jei Chen ,  Steve S. Chiang ,  Esam Elashmawi

IPC: H01L23/525 ,  H01L27/02

CPC classification number: H01L23/5252 ,  H01L2924/0002 ,  H01L2924/3011

Abstract: A "read-disturb" resistant metal-to-metal antifuse includes a lower electrode comprising a first metal layer in a microcircuit structure. An inter-metal dielectric is disposed over the lower electrode and includes an antifuse aperture disposed therein. A first layer of antifuse material is disposed over exposed surface of the lower electrode in the antifuse aperture. A highly conductive layer is disposed over the first region of antifuse material and a second layer of antifuse material is disposed over the highly conductive layer. An upper electrode comprises a second metal layer disposed over the second layer of antifuse material. The first and second layers of antifuse material may comprise single-layer or multi-layer dielectric materials, amorphous silicon, or combinations of these materials. A process for fabricating a read-disturb resistant metal-to-metal antifuse comprises the steps of forming a lower electrode comprising a portion of a first metal layer in a microcircuit structure; forming an inter-metal dielectric layer over the lower electrode; forming an antifuse aperture in the inter-metal dielectric layer to expose the upper surface of the lower electrode; forming a first layer of antifuse material over the exposed surface of the lower electrode in the antifuse aperture; forming a highly conductive layer over the first layer of antifuse material; forming a second layer of antifuse material over the highly conductive layer; and forming an upper electrode comprising a second metal layer over the second layer of antifuse material.

Abstract translation: “读干扰”的金属对金属反熔丝包括包括微电路结构中的第一金属层的下电极。 金属间电介质设置在下电极上并且包括设置在其中的反熔丝孔。 第一层抗反熔丝材料设置在反熔丝孔径中的下电极的暴露表面上。 高导电层设置在反熔丝材料的第一区域上，并且第二层反熔丝材料设置在高导电层上。 上电极包括设置在第二层抗反熔丝材料上的第二金属层。 第一层和第二层反熔丝材料可以包括单层或多层电介质材料，非晶硅或这些材料的组合。 一种用于制造抗干扰金属对金属反熔丝的方法包括以下步骤：在微电路结构中形成包括第一金属层的一部分的下电极; 在所述下电极上形成金属间介电层; 在所述金属间电介质层中形成反熔丝孔，露出所述下电极的上表面; 在所述反熔丝孔径中的所述下电极的暴露表面上形成第一层反熔丝; 在第一层抗反熔丝材料上形成高导电层; 在所述高导电层上形成第二层反熔丝; 以及在第二层抗反熔丝材料上形成包括第二金属层的上电极。

公开(公告)号：US5913137A

公开(公告)日：1999-06-15

申请号：US725333

申请日：1996-10-01

Applicant: Wenn-Jei Chen

Inventor： Wenn-Jei Chen

IPC: H01L23/525 ,  H01L23/60 ,  H01L21/44

CPC classification number: H01L23/5252 ,  H01L23/60 ,  H01L2924/0002 ,  H01L2924/3011

Abstract: A process electrostatic discharge ("ESD") protection device is incorporated on a chip with the antifuses that it is designed to protect and is formed as close in time as possible to the deposition of the antifuse material layer (the layer being protected) so that ESD protection is available at all practical stages of processing. According to a first aspect of the invention, an ESD protection device is formed by exposing edges of an antifuse bottom electrode during the antifuse cell open mask/etch step. It is biased on during processing. A sharp corner of the electrode and a deep aspect ratio provide degrade antifuse performance for the protection cell (resulting in reduced breakdown voltage and increased leakage current) and, as designed, the protection cell will rupture before other cells because it has a lower breakdown voltage. Once the protection cell ruptures, it will continue to conduct and protect other antifuses from ESD damage. When processing is complete, the protection cell is biased off and has no effect on the remaining antifuses. According to a second aspect of the present invention, a deep valley topography is created under a bottom electrode of the protection cell. Because the cell is deeper than the other antifuse cells while retaining the same cell opening size, the step coverage within the protection cell will be reduced and the protection cell will have a lower breakdown voltage than the regular antifuse cells formed with it. In all other respects, it operates as set forth regarding the first aspect of the invention.

Abstract translation: 过程静电放电（“ESD”）保护器件被集成在芯片上，其抗反熔丝被设计成保护，并且尽可能接近于反熔丝材料层（被保护层）的沉积，以使得 在所有实际处理阶段均可提供ESD保护。 根据本发明的第一方面，通过在反熔丝电极开放掩模/蚀刻步骤期间暴露反熔丝底部电极的边缘来形成ESD保护装置。 它在处理过程中有偏见。 电极的尖角和深的纵横比为保护电池提供降低的反熔丝性能（导致降低的击穿电压和增加的漏电流），并且根据设计，保护电池将在其他电池之前破裂，因为其具有较低的击穿电压 。 一旦保护电池破裂，它将继续导电并保护其他反熔丝免受ESD损坏。 当处理完成时，保护单元被偏置，并且对剩余的反熔丝没有影响。 根据本发明的第二方面，在保护电池的底部电极下形成深谷形状。 因为电池在保持相同的电池开口尺寸的同时比其他反熔丝电池更深，所以保护电池内的台阶覆盖将被降低，并且保护电池具有比与其形成的常规反熔丝电池相比更低的击穿电压。 在所有其他方面，其操作如关于本发明的第一方面所述。

公开(公告)号：US5519248A

公开(公告)日：1996-05-21

申请号：US277673

申请日：1994-07-19

Applicant: Yeouchung Yan ,  Wenn-Jei Chen ,  Steve S. Chiang ,  Abdul R. Forouhi

Inventor： Yeouchung Yan ,  Wenn-Jei Chen ,  Steve S. Chiang ,  Abdul R. Forouhi

IPC: H01L23/525 ,  H01L23/60 ,  H01L29/00

CPC classification number: H01L23/5252 ,  H01L23/60 ,  H01L2924/0002

Abstract: A static-charge protection device for an antifuse includes an additional second-sized aperture smaller in area than the antifuse apertures disposed in the same inter-electrode dielectric layer. Antifuse material is disposed in the second-sized aperture, and the upper electrode extends over the second aperture as well as the first aperture. A preferred process for fabricating the protection device utilizes the step of forming the smaller apertures and forming their antifuse material layers simultaneously with forming the antifuse apertures. A static-charge protection device for an antifuse device includes an additional second-sized aperture larger in area than the first-sized antifuse apertures. Metal plug material is deposited and etched back. A layer of amorphous silicon antifuse material is formed and defined over the first and second sized apertures, the portion formed over the larger partially filled antifuse protection device cell being thinner.

Abstract translation: 用于反熔丝的静电保护装置包括比设置在相同的电极间介电层中的反熔丝孔小的面积小的附加的第二尺寸孔。 防污材料设置在第二尺寸的孔中，并且上电极在第二孔和第一孔上延伸。 用于制造保护装置的优选方法利用形成较小孔径并与形成反熔丝孔同时形成其反熔丝材料层的步骤。 用于反熔丝装置的静电保护装置包括具有比第一尺寸的反熔丝孔大的面积的额外的第二尺寸孔。 将金属塞材料沉积并回蚀刻。 一层非晶硅反熔丝材料形成并限定在第一和第二尺寸的孔上，形成在更大的部分填充的反熔丝保护器件单元上的部分较薄。

公开(公告)号：US5381035A

公开(公告)日：1995-01-10

申请号：US172132

申请日：1993-12-21

Applicant: Wenn-Jei Chen ,  Steve S. Chiang ,  Frank W. Hawley

Inventor： Wenn-Jei Chen ,  Steve S. Chiang ,  Frank W. Hawley

IPC: H01L21/3205 ,  H01L21/768 ,  H01L21/82 ,  H01L23/52 ,  H01L23/522 ,  H01L23/525 ,  H01L27/02 ,  H01L23/48

CPC classification number: H01L21/76888 ,  H01L23/5252 ,  H01L2924/0002

Abstract: According to the present invention, planar layers of Nitride (first nitride layer), a-Si (first a-Si layer), Nitride (second Nitride layer) and a-Si (second a-Si layer) are laid down over a first metallization layer. A dielectric layer is then laid down on top of the second a-Si layer. A via is opened in the dielectric layer with an etch gas which attacks a small portion of the second a-Si layer which, in effect, serves as a sacrificial etch-stop layer. A titanium layer is laid down over the via and allowed to thermally react with the remainder of the second a-Si layer to form an electrically conductive titanium silicide region in the area of the via the thickness of the second a-Si layer. The reaction is self-limiting and stops at the second Nitride layer. Subsequently a second metallization layer is disposed over the via. Thus the partially etched second a-Si layer forms a part of the second metallization layer and the Nitride/a-Si/Nitride insulating antifuse layer has a constant thickness determined by the process used to lay it down, rather than on the more uncontrollable etch process. Accordingly, the programming voltage of the antifuse is more predictable than with prior art antifuse structures.

Abstract translation: 根据本发明，将氮化物（第一氮化物层），a-Si（第一a-Si层），氮化物（第二氮化物层）和a-Si（第二a-Si层）的平面层放置在第一 金属化层。 然后将介电层放置在第二a-Si层的顶部。 通孔在介电层中用蚀刻气体打开，该蚀刻气体攻击第二a-Si层的一小部分，其实际上用作牺牲蚀刻停止层。 将钛层放置在通孔上方，并允许其与第二a-Si层的其余部分热反应，以在第二a-Si层的厚度的通孔区域中形成导电硅化钛区域。 反应是自限制的，并在第二氮化物层停止。 随后在通孔上设置第二金属化层。 因此，部分蚀刻的第二a-Si层形成第二金属化层的一部分，并且氮化物/ a-Si /氮化物绝缘反熔层具有由用于放下的工艺确定的恒定厚度，而不是更不可控制的蚀刻 处理。 因此，反熔丝的编程电压比现有技术的反熔丝结构更可预测。

公开(公告)号：US6150705A

公开(公告)日：2000-11-21

申请号：US571615

申请日：1995-12-13

Applicant: Wenn-Jei Chen

Inventor： Wenn-Jei Chen

IPC: H01L23/525 ,  H01L29/00

CPC classification number: H01L23/5252 ,  H01L2924/0002 ,  H01L2924/3011 ,  Y10S148/055

Abstract: A novel antifuse structure includes a novel antifuse material layer comprises a first dielectric layer, a first polysilicon layer (which may optionally be lightly doped) disposed over the first dielectric layer, and a second dielectric layer disposed over the first polysilicon layer. The dielectric layers may be formed of silicon nitride, silicon dioxide, silicon oxynitride and combinations of the foregoing. Additional layers may also be included to form D/P/D/P/D, D/P/D/a-Si/D sandwiches, and the like. The polysilicon layer provides the ability to control the breakdown voltage of the antifuse through control of the doping level while maintaining a relatively large thickness of the antifuse material layer resulting in low capacitance for the antifuse. The antifuse material layer is compatible with high temperature processes (500.degree. C.-950.degree. C.) and may be carried out in the range of 400.degree. C.-950.degree. C. making it compatible with a wide range of processes.

Abstract translation: 一种新颖的反熔丝结构包括一种新颖的反熔丝材料层，其包括第一介电层，设置在第一介电层上的第一多晶硅层（其可任选地是轻掺杂的）和设置在第一多晶硅层上的第二介电层。 电介质层可以由氮化硅，二氧化硅，氮氧化硅以及前述的组合形成。 还可以包括另外的层以形成D / P / D / P / D，D / P / D / a-Si / D三明治等。 多晶硅层提供通过控制掺杂水平来控制反熔丝的击穿电压的能力，同时保持反熔丝材料层的相对较大的厚度，从而导致反熔丝的低电容。 反熔丝材料层与高温工艺（500℃〜950℃）兼容，可在400℃〜950℃的范围内进行，使其与广泛的工艺相容。

公开(公告)号：US5825072A

公开(公告)日：1998-10-20

申请号：US599959

申请日：1996-02-14

Applicant: Yeochung Yen ,  Wenn-Jei Chen ,  Steve S. Chiang ,  Abdul Rahim Forouhi

Inventor： Yeochung Yen ,  Wenn-Jei Chen ,  Steve S. Chiang ,  Abdul Rahim Forouhi

IPC: H01L23/525 ,  H01L23/60 ,  H01L29/00

CPC classification number: H01L23/5252 ,  H01L23/60 ,  H01L2924/0002

Abstract: A static-charge protection device for an antifuse includes an additional second-sized aperture smaller in area than the antifuse apertures disposed in the same inter-electrode dielectric layer. Antifuse material is disposed in the second-sized aperture, and the upper electrode extends over the second aperture as well as the first aperture. A preferred process for fabricating the protection device utilizes the step of forming the smaller apertures and forming their antifuse material layers simultaneously with forming the antifuse apertures. A static-charge protection device for an antifuse device includes an additional second-sized aperture larger in area than the first-sized antifuse apertures. Metal plug material is deposited and etched back. A layer of amorphous silicon antifuse material is formed and defined over the first and second sized apertures, the portion formed over the larger partially filled antifuse protection device cell being thinner.

Abstract translation: 用于反熔丝的静电保护装置包括比设置在相同的电极间介电层中的反熔丝孔小的面积小的附加的第二尺寸孔。 防污材料设置在第二尺寸的孔中，并且上电极在第二孔和第一孔上延伸。 用于制造保护装置的优选方法利用形成较小孔径并与形成反熔丝孔同时形成其反熔丝材料层的步骤。 用于反熔丝装置的静电保护装置包括具有比第一尺寸的反熔丝孔大的面积的额外的第二尺寸孔。 将金属塞材料沉积并回蚀刻。 在第一和第二尺寸的孔上形成并限定一层非晶硅反熔丝材料，形成在较大部分填充的反熔丝保护器件单元上的部分较薄。

公开(公告)号：US5498895A

公开(公告)日：1996-03-12

申请号：US290029

申请日：1994-08-12

Applicant: Wenn-Jei Chen

Inventor： Wenn-Jei Chen

IPC: H01L23/525 ,  H01L23/60 ,  H01L27/01 ,  H01L29/00

CPC classification number: H01L23/5252 ,  H01L23/60 ,  H01L2924/0002 ,  H01L2924/3011

Abstract: A process electrostatic discharge ("ESD") protection device is incorporated on a chip with the antifuses that it is designed to protect and is formed as close in time as possible to the deposition of the antifuse material layer (the layer being protected) so that ESD protection is available at all practical stages of processing. According to a first aspect of the invention, an ESD protection device is formed by exposing edges of an antifuse bottom electrode during the antifuse cell open mask/etch step, It is biased on during processing. A sharp corner of the electrode and a deep aspect ratio provide degrade antifuse performance for the protection cell (resulting in reduced breakdown voltage and increased leakage current) and, as designed, the protection cell will rupture before other cells because it has a lower breakdown voltage. Once the protection cell ruptures, it will continue to conduct and protect other antifuses from ESD damage. When processing is complete, the protection cell is biased off and has no effect on the remaining antifuses. According to a second aspect of the present invention, a deep valley topography is created under a bottom electrode of the protection cell. Because the cell is deeper than the other antifuse cells while retaining the same cell opening size, the step coverage within the protection cell will be reduced and the protection cell will have a lower breakdown voltage than the regular antifuse cells formed with it. In all other respects, it operates as set forth regarding the first aspect of the invention.

Abstract translation: 过程静电放电（“ESD”）保护器件被集成在芯片上，其抗反熔丝被设计成保护，并且尽可能接近于反熔丝材料层（被保护层）的沉积，以使得 在所有实际处理阶段均可提供ESD保护。 根据本发明的第一方面，通过在反熔丝电极开放掩模/蚀刻步骤期间暴露反熔丝底部电极的边缘来形成ESD保护器件，在处理期间偏置ESD保护器件。 电极的尖角和深的纵横比为保护电池提供降低的反熔丝性能（导致降低的击穿电压和增加的漏电流），并且根据设计，保护电池将在其他电池之前破裂，因为其具有较低的击穿电压 。 一旦保护电池破裂，它将继续导电并保护其他反熔丝免受ESD损坏。 当处理完成时，保护单元被偏置，并且对剩余的反熔丝没有影响。 根据本发明的第二方面，在保护电池的底部电极下形成深谷形状。 因为电池在保持相同的电池开口尺寸的同时比其他反熔丝电池更深，所以保护电池内的台阶覆盖将被降低，并且保护电池具有比与其形成的常规反熔丝电池相比更低的击穿电压。 在所有其他方面，其操作如关于本发明的第一方面所述。

公开(公告)号：US5369054A

公开(公告)日：1994-11-29

申请号：US87942

申请日：1993-07-07

Applicant: Yeouchung Yen ,  Wenn-Jei Chen ,  Steve S. Chiang ,  Abdul R. Forouhi

Inventor： Yeouchung Yen ,  Wenn-Jei Chen ,  Steve S. Chiang ,  Abdul R. Forouhi

IPC: H01L23/525 ,  H01L23/60 ,  H01L21/44 ,  H01L21/48

CPC classification number: H01L23/5252 ,  H01L23/60 ,  H01L2924/0002

Abstract: A static-charge protection device for an antifuse includes an additional second-sized aperture smaller in area than the antifuse apertures disposed in the same inter-electrode dielectric layer. Antifuse material is disposed in the second-sized aperture, and the upper electrode extends over the second aperture as well as the first aperture. A preferred process for fabricating the protection device utilizes the step of forming the smaller apertures and forming their antifuse material layers simultaneously with forming the antifuse apertures.A static-charge protection device for an antifuse device includes an additional second-sized aperture larger in area than the first-sized antifuse apertures. Metal plug material is deposited and etched back. A layer of amorphous silicon antifuse material is formed and defined over the first and second sized apertures, the portion formed over the larger partially filled antifuse protection device cell being thinner.

Abstract translation: 用于反熔丝的静电保护装置包括比设置在相同的电极间介电层中的反熔丝孔小的面积小的附加的第二尺寸孔。 防污材料设置在第二尺寸的孔中，并且上电极在第二孔和第一孔上延伸。 用于制造保护装置的优选方法利用形成较小孔径并与形成反熔丝孔同时形成其反熔丝材料层的步骤。 用于反熔丝装置的静电保护装置包括具有比第一尺寸的反熔丝孔大的面积的额外的第二尺寸孔。 将金属塞材料沉积并回蚀刻。 在第一和第二尺寸的孔上形成并限定一层非晶硅反熔丝材料，形成在较大部分填充的反熔丝保护器件单元上的部分较薄。