Abstract:
A display device is disclosed. The display device includes a control module and a display panel connected to the control module. Wherein, the display panel includes a plurality of pixel electrodes; a plurality of first common electrodes disposed opposite to the pixel electrodes and connected to the control module by common connecting lines; and a liquid crystal layer disposed between the first common electrodes and the pixel electrodes. Wherein, the control module is configured to allow a constant electrical potential difference to exist between the first common electrodes and the pixel electrodes.
Abstract:
A liquid crystal display panel and a thin film transistor array substrate are provided. The thin film transistor array substrate includes a pixel area and a fan-out area. The fan-out area has a groove. The thin film transistor array substrate has a substrate, a light shielding layer, a buffer layer, a poly-silicon layer, a first insulating layer, a scan line layer, a second insulating layer, a data line layer, a third insulating layer, a common line layer, a touch-sensing line layer, a fourth insulating layer, and a pixel electrode layer. The present invention can prevent wire shorts.
Abstract:
An electronic terminal includes a display panel, a printed circuit board and a flexible printed circuit board. A portion of the flexible printed circuit board is located below the printed circuit board, a terminal of the flexible printed circuit board is connected with the display panel, and the other terminal is connected with a port of a driving circuit of the printed circuit board. At a location of a ground wire disposed inside an overlapping region of the flexible printed circuit board and the printed circuit board and disposed on the flexible printed circuit board, a first copper-exposed region is provided. At a location of a ground wire inside the overlapping region and on the printed circuit board, a second copper-exposed region is provided. A length of the ground wire in the printed circuit board is matched with a length of an antenna in the electronic terminal.
Abstract:
A self-capacitive touch panel structure includes a touch detection chip and multiple self-capacitance electrodes arranged as a matrix and isolated with each other. Each self-capacitance electrode connected with the touch detection chip through a connection line. Each self-capacitance electrode electrically connected with a corresponding connection line through at least one via hole. Wherein, a group of connection lines connected with a same column of the multiple self-capacitance electrodes are divided into an odd number group and an even number group, the connection lines in the odd number group are sequentially connected with corresponding self-capacitance electrodes from an terminal of the same column of the self-capacitance electrodes, and the connection lines in the even number group are sequentially connected with corresponding self-capacitance electrodes from another terminal of the same column of the self-capacitance electrodes. An in-cell touch panel and a liquid crystal display including above structure are also disclosed.
Abstract:
The present invention provides a thin film transistor array substrate and a liquid crystal display panel. The thin film transistor array substrate comprises: a substrate, and the substrate comprises a first surface and a second surface oppositely located; a thin film transistor array, located on the first surface; a common electrode layer, and the common electrode layer is isolated from the thin film transistor array, and the common electrode layer comprises a plurality of first strip holes; a sensing electrode layer, and the sensing electrode layer is isolated from the common electrode layer, and the sensing electrode layer comprises a plurality of sensing units and a plurality of sensing wires, and the sensing units are distributed in row and column, and the sensing wires are electrically coupled to the sensing units of each row or each column respectively, and the sensing wires are located corresponding to the first strip holes.
Abstract:
A liquid crystal display apparatus is provided, and includes a plurality of sensing units arranged in an array; a plurality of dummy lines, each of the dummy lines being disposed between two rows of the sensing units, wherein each of the dummy lines has a plurality of dummy line units, each of the dummy line units corresponds to one of the sensing units, and is electrically connected to the one of the sensing units.
Abstract:
The present disclosure relates to an array substrate and the manufacturing method thereof, and a liquid crystal panel. The array substrate includes a transparent substrate; a gate line on the transparent substrate; a touch signal line on the same layer with the gate line, and the touch signal line is arranged on the transparent substrate; a dielectric layer covering the gate line and the touch signal line, and the dielectric layer is configured with at least one first through hole; and a touch electrode arranged on the dielectric layer, the touch electrode electrically connects to the touch signal line via the first through hole. In this way, the storage capacitance may be increased, and the pixels may be fully charged when the resolution rate is high. At the same time, the coupling capacitance between the touch electrode and the Rx signal line may be reduced.
Abstract:
The present disclosure provides a gate driver on array (GOA) circuit. A low level signal source is used to output a low level signal, a first high level signal source is used to output a first high level signal, and the second high level signal source is used to output the second high level signal. A cascade signal latch module is used to latch a cascade signal of a current grade. A gate driving signal generating module generates a preparation gate driving signal of the current grade. A gate driving signal outputting module is used to output a gate driving signal of the current grade.
Abstract:
A scan driving circuit configured for driving cascaded scan lines is provided, which includes an input control module, a latch module, a driving-signal generation module, an output control module, a constant high voltage source and a constant low voltage source. The scan driving circuit of the present invention drives the input control module through cascade signals of a preceding stage and cascade signals of a succeeding stage, so as to reduce interference and the driving power consumption of the scan driving circuit.
Abstract:
A gate driver on array circuit includes a first driver module and a second driver module. The first driver module includes a first driver unit, a first output unit, and a first reset unit. The second driver module includes a second driver unit, a second output unit, and a second reset unit. The first output unit is used for generating a present stage scan drive signal and a present stage cascade signal. The second output unit is used for generating the present stage scan drive signal and the present stage cascade signal.