公开(公告)号：US10210034B2

公开(公告)日：2019-02-19

申请号：US15270921

申请日：2016-09-20

Applicant: VIA ALLIANCE SEMICONDUCTOR CO., LTD.

Inventor： Heng Que ,  Quanquan Xu ,  Deming Gu ,  Yuanfeng Wang

IPC: G06F11/07

Abstract: An electronic device, for integration with functional circuit modules, includes gates, monitor module, signal control module and record module. The functional modules are operated on clock signal for generating request instruction and response signal. The gate is coupled to the functional modules for transmitting request instruction and response signal to functional module on enable signals. The monitor module is coupled to the functional modules and the gates for generating hold signal. The monitor module generates enable signals on finish signal. The clock signal control module coupled to the functional modules and the monitor module for outputs main clock signal to generate clock signals. The clock signal control module generates record instruction and stop clock signals, and the clock signal control module re-outputs clock signals on finish signal. The record module coupled to the functional modules and the clock signal control module begins to record request instruction and response signal when receiving record instruction.

公开(公告)号：US10394574B2

公开(公告)日：2019-08-27

申请号：US15171388

申请日：2016-06-02

Applicant: VIA Alliance Semiconductor Co., Ltd.

Inventor： Fengxia Wu ,  Tian Shen ,  Zhou Hong ,  Yuanfeng Wang

IPC: G06F9/38 ,  G06F9/445

Abstract: An apparatus for enqueuing kernels on a device-side is introduced to incorporate with at least a MXU (Memory Access Unit) and a CSP (Command Stream Processor): The CSP, after receiving a first command from the MXU, executes commands of a ring buffer, thereby enabling an EU (Execution Unit) to direct the MXU to allocate space of the ring buffer for a first hardware thread and subsequently write second commands of the first hardware thread into the allocated space of the ring buffer according to an instruction of a kernel.

公开(公告)号：US10250896B2

公开(公告)日：2019-04-02

申请号：US15287857

申请日：2016-10-07

Applicant: VIA ALLIANCE SEMICONDUCTOR CO., LTD.

Inventor： Heng Que ,  Deming Gu ,  Zhou Hong ,  Yuanfeng Wang

IPC: H04N19/176 ,  H04N19/17 ,  H04N19/436 ,  H04N19/593

Abstract: An image compression method based on JPEG-LS is presented. In the method, the M×N pixels in the source image are divided into k groups. M, N, and k are all integers larger than one. Each group corresponds to a plurality of pixels among the M×N pixels. The decorrelation procedure and the context modeling procedure are performed for each of the plurality of pixels in the ith group of the k groups. The compensation look-up table is not refreshed until all pixels in the ith group are performed with the decorrelation procedure and the context modeling procedure.

公开(公告)号：US10037590B2

公开(公告)日：2018-07-31

申请号：US14836102

申请日：2015-08-26

Applicant: VIA Alliance Semiconductor Co., Ltd.

Inventor： Fengxia Wu ,  Yuanfeng Wang ,  Zhou Hong ,  Heng Que

IPC: G06T1/20 ,  G06T7/50 ,  G06F1/32 ,  G06T1/60 ,  G06T11/00 ,  G06T11/20 ,  G06T11/60 ,  G09G5/10

CPC classification number: G06T1/20 ,  G06F1/3287 ,  G06T1/60 ,  G06T7/50 ,  G06T11/001 ,  G06T11/20 ,  G06T11/60 ,  G09G5/10 ,  G09G2330/021 ,  Y02D10/171

Abstract: A graphics processing unit and associated graphics processing method are provided. The graphics processing unit includes: an execution unit, for performing shader execution and texture loading; a fixed-function unit, for executing a graphics rendering pipeline; a memory-access unit; a texture unit, for reading texture data from a memory via the memory-access unit according to the data requirement of the execution unit or the fixed-function unit; and a command stream parser, for receiving a draw command from a display driver, and transmitting the draw command to the execution unit or the fixed-function unit to perform graphics processing according to the type of draw command. When the command stream parser determines that the draw command is a specific draw command, the command stream parser transmits the draw command only to the fixed-function unit to perform graphics processing, and turns off power to the execution unit.

公开(公告)号：US09959660B2

公开(公告)日：2018-05-01

申请号：US15174253

申请日：2016-06-06

Applicant: VIA ALLIANCE SEMICONDUCTOR CO., LTD.

Inventor： Fengxia Wu ,  Wei Zhang ,  Zhou Hong ,  Yuanfeng Wang

IPC: G06T15/00 ,  G06T1/60 ,  G06T15/80 ,  G06T19/20

CPC classification number: G06T15/005 ,  G06T1/60 ,  G06T15/80 ,  G06T19/20 ,  G06T2200/04 ,  G06T2200/28

Abstract: A device for image processing includes a first queue, a second queue, a cache, and a processor. The first queue is capable of receiving a first image tile. The processor is electrically connected to the first queue, the second queue, and the cache, respectively. The processor is capable of obtaining the first image tile from the first queue and obtaining mask information of the background mask corresponding to the first tile from the cache. The processor determines the relationship between the first image tile and the background mask based on the first image tile and the mask information so as to selectively transfer the first image tile to the second queue.