公开(公告)号：US20060013034A1

公开(公告)日：2006-01-19

申请号：US11229955

申请日：2005-09-19

申请人： Tyler Lowrey ,  Guy Wicker ,  Edward Spall

发明人： Tyler Lowrey ,  Guy Wicker ,  Edward Spall

IPC分类号： G11C11/00

CPC分类号： G11C13/0004 ,  G11C2013/0083 ,  G11C2029/4402

摘要： A method of customizing an integrated circuit chip, comprising the steps of: providing an electronic circuit on said chip; providing a phase-change memory on the chip; storing information about said electronic circuit in the phase-change memory. A method of operating an optical display.

摘要翻译： 一种定制集成电路芯片的方法，包括以下步骤：在所述芯片上提供电子电路; 在芯片上提供相变存储器; 将关于所述电子电路的信息存储在相变存储器中。 一种操作光学显示器的方法。

公开(公告)号：US06567296B1

公开(公告)日：2003-05-20

申请号：US10041684

申请日：2001-10-24

申请人： Giulio Casagrande ,  Tyler Lowrey ,  Roberto Bez ,  Guy Wicker ,  Edward Spall ,  Stephen Hudgens ,  Wolodymyr Czubatyj

发明人： Giulio Casagrande ,  Tyler Lowrey ,  Roberto Bez ,  Guy Wicker ,  Edward Spall ,  Stephen Hudgens ,  Wolodymyr Czubatyj

IPC分类号： G11C1706

CPC分类号： G11C11/56 ,  G11C11/5678 ,  G11C13/0004 ,  G11C2213/72

摘要： A memory device including a plurality of memory cells, a plurality of insulated first regions of a first type of conductivity formed in a chip of semiconductor material, at least one second region of a second type of conductivity formed in each first region, a junction between each second region and the corresponding first region defining a unidirectional conduction access element for selecting a corresponding memory cell connected to the second region when forward biased, and at least one contact for contacting each first region; a plurality of access elements are formed in each first region, the access elements being grouped into at least one sub-set consisting of a plurality of adjacent access elements without interposition of any contact, and the memory device further includes means for forward biasing the access elements of each sub-set simultaneously.

摘要翻译： 一种存储器件，包括多个存储器单元，形成在半导体材料的芯片中的第一类型的导电性的多个绝缘的第一区域，在每个第一区域中形成的至少一个第二导电类型的第二区域， 每个第二区域和相应的第一区域限定单向传导访问元件，用于当正向偏置时选择连接到第二区域的对应的存储单元，以及用于接触每个第一区域的至少一个触点; 在每个第一区域中形成多个访问元件，所述访问元件被分组成由多个相邻的访问元件组成的至少一个子集，而不插入任何联系人，并且所述存储器设备还包括： 每个子集的元素同时进行。

公开(公告)号：US08379439B2

公开(公告)日：2013-02-19

申请号：US12640723

申请日：2009-12-17

申请人： Tyler Lowrey ,  Ward Parkinson ,  Guy Wicker

发明人： Tyler Lowrey ,  Ward Parkinson ,  Guy Wicker

IPC分类号： G11C11/00

CPC分类号： G11C13/003 ,  G11C13/0004 ,  G11C2213/76 ,  G11C2213/77 ,  H01L27/2427 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/141

摘要： A memory element, a threshold switching element, or the series combination of a memory element and a threshold switching element may be used for coupling conductive lines in an electrically programmable matrix array. Leakage may be reduced by optionally placing a breakdown layer in series with the phase-change material and/or threshold switching material between the conductive lines. The matrix array may be used in a programmable logic device.

摘要翻译： 可以使用存储元件，阈值开关元件或存储元件和阈值开关元件的串联组合来耦合电可编程矩阵阵列中的导线。 可以通过选择性地将导电线之间的相变材料和/或阈值开关材料串联的击穿层来降低泄漏。 矩阵阵列可以用在可编程逻辑器件中。

公开(公告)号：US20090034325A1

公开(公告)日：2009-02-05

申请号：US12286784

申请日：2008-10-02

申请人： Tyler Lowrey ,  Ward Parkinson ,  Guy Wicker

发明人： Tyler Lowrey ,  Ward Parkinson ,  Guy Wicker

IPC分类号： G11C11/00

CPC分类号： G11C13/003 ,  G11C13/0004 ,  G11C2213/72 ,  G11C2213/75 ,  G11C2213/76 ,  G11C2213/79 ,  H01L27/2427

摘要： A chalcogenide material is proposed for programming the cross-connect transistor coupling interconnect lines of an electrically programmable matrix array. Leakage may be reduced by optionally placing a thin insulating breakdown layer in series with the select device or a phase change material. The matrix array may be used in a programmable logic device.

摘要翻译： 提出硫族化物材料来编程电可编程矩阵阵列的交叉连接晶体管耦合互连线。 可以通过选择性地将薄绝缘击穿层与选择装置或相变材料串联来减小泄漏。 矩阵阵列可以用在可编程逻辑器件中。

公开(公告)号：US20070096074A1

公开(公告)日：2007-05-03

申请号：US11264129

申请日：2005-11-02

申请人： Isamu Asano ,  Natsuki Sato ,  Tyler Lowrey ,  Guy Wicker ,  Wolodymyr Czubatyj ,  Stephen Hudgens

发明人： Isamu Asano ,  Natsuki Sato ,  Tyler Lowrey ,  Guy Wicker ,  Wolodymyr Czubatyj ,  Stephen Hudgens

IPC分类号： H01L47/00

CPC分类号： H01L45/06 ,  H01L27/2436 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/144 ,  H01L45/148

摘要： A non-volatile memory element includes a first interlayer insulation layer 11 having a first through-hole 11a, a second interlayer insulation layer 12 having a second through-hole 12a formed on the first interlayer insulation layer 11, a bottom electrode 13 provided in the first through-hole 11, recording layer 15 containing phase change material provided in the second through-hole 12, a top electrode 16 provided on the second interlayer insulation layer 12, and a thin-film insulation layer 14 formed between the bottom electrode 13 and the recording layer 15. In accordance with this invention, the diameter D1 of a bottom electrode 13 buried in a first through-hole 11a is smaller than the diameter D2 of a second through-hole 12a, thereby decreasing the thermal capacity of the bottom electrode 13. Therefore, when a pore 14a is formed by dielectric breakdown in a thin-film insulation layer 14 and the vicinity is used as a heating region, the amount of heat escaping to the bottom electrode 13 is decreased, resulting in higher heating efficiency.

摘要翻译： 非易失性存储元件包括具有第一通孔11a的第一层间绝缘层11，具有形成在第一层间绝缘层11上的第二通孔12a的第二层间绝缘层12， 在第一通孔11中，设置在第二通孔12中的包含相变材料的记录层15，设置在第二层间绝缘层12上的顶部电极16和形成在第二通孔12的底部电极之间的薄膜绝缘层14 13和记录层15。 根据本发明，埋在第一通孔11a中的底部电极13的直径D 1小于第二通孔12a的直径D 2，从而降低底部电极13的热容量 。 因此，当通过薄膜绝缘层14中的电介质击穿形成孔14a并且将其附近用作加热区域时，逸出到底部电极13的热量减少，导致更高的加热效率。

公开(公告)号：US20060097240A1

公开(公告)日：2006-05-11

申请号：US11209079

申请日：2005-08-22

申请人： Tyler Lowrey ,  Ward Parkinson ,  Guy Wicker

发明人： Tyler Lowrey ,  Ward Parkinson ,  Guy Wicker

IPC分类号： H01L29/06

CPC分类号： G11C13/003 ,  G11C13/0004 ,  G11C2213/76 ,  G11C2213/77 ,  H01L27/2427 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/141

摘要： A memory element, a threshold switching element, or the series combination of a memory element and a threshold switching element may be used for coupling conductive lines in an electrically programmable matrix array. Leakage may be reduced by optionally placing a breakdown layer in series with the phase-change material and/or threshold switching material between the conductive lines. The matrix array may be used in a programmable logic device.

公开(公告)号：US20100091561A1

公开(公告)日：2010-04-15

申请号：US12640723

申请日：2009-12-17

申请人： Tyler Lowrey ,  Ward Parkinson ,  Guy Wicker

发明人： Tyler Lowrey ,  Ward Parkinson ,  Guy Wicker

IPC分类号： G11C11/00 ,  H03K19/177

CPC分类号： G11C13/003 ,  G11C13/0004 ,  G11C2213/76 ,  G11C2213/77 ,  H01L27/2427 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/141

摘要： A memory element, a threshold switching element, or the series combination of a memory element and a threshold switching element may be used for coupling conductive lines in an electrically programmable matrix array. Leakage may be reduced by optionally placing a breakdown layer in series with the phase-change material and/or threshold switching material between the conductive lines. The matrix array may be used in a programmable logic device.

摘要翻译： 可以使用存储元件，阈值开关元件或存储元件和阈值开关元件的串联组合来耦合电可编程矩阵阵列中的导线。 可以通过选择性地将导电线之间的相变材料和/或阈值开关材料串联的击穿层来降低泄漏。 矩阵阵列可以用在可编程逻辑器件中。

公开(公告)号：US20080048167A1

公开(公告)日：2008-02-28

申请号：US11975615

申请日：2007-10-19

申请人： Sergey Kostylev ,  Tyler Lowrey ,  Guy Wicker ,  Wolodymyr Czubatyj

发明人： Sergey Kostylev ,  Tyler Lowrey ,  Guy Wicker ,  Wolodymyr Czubatyj

IPC分类号： H01L45/00

CPC分类号： H01L45/06 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/1625

摘要： A chalcogenide material and chalcogenide memory device having less stringent requirements for formation, improved thermal stability and/or faster operation. The chalcogenide materials include materials comprising Ge, Sb and Te in which the Ge and/or Te content is lean relative to the commonly used Ge2Sb2Te5 chalcogenide composition. Electrical devices containing the instant chalcogenide materials show a rapid convergence of the set resistance during cycles of setting and resetting the device from its as-fabricated state, thus leading to a reduced or eliminated need to subject the device to post-fabrication electrical formation prior to end-use operation. Improved thermal stability is manifested in terms of prolonged stability of the resistance of the device at elevated temperatures, which leads to an inhibition of thermally induced setting of the reset state in the device. Significant improvements in the 10 year data retention temperature are demonstrated. Faster device operation is achieved through an increased speed of crystallization, which acts to shorten the time required to transform the chalcogenide material from its reset state to its set state in an electrical memory device.

摘要翻译： 一种硫族化物材料和硫族化物记忆装置，其对形成，改进的热稳定性和/或更快的操作要求不太严格。 硫属化物材料包括Ge，Sb和Te的材料，其中Ge和/或Te含量相对于通常使用的Ge 2 Sb 2 Te 5是稀的 硫族化合物组合物。 包含瞬时硫族化物材料的电气装置显示设定循环期间的设定电阻的快速收敛以及将器件从其制造状态复位，从而导致减少或消除了将器件置于后制造电形成之前 最终使用操作。 改进的热稳定性表现在器件在升高的温度下的电阻的延长的稳定性，这导致抑制器件中复位状态的热诱导设置。 展示了10年数据保存温度的显着改进。 通过提高结晶速度实现更快的器件操作，其用于缩短将硫族化物材料从其复位状态转换到其在电存储器件中的设定状态所需的时间。

公开(公告)号：US20060157689A1

公开(公告)日：2006-07-20

申请号：US11037850

申请日：2005-01-18

申请人： Wolodymyr Czubatyj ,  Sergey Kostylev ,  Tyler Lowrey ,  Guy Wicker

发明人： Wolodymyr Czubatyj ,  Sergey Kostylev ,  Tyler Lowrey ,  Guy Wicker

IPC分类号： H01L29/08 ,  H01L21/84

CPC分类号： H01L45/1233 ,  H01L27/2427 ,  H01L45/00 ,  H01L45/06 ,  H01L45/1253 ,  H01L45/1293 ,  H01L45/141

摘要： A carbon containing layer may be formed between a pair of chalcogenide containing layers of a phase change memory. When the lower chalcogenide layer allows current to pass, a filament may be formed therein. The filament then localizes the electrical heating of the carbon containing layer, converting a relatively localized region to a lower conductivity region. This region then causes the localization of heating and current flow through the upper phase change material layer. In some embodiments, less phase change material may be required to change phase to form a phase change memory, reducing the current requirements of the resulting phase change memory.

摘要翻译： 含碳层可以形成在一对含硫族化物的含相变层的层之间。 当下部硫族化物层允许电流通过时，可以在其中形成细丝。 然后，细丝将含碳层的电加热定位，将相对局部化的区域转化为较低的导电性区域。 该区域然后导致加热和电流流过上相变材料层的定位。 在一些实施例中，可能需要较少的相变材料来改变相位以形成相变存储器，从而减少所得到的相变存储器的电流要求。

公开(公告)号：US20100321991A1

公开(公告)日：2010-12-23

申请号：US12871975

申请日：2010-08-31

申请人： Sergey A. Kostylev ,  Tyler Lowrey ,  Guy Wicker ,  Wolodymyr Czubatyj

发明人： Sergey A. Kostylev ,  Tyler Lowrey ,  Guy Wicker ,  Wolodymyr Czubatyj

IPC分类号： G11C11/00

CPC分类号： H01L45/06 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/1625

摘要： A chalcogenide material and chalcogenide memory device having less stringent requirements for formation, improved thermal stability and/or faster operation. The chalcogenide materials include materials comprising Ge, Sb and Te in which the Ge and/or Te content is lean relative to the commonly used Ge2Sb2Te5 chalcogenide composition. Electrical devices containing the instant chalcogenide materials show a rapid convergence of the set resistance during cycles of setting and resetting the device from its as-fabricated state, thus leading to a reduced or eliminated need to subject the device to post-fabrication electrical formation prior to end-use operation. Improved thermal stability is manifested in terms of prolonged stability of the resistance of the device at elevated temperatures, which leads to an inhibition of thermally induced setting of the reset state in the device. Significant improvements in the 10 year data retention temperature are demonstrated. Faster device operation is achieved through an increased speed of crystallization, which acts to shorten the time required to transform the chalcogenide material from its reset state to its set state in an electrical memory device.

摘要翻译： 一种硫族化物材料和硫族化物记忆装置，其对形成，改进的热稳定性和/或更快的操作要求不太严格。 硫属化物材料包括Ge，Sb和Te的材料，其中Ge和/或Te含量相对于通常使用的Ge 2 Sb 2 Te 5硫族化物组合物是稀的。 包含瞬时硫族化物材料的电气装置显示设定循环期间的设定电阻的快速收敛以及将器件从其制造状态复位，从而导致减少或消除了将器件置于后制造电形成之前 最终使用操作。 改进的热稳定性表现在器件在升高的温度下的电阻的延长的稳定性，这导致抑制器件中复位状态的热诱导设置。 展示了10年数据保存温度的显着改进。 通过提高结晶速度实现更快的器件操作，其用于缩短将硫族化物材料从其复位状态转换到其在电存储器件中的设定状态所需的时间。