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公开(公告)号：US08614469B2
公开(公告)日：2013-12-24
申请号：US13605995
申请日：2012-09-06
IPC分类号： H01L29/76
CPC分类号： H01L21/823412 , H01L21/28052 , H01L21/823468 , H01L21/823807 , H01L27/088 , H01L29/665 , H01L29/6653 , H01L29/7843
摘要： A semiconductor device capable of improving the driving power and a manufacturing method therefor are provided. In a semiconductor device, a gate structure formed by successively stacking a gate oxide film and a silicon layer is arranged over a semiconductor substrate. An oxide film is arranged long the lateral side of the gate structure and another oxide film is arranged along the lateral side of the oxide film and the upper surface of the substrate. In the side wall oxide film comprising these oxide films, the minimum value of the thickness of the first layer along the lateral side of the gate structure is less than the thickness of the second layer along the upper surface of the substrate.
摘要翻译： 提供了能够提高驱动能力的半导体装置及其制造方法。 在半导体器件中，通过连续堆叠栅极氧化膜和硅层形成的栅极结构布置在半导体衬底上。 在栅极结构的侧面设置氧化膜的长度较长，另一方的氧化膜沿着氧化膜的侧面和基板的上表面配置。 在包含这些氧化物膜的侧壁氧化物膜中，沿着栅极结构的横向侧的第一层的厚度的最小值小于沿着衬底的上表面的第二层的厚度。
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公开(公告)号：US20120326246A1
公开(公告)日：2012-12-27
申请号：US13605995
申请日：2012-09-06
IPC分类号： H01L29/78
CPC分类号： H01L21/823412 , H01L21/28052 , H01L21/823468 , H01L21/823807 , H01L27/088 , H01L29/665 , H01L29/6653 , H01L29/7843
摘要： A semiconductor device capable of improving the driving power and a manufacturing method therefor are provided. In a semiconductor device, a gate structure formed by successively stacking a gate oxide film and a silicon layer is arranged over a semiconductor substrate. An oxide film is arranged long the lateral side of the gate structure and another oxide film is arranged along the lateral side of the oxide film and the upper surface of the substrate. In the side wall oxide film comprising these oxide films, the minimum value of the thickness of the first layer along the lateral side of the gate structure is less than the thickness of the second layer along the upper surface of the substrate.
摘要翻译： 提供了能够提高驱动能力的半导体装置及其制造方法。 在半导体器件中，通过连续堆叠栅极氧化膜和硅层形成的栅极结构布置在半导体衬底上。 在栅极结构的侧面设置氧化膜的长度较长，另一方的氧化膜沿着氧化膜的侧面和基板的上表面配置。 在包含这些氧化物膜的侧壁氧化物膜中，沿着栅极结构的横向侧的第一层的厚度的最小值小于沿着衬底的上表面的第二层的厚度。
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公开(公告)号：US08294186B2
公开(公告)日：2012-10-23
申请号：US13155279
申请日：2011-06-07
IPC分类号： H01L29/76
CPC分类号： H01L21/823412 , H01L21/28052 , H01L21/823468 , H01L21/823807 , H01L27/088 , H01L29/665 , H01L29/6653 , H01L29/7843
摘要： A semiconductor device capable of improving the driving power and a manufacturing method therefor are provided. In a semiconductor device, a gate structure formed by successively stacking a gate oxide film and a silicon layer is arranged over a semiconductor substrate. An oxide film is arranged long the lateral side of the gate structure and another oxide film is arranged along the lateral side of the oxide film and the upper surface of the substrate. In the side wall oxide film comprising these oxide films, the minimum value of the thickness of the first layer along the lateral side of the gate structure is less than the thickness of the second layer along the upper surface of the substrate.
摘要翻译： 提供了能够提高驱动能力的半导体装置及其制造方法。 在半导体器件中，通过连续堆叠栅极氧化膜和硅层形成的栅极结构布置在半导体衬底上。 在栅极结构的侧面设置氧化膜的长度较长，另一方的氧化膜沿着氧化膜的侧面和基板的上表面配置。 在包含这些氧化物膜的侧壁氧化物膜中，沿着栅极结构的横向侧的第一层的厚度的最小值小于沿着衬底的上表面的第二层的厚度。
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公开(公告)号：US20110233626A1
公开(公告)日：2011-09-29
申请号：US13155279
申请日：2011-06-07
IPC分类号： H01L29/78
CPC分类号： H01L21/823412 , H01L21/28052 , H01L21/823468 , H01L21/823807 , H01L27/088 , H01L29/665 , H01L29/6653 , H01L29/7843
摘要： A semiconductor device capable of improving the driving power and a manufacturing method therefor are provided. In a semiconductor device, a gate structure formed by successively stacking a gate oxide film and a silicon layer is arranged over a semiconductor substrate. An oxide film is arranged long the lateral side of the gate structure and another oxide film is arranged along the lateral side of the oxide film and the upper surface of the substrate. In the side wall oxide film comprising these oxide films, the minimum value of the thickness of the first layer along the lateral side of the gate structure is less than the thickness of the second layer along the upper surface of the substrate.
摘要翻译： 提供了能够提高驱动能力的半导体装置及其制造方法。 在半导体器件中，通过连续堆叠栅极氧化膜和硅层形成的栅极结构布置在半导体衬底上。 在栅极结构的侧面设置氧化膜的长度较长，另一方的氧化膜沿着氧化膜的侧面和基板的上表面配置。 在包含这些氧化物膜的侧壁氧化物膜中，沿着栅极结构的横向侧的第一层的厚度的最小值小于沿着衬底的上表面的第二层的厚度。
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公开(公告)号：US20090127627A1
公开(公告)日：2009-05-21
申请号：US12250526
申请日：2008-10-13
IPC分类号： H01L27/08 , H01L21/3205
CPC分类号： H01L21/823412 , H01L21/28052 , H01L21/823468 , H01L21/823807 , H01L27/088 , H01L29/665 , H01L29/6653 , H01L29/7843
摘要： A semiconductor device capable of improving the driving power and a manufacturing method therefor are provided. In a semiconductor device, a gate structure formed by successively stacking a gate oxide film and a silicon layer is arranged over a semiconductor substrate. An oxide film is arranged long the lateral side of the gate structure and another oxide film is arranged along the lateral side of the oxide film and the upper surface of the substrate. In the side wall oxide film comprising these oxide films, the minimum value of the thickness of the first layer along the lateral side of the gate structure is less than the thickness of the second layer along the upper surface of the substrate.
摘要翻译： 提供了能够提高驱动能力的半导体装置及其制造方法。 在半导体器件中，通过连续堆叠栅极氧化膜和硅层形成的栅极结构布置在半导体衬底上。 在栅极结构的侧面设置氧化膜的长度较长，另一方的氧化膜沿着氧化膜的侧面和基板的上表面配置。 在包含这些氧化物膜的侧壁氧化物膜中，沿着栅极结构的横向侧的第一层的厚度的最小值小于沿着衬底的上表面的第二层的厚度。
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公开(公告)号：US20120080757A1
公开(公告)日：2012-04-05
申请号：US13376081
申请日：2009-06-05
申请人： Hisayuki Kato , Yoshihiko Kusakabe
发明人： Hisayuki Kato , Yoshihiko Kusakabe
IPC分类号： H01L27/092 , H01L21/8238
CPC分类号： H01L21/823468 , H01L21/823418 , H01L21/823814 , H01L21/823864 , H01L22/26 , H01L29/517 , H01L29/665 , H01L29/6656 , H01L29/6659
摘要： First protective films are formed to cover side surfaces of gate electrode portions. In an nMOS region, an extention implantation region is formed by causing a portion of the first protective film located on the side surface of the gate electrode portion to function as an offset spacer and using the offset spacer as a mask, and then, cleaning is done. Since silicon nitride films are formed on surfaces of the first protective films, the resistance to chemical solutions is improved. Furthermore, second protective films are formed on the first protective films, respectively. In a pMOS region, an extention implantation region is formed by causing a portion of the first protective film and a portion of the second protective film located on the side surface of the gate electrode portion to function as an offset spacer and using the offset spacer as the mask, and then, cleaning is done.
摘要翻译： 形成第一保护膜以覆盖栅电极部分的侧表面。 在nMOS区域中，通过使位于栅极电极部分的侧表面上的第一保护膜的一部分用作偏移间隔物并使用偏移间隔物作为掩模来形成延伸注入区域，然后清洁 完成了 由于在第一保护膜的表面上形成氮化硅膜，因此提高了对化学溶液的耐性。 此外，在第一保护膜上分别形成第二保护膜。 在pMOS区域中，通过使第一保护膜的一部分和位于栅极电极部分的侧表面上的第二保护膜的一部分用作偏移间隔物并使用偏移间隔物形成延伸注入区 面具，然后进行清洁。
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公开(公告)号：US07411834B2
公开(公告)日：2008-08-12
申请号：US11701404
申请日：2007-02-02
摘要： A sub-decoder element provided corresponding to each word line is constructed by the same conductive type MOS transistors. The sub-decoder elements are arranged in a plurality of columns such that the layout of active regions for forming the sub-decoder elements is inverted in a Y direction and displaced by one sub-decoder element in an X direction. The arrangement of the sub-decoder elements is adjusted such that high voltage is not applied to both of gate electrodes adjacent in the Y direction. A well voltage of a well region for forming the sub-decoder element group is set to a voltage level such that a source to substrate of the transistor of the sub-decoder element is set into a deep reversed-bias state. In a nonvolatile semiconductor memory device, the leakage by a parasitic MOS in a sub-decoder circuit or word line driving circuit to which a positive or negative high voltage is supplied, can be suppressed.
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公开(公告)号：US08039336B2
公开(公告)日：2011-10-18
申请号：US12915683
申请日：2010-10-29
IPC分类号： H01L21/8232
CPC分类号： H01L21/28273 , H01L21/76232 , H01L27/115 , H01L27/11521
摘要： A method includes the steps of: introducing insulation film into a trench to provide a trench isolation; planarizing the trench isolation to expose a passivation film; and removing the passivation film and depositing a second silicon layer on a first silicon layer and the trench isolation; and in the step of depositing the first silicon layer the first silicon layer is an undoped silicon layer and in the step of depositing the second silicon layer the second silicon layer is a doped silicon layer or an undoped silicon layer subsequently having an impurity introduced thereinto or the like and thermally diffused through subsequent thermal hysteresis into the first silicon layer.
摘要翻译： 一种方法包括以下步骤：将绝缘膜引入沟槽以提供沟槽隔离; 平坦化沟槽隔离以暴露钝化膜; 以及去除所述钝化膜并在第一硅层上沉积第二硅层和所述沟槽隔离; 并且在沉积第一硅层的步骤中，第一硅层是未掺杂的硅层，并且在沉积第二硅层的步骤中，第二硅层是掺杂硅层或随后具有引入杂质的未掺杂硅层，或 并且通过随后的热滞后热扩散到第一硅层中。
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公开(公告)号：US20100099234A1
公开(公告)日：2010-04-22
申请号：US12643646
申请日：2009-12-21
IPC分类号： H01L21/762
CPC分类号： H01L21/28273 , H01L21/76232 , H01L27/115 , H01L27/11521
摘要： A method includes the steps of: introducing insulation film into a trench to provide a trench isolation; planarizing the trench isolation to expose a passivation film; and removing the passivation film and depositing a second silicon layer on a first silicon layer and the trench isolation; and in the step of depositing the first silicon layer the first silicon layer is an undoped silicon layer and in the step of depositing the second silicon layer the second silicon layer is a doped silicon layer or an undoped silicon layer subsequently having an impurity introduced thereinto or the like and thermally diffused through subsequent thermal hysteresis into the first silicon layer.
摘要翻译： 一种方法包括以下步骤：将绝缘膜引入沟槽以提供沟槽隔离; 平坦化沟槽隔离以暴露钝化膜; 以及去除所述钝化膜并在第一硅层上沉积第二硅层和所述沟槽隔离; 并且在沉积第一硅层的步骤中，第一硅层是未掺杂的硅层，并且在沉积第二硅层的步骤中，第二硅层是掺杂硅层或随后具有引入杂质的未掺杂硅层，或 并且通过随后的热滞后热扩散到第一硅层中。
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公开(公告)号：US20080290453A1
公开(公告)日：2008-11-27
申请号：US12219402
申请日：2008-07-22
IPC分类号： H01L29/00
CPC分类号： H01L21/28273 , H01L21/76232 , H01L27/115 , H01L27/11521
摘要： A method includes the steps of: introducing insulation film into a trench to provide a trench isolation; planarizing the trench isolation to expose a passivation film; and removing the passivation film and depositing a second silicon layer on a first silicon layer and the trench isolation; and in the step of depositing the first silicon layer the first silicon layer is an undoped silicon layer and in the step of depositing the second silicon layer the second silicon layer is a doped silicon layer or an undoped silicon layer subsequently having an impurity introduced thereinto or the like and thermally diffused through subsequent thermal hysteresis into the first silicon layer.
摘要翻译： 一种方法包括以下步骤：将绝缘膜引入沟槽以提供沟槽隔离; 平坦化沟槽隔离以暴露钝化膜; 以及去除所述钝化膜并在第一硅层上沉积第二硅层和所述沟槽隔离; 并且在沉积第一硅层的步骤中，第一硅层是未掺杂的硅层，并且在沉积第二硅层的步骤中，第二硅层是掺杂硅层或随后具有引入杂质的未掺杂硅层，或 并且通过随后的热滞后热扩散到第一硅层中。
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