Self-calibrating RC oscillator
    1.
    发明授权
    Self-calibrating RC oscillator 失效
    自校准RC振荡器

    公开(公告)号:US5594388A

    公开(公告)日:1997-01-14

    申请号:US479304

    申请日:1995-06-07

    CPC classification number: H03K3/03

    Abstract: An RC oscillator includes an RC network for forming a time constant equal to the RC product. However, this RC time constant is not used in the manner of a typical RC network to set the frequency of oscillation. Instead, the RC oscillator disclosed herein includes a separate oscillator, such as a voltage-controlled oscillator (VCO), and uses the RC time constant to compare with the oscillator-generated period and to adjust the frequency of the overall RC oscillator circuit in accordance with the comparison. The RC oscillator is self-calibrating.

    Abstract translation: RC振荡器包括用于形成等于RC乘积的时间常数的RC网络。 然而,这种RC时间常数不是以典型的RC网络的方式来设置振荡频率。 相反,本文公开的RC振荡器包括单独的振荡器,例如压控振荡器(VCO),并且使用RC时间常数来与振荡器产生的周期进行比较,并且根据RC振荡器电路的频率调整 与比较。 RC振荡器是自校准的。

    Digitally-tuned oscillator including a self-calibrating RC oscillator
circuit
    2.
    发明授权
    Digitally-tuned oscillator including a self-calibrating RC oscillator circuit 失效
    数字调谐振荡器包括一个自校准RC振荡电路

    公开(公告)号:US5552748A

    公开(公告)日:1996-09-03

    申请号:US479299

    申请日:1995-06-07

    Abstract: A digitally-tuned oscillator (DTO) includes a digital-to-analog converter (DAC) and an RC oscillator. The RC oscillator includes an RC circuit for forming a time constant equal to the RC product. However, this RC time constant is not used in the manner of a typical RC network to set the frequency of oscillation. Instead, the RC oscillator disclosed herein includes a separate oscillator, such as a voltage-controlled oscillator (VCO), and uses the RC time constant to compare with the oscillator-generated period and to adjust the frequency of the overall RC oscillator circuit in accordance with the comparison. The RC oscillator is self-calibrating.

    Abstract translation: 数字调谐振荡器(DTO)包括数模转换器(DAC)和RC振荡器。 RC振荡器包括用于形成等于RC积的时间常数的RC电路。 然而,这种RC时间常数不是以典型的RC网络的方式来设置振荡频率。 相反,本文公开的RC振荡器包括单独的振荡器,例如压控振荡器(VCO),并且使用RC时间常数来与振荡器产生的周期进行比较,并且根据RC振荡器电路的频率调整 与比较。 RC振荡器是自校准的。

    Stability-compensated operational amplifier
    3.
    发明授权
    Stability-compensated operational amplifier 失效
    稳定运算放大器

    公开(公告)号:US5023567A

    公开(公告)日:1991-06-11

    申请号:US533890

    申请日:1990-06-06

    Abstract: A stability-compensated, integrated-circuit operational amplifier has an open-loop gain versus frequency characteristic which provides stable and accurate closed-loop operation in numerous overall circuits including a CMOS circuit for producing a precision current as a reference to a digital-to-analog converter. The operational amplifier comprises an inverting node and a non-inverting node, and CMOS circuitry defining two differential amplifiers. Each differential amplifier is connected to the inverting node and the non-inverting node. The first differential amplifier has an output node, and produces on the output node an output potential that defines an output signal having a magnitude that is a function of the magnitude of the difference between a first potential at the inverting node and a second potential at the non-inverting node. The second differential amplifier is also connected to the inverting node and the non-inverting node. The second differential amplifier produces a compensation signal. The operational amplifier further includes capacitive circuitry for coupling the compensation signal to the non-inverting node.

    Abstract translation: 稳定补偿的集成电路运算放大器具有开环增益与频率特性,其在许多总体电路中提供稳定和精确的闭环操作,包括用于产生精密电流的CMOS电路,作为数字 - 模拟转换器。 运算放大器包括反相节点和非反相节点,以及限定两个差分放大器的CMOS电路。 每个差分放大器连接到反相节点和非反相节点。 第一差分放大器具有输出节点,并且在输出节点上产生输出电位,该输出电位定义输出信号,该输出信号的幅度是反相节点处的第一电位和第二电位之间的差值的大小的函数 非反相节点。 第二差分放大器也连接到反相节点和非反相节点。 第二个差分放大器产生补偿信号。 运算放大器还包括用于将补偿信号耦合到非反相节点的电容电路。

    Timing circuit with rapid initialization on power-up
    4.
    发明授权
    Timing circuit with rapid initialization on power-up 失效
    定时电路在上电时快速初始化

    公开(公告)号:US5617062A

    公开(公告)日:1997-04-01

    申请号:US479300

    申请日:1995-06-07

    CPC classification number: H03L7/02 H03K3/0231 H03L7/00

    Abstract: A timer initialization circuit is used to stabilize a timing signal of a system timed using a core oscillator. The timer initialization circuit includes a circuit which disables the core oscillator during a power-down mode and re-enables the core oscillator upon termination of the power-down mode. The timer initialization circuit also includes a circuit which stores an indication of an oscillation frequency at which the circuit operates immediately preceding the power-down mode.

    Abstract translation: 使用定时器初始化电路来稳定使用核心振荡器定时的系统的定时信号。 定时器初始化电路包括在掉电模式期间禁用核心振荡器并在断电模式结束时重新使能核心振荡器的电路。 定时器初始化电路还包括一个电路,其存储在断电模式之前电路操作的振荡频率的指示。

    Frequency converter utilizing a feedback control loop
    5.
    发明授权
    Frequency converter utilizing a feedback control loop 失效
    变频器采用反馈控制回路

    公开(公告)号:US5521556A

    公开(公告)日:1996-05-28

    申请号:US379049

    申请日:1995-01-27

    CPC classification number: H03K3/0315 H03L7/097 H03L7/181

    Abstract: A monolithic frequency converter using a feedback control loop generates a source of synthesized frequency signals over a wide dynamic range based on a timing source such as a crystal oscillator or an external frequency source. The frequency converter includes a controlled oscillator, a frequency counter, a timing signal generator and, connected between the frequency counter and the controlled oscillator, a digital to analog converter and a difference integrator. The controlled oscillator generates a clock signal at a frequency controlled by an electrical signal. The difference integrator is connected to an input signal terminal and connected to the timing signal generator. The difference integrator determines a difference signal between the input signal and a signal operated upon by the digital to analog converter and integrates the difference signal under control of a timing signal generated by the timing signal generator. The frequency converter has a highly linear transfer function which is established by the resolution of a frequency counter. For example, a transfer function having approximately 0.1% accuracy in linearity is achieved using a 10-bit resolution frequency counter. Using indirect frequency synthesis, the controlled oscillator generates precisely controlled timing signals.

    Abstract translation: 使用反馈控制回路的单片变频器基于诸如晶体振荡器或外部频率源的定时源在宽动态范围上产生合成频率信号源。 变频器包括受控振荡器,频率计数器,定时信号发生器,并连接在频率计数器和受控振荡器之间,数模转换器和差分积分器。 受控振荡器以由电信号控制的频率产生时钟信号。 差分积分器连接到输入信号端并连接到定时信号发生器。 差分积分器确定输入信号和由数模转换器操作的信号之间的差分信号,并在由定时信号发生器产生的定时信号的控制下对差分信号进行积分。 变频器具有通过频率计数器的分辨率建立的高度线性传递函数。 例如,使用10位分辨率频率计数器实现线性精度约为0.1%的传递函数。 使用间接频率合成,受控振荡器产生精确控制的定时信号。

    Programmable multiple oscillator circuit
    6.
    发明授权
    Programmable multiple oscillator circuit 失效
    可编程多路振荡电路

    公开(公告)号:US4998075A

    公开(公告)日:1991-03-05

    申请号:US427197

    申请日:1989-10-26

    CPC classification number: H03L7/00 G06F1/08

    Abstract: A method for controlling a programmable source of a plurality of string of clock signals, a program is stored with a plurality of different indications of desired frequencies, each indication corresponding to one of the strings of clock signals. The frequency of each of a plurality of oscillator is controlled by the memory content of a separate memory for each oscillator. The content of each memory is adjusted in accordance with the actual frequency of each string, the frequency indicated by the corresponding indication of a desired frequency and a reference.

    Abstract translation: 一种用于控制多个时钟信号串的可编程源的方法,用多个不同的期望频率的指示存储程序,每个指示对应于时钟信号之一之一。 多个振荡器中的每一个的频率由每个振荡器的单独存储器的存储器内容来控制。 每个存储器的内容根据每个字符串的实际频率,由相应指示的期望频率和参考指示的频率进行调整。

    Circuit for detecting the absence of an external component
    7.
    发明授权
    Circuit for detecting the absence of an external component 失效
    用于检测外部元件不存在的电路

    公开(公告)号:US5589802A

    公开(公告)日:1996-12-31

    申请号:US479302

    申请日:1995-06-07

    CPC classification number: H03K3/03 G01R27/14 H03L7/00

    Abstract: A component detector circuit operates to detect the presence or absence of a circuit component, such as an external component. A resistor detecting circuit includes a biasing circuit connected to the resistor. The biasing circuit generating a bias current. The resistor detecting circuit also includes a bias current threshold detector connected to the biasing circuit and a circuit connected to the bias current threshold detector which generates a signal indicative that the bias current is lower than threshold. A capacitor detecting circuit includes a circuit connected to a resistor and configured to be connected to a capacitor which establishes a time constant proportional to an RC product of the resistor and capacitor. The capacitor detecting circuit also includes a circuit which determines whether the time constant is within a range of appropriate time constants and a circuit which generates a signal indicative that the time constant is outside the range of appropriate time constants, which indicates that the capacitor is disconnected.

    Abstract translation: 元件检测器电路用于检测诸如外部元件之类的电路元件的存在或不存在。 电阻检测电路包括连接到电阻器的偏置电路。 偏置电路产生偏置电流。 电阻检测电路还包括连接到偏置电路的偏置电流阈值检测器和连接到偏置电流阈值检测器的电路,其产生指示偏置电流低于阈值的信号。 电容器检测电路包括连接到电阻器并被配置为连接到电容器的电路,其建立与电阻器和电容器的RC乘积成比例的时间常数。 电容器检测电路还包括确定时间常数是否在适当的时间常数的范围内的电路和产生指示时间常数超出适当的时间常数的范围的信号的电路,该电平指示电容器断开 。

    Low power RC oscillator using a low voltage bias circuit
    8.
    发明授权
    Low power RC oscillator using a low voltage bias circuit 失效
    低功耗RC振荡器采用低压偏置电路

    公开(公告)号:US5585765A

    公开(公告)日:1996-12-17

    申请号:US479303

    申请日:1995-06-07

    CPC classification number: H03K3/0231 G05F3/247

    Abstract: A low power RC oscillator includes a low power bias circuit and an RC network. The RC network is used to form a time constant equal to the RC product. However, this RC time constant is not used in the manner of a typical RC network to set the frequency of oscillation. Instead, the RC oscillator disclosed herein includes a separate oscillator, such as a voltage-controlled oscillator (VCO), and uses the RC time constant to compare with the oscillator-generated period and to adjust the frequency of the overall RC oscillator circuit in accordance with the comparison. The RC oscillator is self-calibrating.

    Abstract translation: 低功率RC振荡器包括低功率偏置电路和RC网络。 RC网络用于形成等于RC产品的时间常数。 然而,这种RC时间常数不是以典型的RC网络的方式来设置振荡频率。 相反,本文公开的RC振荡器包括单独的振荡器,例如压控振荡器(VCO),并且使用RC时间常数来与振荡器产生的周期进行比较,并且根据RC振荡器电路的频率调整 与比较。 RC振荡器是自校准的。

    Triple comparator circuit
    9.
    发明授权
    Triple comparator circuit 失效
    三重比较电路

    公开(公告)号:US5115151A

    公开(公告)日:1992-05-19

    申请号:US535177

    申请日:1990-06-08

    CPC classification number: H03K5/2481 G01R19/0038

    Abstract: A comparator which is used to compare two analog voltages and provide a single ended output comprises three CMOS differential amplifiers. The use of three differential amplifiers provides improved matching of input capacitance, and a reduction in propagation delay over prior art use of a single differential amplifier. The comparator may be adopted for use in certain CMOS processes to extend the maximum operating voltage by limiting the internal node voltages otherwise subject to damage from impact ionization. An alternative embodiment is disclosed for comparing two analog voltages that are outside the power supply voltage range.

    Abstract translation: 用于比较两个模拟电压并提供单端输出的比较器包括三个CMOS差分放大器。 使用三个差分放大器提供输入电容的改进的匹配,并且与现有技术中使用单个差分放大器相比传播延迟的减小。 比较器可用于某些CMOS工艺中,以通过限制内部节点电压来延长最大工作电压,否则将受到冲击电离的损害。 公开了用于比较在电源电压范围之外的两个模拟电压的替代实施例。

    Digital-to-analog converter with bit weight segmented arrays
    10.
    发明授权
    Digital-to-analog converter with bit weight segmented arrays 失效
    具有位权重分段阵列的数模转换器

    公开(公告)号:US5017919A

    公开(公告)日:1991-05-21

    申请号:US533885

    申请日:1990-06-06

    CPC classification number: H03M1/682 H03M1/747

    Abstract: A DAC embodied in a CMOS integrated circuit converts a multi-bit digital signal to an analog-current signal. A higher-order portion of the digital signal, e.g., the most significant 5 bits of a byte, are decoded separately from the lower-order portion, e.g., the 3 least significant bits. The DAC includes circuitry for producing a first bias voltage, a first set of current sources each biased by the first bias voltage to produce a switchable current having a unit magnitude, and switching circuitry controlled by the decoded lower-order portion to cause a selected number of the unit-magnitude currents to contribute to the analog-current signal. The DAC further includes circuitry for producing a second bias voltage, a second set of current sources each biased by the second bias voltage to produce a switchable current having a multi-unit magnitude, and switching circuitry controlled by the decoded higher-order portion to cause a selected number of the multi-unit-magnitude currents to contribute to the analog-current signal.

    Abstract translation: CMOS集成电路中实现的DAC将多位数字信号转换为模拟电流信号。 数字信号的高阶部分(例如,一个字节的最高有效5位)与低阶部分(例如3个最低有效位)分开解码。 DAC包括用于产生第一偏置电压的电路,第一组电流源,每个电流源由第一偏置电压偏置以产生具有单位幅度的可切换电流,以及由解码的低阶部分控制的开关电路以引起所选择的数量 的单位幅度电流有助于模拟电流信号。 DAC还包括用于产生第二偏置电压的电路,每个由第二偏置电压偏置以产生具有多单位幅度的可切换电流的第二组电流源,以及由解码的高阶部分控制的开关电路, 选择数量的多单位幅度电流以有助于模拟电流信号。

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