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公开(公告)号：US20230135932A1
公开(公告)日：2023-05-04
申请号：US17515150
申请日：2021-10-29
摘要： An isolated power converter package includes a leadframe including a first and second die pad, first and second supports connected to first leads, second leads, at least one downset pad, and at least one downset feature between the supports and downset pad. A first semiconductor die is on the first die pad and a second semiconductor die is on the second die pad. The transformer stack includes a top and bottom side magnetic sheet on respective sides of a laminate substrate including an embedded coil that has coil contacts. Edges of the laminate substrate are on the supports. Bond wires are between the first die bond pads and the second leads, between the second die bond pads and the second leads, between the first die bond pads and coil contacts, and between the second die bond pads and the coil contacts. The downset pad is exposed from a mold compound.
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公开(公告)号：US11538766B2
公开(公告)日：2022-12-27
申请号：US16800043
申请日：2020-02-25
IPC分类号： H01L23/552 , H01L23/495 , H01L21/56 , H01F27/28 , H01L25/00
摘要： A packaged electronic device includes first conductive leads and second conductive leads at least partially exposed to an exterior of a package structure, and a multilevel lamination structure in the package structure. The multilevel lamination structure includes a first patterned conductive feature having multiple turns in a first level to form a first winding coupled to at least one of the first conductive leads in a first circuit, a second patterned conductive feature having multiple turns in a different level to form a second winding coupled to at least one of the second conductive leads in a second circuit isolated from the first circuit, and a conductive shield trace having multiple turns in a second level spaced apart from and between the first patterned conductive feature and the second patterned conductive feature, the conductive shield trace coupled in the first circuit.
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公开(公告)号：US11967566B2
公开(公告)日：2024-04-23
申请号：US18086610
申请日：2022-12-21
IPC分类号： H01L23/552 , H01F27/28 , H01L21/56 , H01L23/495 , H01L25/00
CPC分类号： H01L23/552 , H01F27/2804 , H01L21/56 , H01L23/49575 , H01L25/50 , H01F2027/2809
摘要： A packaged electronic device includes first conductive leads and second conductive leads at least partially exposed to an exterior of a package structure, and a multilevel lamination structure in the package structure. The multilevel lamination structure includes a first patterned conductive feature having multiple turns in a first level to form a first winding coupled to at least one of the first conductive leads in a first circuit, a second patterned conductive feature having multiple turns in a different level to form a second winding coupled to at least one of the second conductive leads in a second circuit isolated from the first circuit, and a conductive shield trace having multiple turns in a second level spaced apart from and between the first patterned conductive feature and the second patterned conductive feature, the conductive shield trace coupled in the first circuit.
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公开(公告)号：US20230207483A1
公开(公告)日：2023-06-29
申请号：US18086610
申请日：2022-12-21
IPC分类号： H01L23/552 , H01L23/495 , H01L21/56 , H01F27/28 , H01L25/00
CPC分类号： H01L23/552 , H01F27/2804 , H01L21/56 , H01L23/49575 , H01L25/50 , H01F2027/2809
摘要： A packaged electronic device includes first conductive leads and second conductive leads at least partially exposed to an exterior of a package structure, and a multilevel lamination structure in the package structure. The multilevel lamination structure includes a first patterned conductive feature having multiple turns in a first level to form a first winding coupled to at least one of the first conductive leads in a first circuit, a second patterned conductive feature having multiple turns in a different level to form a second winding coupled to at least one of the second conductive leads in a second circuit isolated from the first circuit, and a conductive shield trace having multiple turns in a second level spaced apart from and between the first patterned conductive feature and the second patterned conductive feature, the conductive shield trace coupled in the first circuit.
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公开(公告)号：US20200303319A1
公开(公告)日：2020-09-24
申请号：US16800043
申请日：2020-02-25
IPC分类号： H01L23/552 , H01L23/495 , H01L25/00 , H01L21/56 , H01F27/28
摘要： A packaged electronic device includes first conductive leads and second conductive leads at least partially exposed to an exterior of a package structure, and a multilevel lamination structure in the package structure. The multilevel lamination structure includes a first patterned conductive feature having multiple turns in a first level to form a first winding coupled to at least one of the first conductive leads in a first circuit, a second patterned conductive feature having multiple turns in a different level to form a second winding coupled to at least one of the second conductive leads in a second circuit isolated from the first circuit, and a conductive shield trace having multiple turns in a second level spaced apart from and between the first patterned conductive feature and the second patterned conductive feature, the conductive shield trace coupled in the first circuit.
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公开(公告)号：US20240038691A1
公开(公告)日：2024-02-01
申请号：US17877426
申请日：2022-07-29
发明人： Vijaylaxmi Gumaste Khanolkar , Anindya Poddar , Hassan Omar Ali , Dibyajat Mishra , Venkatesh Srinivasan , Swaminathan Sankaran
IPC分类号： H01L23/66 , H01Q1/22 , H01L21/56 , H01L23/00 , H01L23/498
CPC分类号： H01L23/66 , H01Q1/2283 , H01L21/565 , H01L21/561 , H01L24/96 , H01L24/97 , H01L23/49805 , H01L23/49816 , H01L23/49811 , H01L23/49833 , H01L23/49822 , H01L23/49838 , H01L24/16 , H01L2224/16225 , H01L2223/6677 , H01L2223/6683 , H01L2223/6688 , H01L2924/2027 , H01L2924/182
摘要： In a described example, an apparatus includes: a semiconductor device mounted to a device side surface of a package substrate, the package substrate having a board side surface opposite the device side surface; an antenna module mounted to the package substrate and coupled to the semiconductor device; and mold compound covering the semiconductor device and a portion of the package substrate.
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公开(公告)号：US11791249B2
公开(公告)日：2023-10-17
申请号：US17515150
申请日：2021-10-29
CPC分类号： H01L23/49575 , H01L21/56 , H01L23/3107 , H01L23/49513 , H01L23/49517 , H01L23/49562 , H01L23/49568 , H01L24/48 , H01L24/73 , H01L24/92 , H01L25/50 , H02M3/003 , H01L2224/48177 , H01L2224/73265 , H01L2224/92247 , H02M3/335
摘要： An isolated power converter package includes a leadframe including a first and second die pad, first and second supports connected to first leads, second leads, at least one downset pad, and at least one downset feature between the supports and downset pad. A first semiconductor die is on the first die pad and a second semiconductor die is on the second die pad. The transformer stack includes a top and bottom side magnetic sheet on respective sides of a laminate substrate including an embedded coil that has coil contacts. Edges of the laminate substrate are on the supports. Bond wires are between the first die bond pads and the second leads, between the second die bond pads and the second leads, between the first die bond pads and coil contacts, and between the second die bond pads and the coil contacts. The downset pad is exposed from a mold compound.
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公开(公告)号：US20200211961A1
公开(公告)日：2020-07-02
申请号：US16750225
申请日：2020-01-23
IPC分类号： H01L23/522 , H01F17/00 , H01F27/28 , H01F41/04 , H01L23/495 , H05K3/46 , H01L23/00
摘要： An electronic device includes first leads along a first side, second leads along a second side, first and second dies, and a magnetic assembly with a multilevel lamination structure with first and second windings and a conductive guard trace. The lamination structure includes the first winding in a first level, and the second winding in a different level. The guard trace is between the first patterned conductive feature and the second side of the package structure. A first set of electrical connections couple the first die, the first winding, and one of the first conductive leads in a first circuit, and a second set of electrical connections couple the second die, the second winding, the guard trace and one of the second conductive leads in an isolated second circuit.
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