Random error signal generator
    1.
    发明授权
    Random error signal generator 有权
    随机误差信号发生器

    公开(公告)号:US08095842B2

    公开(公告)日:2012-01-10

    申请号:US12510423

    申请日:2009-07-28

    CPC classification number: G01R31/318371 G01R31/31917

    Abstract: In a random error signal generator, an M-sequence generation circuit outputs, in parallel, pieces of bit data stored in each register, a first generation circuit sequentially outputs first reference values C which are changed by a predetermined value in response to clocks, a second generation circuit outputs a second reference value D which is shifted from the first reference value C by a range value E which is determined depending on an error rate p. A comparison and determination unit outputs random error signals to be error bits when a numeric value A of the bit data output exists between the first and second reference values C, D. The random error signal has the error rate p, the number of times of error occurrences follows Poisson distribution, and a distribution of adjacent error occurrence intervals follows a geometric distribution.

    Abstract translation: 在随机误差信号发生器中,M序列产生电路并行地输出存储在每个寄存器中的位数据,第一生成电路顺序地输出响应于时钟改变预定值的第一参考值C, 第二产生电路输出从第一参考值C偏移根据错误率p确定的范围值E的第二参考值D. 当在第一和第二参考值C,D之间存在位数据输出的数值A时,比较和确定单元输出随机误差信号为误差位。随机误差信号具有误差率p, 错误发生遵循泊松分布,相邻误差发生间隔的分布遵循几何分布。

    M-sequence generator, providing method thereof, and random error generating device in which M-sequence generator is used
    2.
    发明授权
    M-sequence generator, providing method thereof, and random error generating device in which M-sequence generator is used 有权
    M序列发生器,其提供方法以及使用M序列发生器的随机误差产生装置

    公开(公告)号:US08433740B2

    公开(公告)日:2013-04-30

    申请号:US12769341

    申请日:2010-04-28

    CPC classification number: H03K3/84 G06F7/584 H04J13/00

    Abstract: An M-sequence generator includes EXCLUSIVE-OR gates feeding back pieces of bit data from m number of series registers to the registers in response to a clock. A period of a cyclic group {(α1k), (α2k), (α3k), . . . } falls within a maximum period (2m−1), the group being produced as an element (αk) obtained by raising a root α of a polynomial to a specified power value k (k≧2), which have the terms in polynomials of a Galois field GF(2m). In a multiplying unit including the gates, pieces of bit data is fed into one end of the multiplying unit in response to the clock while the element (αk) is fed into the other end. The multiplying unit performs Galois field multiplication between each piece of bit data and the element (αk), the gate supplies the multiplication result as feedback bit data to the respective registers.

    Abstract translation: M序列发生器包括异或门,以响应于时钟从M个串联寄存器向寄存器反馈位数据。 循环群{(α1k),(α2k),(α3k))的周期。 。 。 }落在最大周期(2m-1)内,该组被作为通过将多项式的根α提高到具有多项式中的项的指定功率值k(k> = 2)而获得的元素(alphak) 的伽罗瓦域GF(2m)。 在包括门的乘法单元中,当将元素(alphak)馈送到另一端时,位数据被送入乘法单元的一端。 乘法单元在每个比特数据和元素(alphak)之间执行Galois域乘法,门将乘法结果作为反馈比特数据提供给各个寄存器。

    M-SEQUENCE GENERATOR, PROVIDING METHOD THEREOF, AND RANDOM ERROR GENERATING DEVICE IN WHICH M-SEQUENCE GENERATOR IS USED
    3.
    发明申请
    M-SEQUENCE GENERATOR, PROVIDING METHOD THEREOF, AND RANDOM ERROR GENERATING DEVICE IN WHICH M-SEQUENCE GENERATOR IS USED 有权
    M序列发生器,其提供方法和使用M序列发生器的随机错误发生装置

    公开(公告)号:US20100205235A1

    公开(公告)日:2010-08-12

    申请号:US12769341

    申请日:2010-04-28

    CPC classification number: H03K3/84 G06F7/584 H04J13/00

    Abstract: An M-sequence generator includes EXCLUSIVE-OR gates feeding back pieces of bit data from m number of series registers to the registers in response to a clock. A period of a cyclic group {(α1k), (α2k), (α3k), . . . } falls within a maximum period (2m-1), the group being produced as an element (αk) obtained by raising a root α of a polynomial to a specified power value k (k≧2), which have the terms in polynomials of a Galois field GF(2m). In a multiplying unit including the gates, pieces of bit data is fed into one end of the multiplying unit in response to the clock while the element (αk) is fed into the other end. The multiplying unit performs Galois field multiplication between each piece of bit data and the element (αk), the gate supplies the multiplication result as feedback bit data to the respective registers.

    Abstract translation: M序列发生器包括异或门,以响应于时钟从M个串联寄存器向寄存器反馈位数据。 循环群{(α1k),(α2k),(α3k))的周期。 。 。 }落在最大周期(2m-1)内,该组被作为通过将多项式的根α提高到指定的功率值k(k≥2)而获得的元素(αk),其具有多项式中的项 伽罗瓦域GF(2m)。 在包括门的乘法单元中,当将元件(αk)馈送到另一端时,位数据被送入乘法单元的一端以响应于时钟。 乘法单元在每个比特数据和元素(αk)之间执行伽罗瓦域相乘,门将相乘结果作为反馈比特数据提供给各个寄存器。

    Evaluation method of random error distribution and evaluation apparatus thereof
    4.
    发明授权
    Evaluation method of random error distribution and evaluation apparatus thereof 有权
    随机误差分布的评价方法及评价装置

    公开(公告)号:US07987395B2

    公开(公告)日:2011-07-26

    申请号:US12501647

    申请日:2009-07-13

    CPC classification number: H04L1/0084 H04L1/20

    Abstract: A degree of conformity of error distribution of a digital signal to the Poisson distribution is quantitatively determined. The digital signal including error data, which is randomly generated at a predetermined error rate, is divided into data number of measurement units, wherein the data number is determined on the basis of the error rate. A sample number of the measurement units are acquired from the measurement units, and the number of errors contained in each measurement unit is measured as a measurement value. Further, the number of times of occurrence of each measurement value is calculated, a Poisson distribution function is calculated, and a degree of a bond between the Poisson distribution and the distribution of the number of times of occurrence is determined by using the chi-square goodness-of-fit test method.

    Abstract translation: 定量地确定数字信号的误差分布与泊松分布的一致性程度。 包括以预定错误率随机产生的误差数据的数字信号被划分为测量单位的数据数,其中基于错误率确定数据编号。 从测量单元获取测量单元的样本数,并且测量每个测量单元中包含的误差的数量作为测量值。 此外,计算每个测量值的出现次数,计算泊松分布函数,并且通过使用卡方确定泊松分布与发生次数分布之间的键的程度 适合度测试方法。

    OPU frame generating device and OPU frame test device
    5.
    发明授权
    OPU frame generating device and OPU frame test device 有权
    OPU帧生成装置和OPU帧测试装置

    公开(公告)号:US09065581B2

    公开(公告)日:2015-06-23

    申请号:US13433370

    申请日:2012-03-29

    CPC classification number: H04J3/1652 H04J3/14 H04J2203/0073

    Abstract: An OPU frame generating device includes a frequency setting unit that sets a frequency corresponding to a bit rate of data which can be stored in a payload area, a parameter calculating unit that calculates a parameter Cm indicating an integer part of the amount of data included in the payload area using the set frequency, a data inserting unit that outputs a timing signal determined by the parameter Cm and inserts data at a position determined by the parameter Cm in the payload area, a data generating unit that generates data in synchronization with the timing signal, and a frame generating unit that generates an OPU frame having the payload area into which the data is inserted.

    Abstract translation: OPU帧产生装置包括:频率设定单元,其设定与能够存储在有效载荷区域中的数据的比特率对应的频率;参数计算单元,计算表示包含在数据量的数据量的整数部分的参数Cm 使用设定频率的有效负载区域,输出由参数Cm确定的定时信号并在由有效载荷区域中的参数Cm确定的位置插入数据的数据插入单元,与定时同步地生成数据的数据生成单元 信号和帧生成单元,其生成具有插入数据的有效载荷区域的OPU帧。

    ERROR ADDITION APPARATUS
    7.
    发明申请
    ERROR ADDITION APPARATUS 有权
    错误添加装置

    公开(公告)号:US20100174971A1

    公开(公告)日:2010-07-08

    申请号:US12683072

    申请日:2010-01-06

    Applicant: Takashi Furuya

    Inventor: Takashi Furuya

    CPC classification number: H04L1/0079

    Abstract: An error addition apparatus receives a data signal D having a frame format having a specific signal inserted into its front, adds errors to the data signal D, and outputs a resulting signal. The apparatus has an error addition regulation unit for receiving a frame synchronization signal F, indicative of a timing at which the front of the frame of the data signal has been inputted, and regulating the errors such that the errors are added to positions other than a region of the specific signal. Accordingly, errors are not added to a specific signal.

    Abstract translation: 错误添加装置接收具有插入其前端的特定信号的帧格式的数据信号D,将错误加到数据信号D上,并输出结果信号。 该装置具有误差附加调节单元,用于接收表示数据信号的帧的前部已被输入的定时的帧同步信号F,并且调整误差使得误差被添加到除 区域的具体信号。 因此,不向特定信号添加错误。

    Endless transmission belt
    9.
    发明授权
    Endless transmission belt 失效
    无端传动皮带

    公开(公告)号:US4838844A

    公开(公告)日:1989-06-13

    申请号:US148785

    申请日:1988-01-27

    CPC classification number: F16G5/18

    Abstract: An endless transmission belt is formed of a plurality of symmetrical V blocks. Each V block comprises upper and lower portions disposed approximately parallel to each other, and two pillar portions connecting the upper and lower portions. The block includes side openings on both sides, and a center opening between the pillar portions. The upper and lower portions have wavy configurations, so that the upper and lower portions have flexibility against the force applied from sheaves to the V block.

    Abstract translation: 无级传动带由多个对称的V形块形成。 每个V块包括彼此大致平行地设置的上部和下部,以及连接上部和下部的两个柱部。 该块包括两侧的侧开口和柱部之间的中心开口。 上部和下部具有波形构造,使得上部和下部具有抵抗从滑轮施加到V形块的力的柔性。

    Semiconductor light emitting device
    10.
    发明申请
    Semiconductor light emitting device 有权
    半导体发光器件

    公开(公告)号:US20080093619A1

    公开(公告)日:2008-04-24

    申请号:US11907895

    申请日:2007-10-18

    CPC classification number: H01L33/14 H01L33/0079 H01L33/02 H01L33/30 H01L33/405

    Abstract: A first conductivity type cladding layer 2, a first side multilayer 9, an active layer 4, a second side multilayer 10, and a second conductivity type cladding layer 3 are provided in a semiconductor light emitting device. The first side multilayer 9 is provided between the first conductivity type cladding layer 2 and the active layer 4, and the second side multilayer 10 is provided between the active layer 4 and the second conductivity type cladding layer 3. Each of the multilayer 9, 10 is transparent with respect to the light generated at the active layer 4, having a bandgap larger than that of the active layer 4, and lattice-matched with the active layer 4.

    Abstract translation: 在半导体发光器件中设置第一导电型包层2,第一侧多层9,有源层4,第二侧多层10和第二导电型包覆层3。 在第一导电型包覆层2和有源层4之间设置第一侧面叠层体9,在有源层4和第二导电型覆盖层3之间设置第二侧面层叠体10。 相对于在有源层4处产生的光具有比有源层4的带隙更大的透光性,并且与有源层4晶格匹配。

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