公开(公告)号：US20220344504A1

公开(公告)日：2022-10-27

申请号：US17523076

申请日：2021-11-10

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Yong-Jie WU ,  Yen-Chung HO ,  Hui-Hsien WEI ,  Chia-Jung YU ,  Pin-Cheng HSU ,  Feng-Cheng YANG ,  Chung-Te LIN

IPC分类号： H01L29/786 ,  H01L29/423 ,  H01L29/417 ,  H01L29/45 ,  H01L29/49

摘要： A disclosed semiconductor device includes a substrate, a gate electrode formed on the substrate, a gate dielectric layer formed over the gate electrode, a source electrode located adjacent to a first side of the gate electrode, and a drain electrode located adjacent to a second side of the gate electrode. A gate dielectric formed from an etch-stop layer and/or high-k dielectric layer separates the source electrode from the gate electrode and substrate and separates the drain electrode from the gate electrode and the substrate. First and second oxide layers are formed over the gate dielectric and are located adjacent to the source electrode on the first side of the gate electrode and located adjacent to the drain electrode on the second side of the gate electrode. A semiconductor layer is formed over the first oxide layer, the second oxide layer, the source electrode, the drain electrode, and the gate dielectric.

公开(公告)号：US20220328501A1

公开(公告)日：2022-10-13

申请号：US17523044

申请日：2021-11-10

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Yong-Jie WU ,  Yen-Chung HO ,  Hui-Hsien WEI ,  Chia-Jung YU ,  Pin-Cheng HSU ,  Feng-Cheng YANG ,  Chung-Te LIN

IPC分类号： H01L27/1159 ,  G11C5/06 ,  H01L27/11587 ,  H01L29/51 ,  H01L29/78 ,  H01L29/66 ,  H01L29/786

摘要： A thin film transistor includes an active layer located over a substrate, a first gate stack including a stack of a first gate dielectric and a first gate electrode and located on a first surface of the active layer, a pair of first contact electrodes contacting peripheral portions of the first surface of the active layer and laterally spaced from each other along a first horizontal direction by the first gate electrode, a second contact electrode contacting a second surface of the active layer that is vertically spaced from the first surface of the active layer, and a pair of second gate stacks including a respective stack of a second gate dielectric and a second gate electrode and located on a respective peripheral portion of a second surface of the active layer.

公开(公告)号：US20220344202A1

公开(公告)日：2022-10-27

申请号：US17523111

申请日：2021-11-10

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Yong-Jie WU ,  Yen-Chung HO ,  Hui-Hsien WEI ,  Chia-Jung YU ,  Pin-Cheng HSU ,  Feng-Cheng YANG ,  Chung-Te LIN

IPC分类号： H01L21/768 ,  H01L23/528 ,  H01L29/66 ,  H01L29/40

摘要： A disclosed method of fabricating a semiconductor structure includes forming a first conductive pattern over a substrate, with the first conductive pattern including a first conductive line and a second conductive line. A barrier layer may be conformally formed over the first conductive line and the second conductive line of the first conductive pattern. An insulating layer may be formed over the barrier layer. The insulating layer may be patterned to form openings between conductive lines of the first conductive pattern a second conductive pattern may be formed in the openings. The second conductive pattern may include a third conductive line is physically separated from the first conductive pattern by the barrier layer. The presence of the barrier layer reduces the risk of a short circuit forming between the first and second conductive patterns. In this sense, the second conductive pattern may be self-aligned relative to the first conductive pattern.