Methods for optimizing conductor patterns for ECP and CMP in semiconductor processing
    5.
    发明授权
    Methods for optimizing conductor patterns for ECP and CMP in semiconductor processing 有权
    在半导体处理中优化ECP和CMP的导体图案的方法

    公开(公告)号:US08627243B1

    公开(公告)日:2014-01-07

    申请号:US13650783

    申请日:2012-10-12

    摘要: Methods for optimizing conductor patterns for conductors formed by ECP and CMP processes. A method includes receiving layout data for an IC design where electrochemical plating (ECP) processes form patterned conductors in at least one metal layer over a semiconductor wafer; determining from the received layout data a global effects factor corresponding to a global pattern density; determining layout effects factors for unit grid areas corresponding to the pattern density of the at least one metal layer within the unit grid areas, determining local effects factors for each unit grid area; using a computing device, executing an ECP simulator using at least one of the global effects factor and the local effects factors, and using the layout effects factor; outputting an predicted post-ECP hump data map from the ECP simulator; and if indicated by a threshold comparison, modifying the layout data.

    摘要翻译: 用于优化由ECP和CMP工艺形成的导体的导体图案的方法。 一种方法包括接收用于IC设计的布局数据,其中电化学电镀(ECP)工艺在半导体晶片上的至少一个金属层中形成图案化导体; 从所接收的布局数据确定对应于全局图案密度的全局效应因子; 确定与单位网格区域内的至少一个金属层的图案密度相对应的单位网格区域的布局效应因子,确定每个单位网格区域的局部效应因子; 使用计算设备,使用全局效应因子和局部效应因子中的至少一个来执行ECP模拟器,并使用布局效应因子; 从ECP模拟器输出预测的后ECP驼峰数据图; 并且如果由阈值比较指示,则修改布局数据。