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    EUV Lithography System and Method with Optimized Throughput and Stability
    1.
    发明申请
    EUV Lithography System and Method with Optimized Throughput and Stability 审中-公开

    公开(公告)号：US20190121241A1

    公开(公告)日：2019-04-25

    申请号：US16219561

    申请日：2018-12-13

    申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

    发明人： Yen-Cheng Lu ,  Jeng-Horng Chen ,  Shun-Der Wu ,  Anthony Yen

    IPC分类号： G03F7/20

    CPC分类号： G03F7/70033 ,  G03F7/70558

    摘要： Lithography methods and corresponding lithography apparatuses are disclosed herein for improving throughput of lithography exposure processes. An exemplary lithography method includes generating a plurality of target material droplets and generating radiation from the plurality of target material droplets based on a dose margin to expose a wafer. The dose margin indicates how many of the plurality of target material droplets are reserved for dose control. In some implementations, the plurality of target material droplets are grouped into a plurality of bursts, and the lithography method further includes performing an inter-compensation operation that designates an excitation state of target material droplets in one of the plurality of bursts to compensate for an energy characteristic of another one of the plurality of bursts.

    EUV lithography system and method with optimized throughput and stability
    2.
    发明授权
    EUV lithography system and method with optimized throughput and stability 有权

    公开(公告)号：US10156790B2

    公开(公告)日：2018-12-18

    申请号：US15617882

    申请日：2017-06-08

    申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

    发明人： Yen-Cheng Lu ,  Jeng-Horng Chen ,  Shun-Der Wu ,  Anthony Yen

    IPC分类号： G03F7/20

    摘要： Lithography methods and corresponding lithography apparatuses are disclosed herein for improving throughput of lithography exposure processes. An exemplary lithography method includes generating a plurality of target material droplets and generating radiation from the plurality of target material droplets based on a dose margin to expose a wafer. The dose margin indicates how many of the plurality of target material droplets are reserved for dose control. In some implementations, the plurality of target material droplets are grouped into a plurality of bursts, and the lithography method further includes performing an inter-compensation operation that designates an excitation state of target material droplets in one of the plurality of bursts to compensate for an energy characteristic of another one of the plurality of bursts.

    Lithography Method and Structure for Resolution Enhancement with a Two-State Mask
    4.
    发明申请
    Lithography Method and Structure for Resolution Enhancement with a Two-State Mask 有权
    使用双态掩模的分辨率增强的平版印刷方法和结构

    公开(公告)号：US20160209757A9

    公开(公告)日：2016-07-21

    申请号：US14298589

    申请日：2014-06-06

    申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

    发明人： Yen-Cheng Lu ,  Shinn-Sheng Yu ,  Anthony Yen

    IPC分类号： G03F7/20 ,  G03F1/38

    CPC分类号： G03F7/70191 ,  G03F1/24 ,  G03F1/32 ,  G03F1/38 ,  G03F1/50 ,  G03F1/58 ,  G03F7/20 ,  G03F7/70091 ,  G03F7/70941

    摘要： A lithography process in a lithography system includes loading a mask that includes two mask states defining an integrated circuit (IC) pattern. The IC pattern includes a plurality of main polygons, wherein adjacent main polygons are assigned to different mask states; and a background includes a field in one of the mask states and a plurality of sub-resolution polygons in another of the two mask states. The lithography process further includes configuring an illuminator to generate an illuminating pattern on an illumination pupil plane of the lithography system; configuring a pupil filter on a projection pupil plane of the lithography system with a filtering pattern determined according to the illumination pattern; and performing an exposure process to a target with the illuminator, the mask, and the pupil filter. The exposure process produces diffracted light and non-diffracted light behind the mask and the pupil filter removes most of the non-diffracted light.

    摘要翻译： 光刻系统中的光刻工艺包括加载包含限定集成电路（IC）图案的两个掩模状态的掩模。 IC图案包括多个主多边形，其中相邻的主多边形被分配到不同的掩模状态; 并且背景包括掩模状态之一的场和在两个掩模状态中的另一掩码状态中的多个子分辨率多边形。 光刻工艺还包括配置照明器以在光刻系统的照明光瞳平面上产生照明图案; 在光刻系统的投影光瞳平面上用根据照明图案确定的滤光图案配置光瞳滤光器; 并且利用照明器，掩模和瞳孔滤光器对目标进行曝光处理。 曝光过程在掩模后面产生衍射光和非衍射光，瞳孔滤光器去除大部分非衍射光。

    Metal and via definition scheme
    5.
    发明授权
    Metal and via definition scheme 有权
    金属和通孔定义方案

    公开(公告)号：US09252048B2

    公开(公告)日：2016-02-02

    申请号：US14191169

    申请日：2014-02-26

    申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

    发明人： Yen-Cheng Lu ,  Chih-Tsung Shih ,  Shinn-Sheng Yu ,  Jeng-Horng Chen ,  Anthony Yen

    IPC分类号： H01L21/76 ,  H01L21/768

    CPC分类号： H01L21/76829 ,  H01L21/0337 ,  H01L21/31133 ,  H01L21/31144 ,  H01L21/76807 ,  H01L21/76811 ,  H01L21/76816 ,  H01L21/7684 ,  H01L21/76846

    摘要： A method includes defining a photoresist layer over a first dielectric layer. The first dielectric layer is disposed over an etch stop layer and the etch stop layer is disposed over a second dielectric layer. A spacer layer is formed over the photoresist and the first dielectric layer. The spacer layer has an opening that has a via width. The opening is disposed directly above a via location. A metal trench with a metal width is formed in the first dielectric layer. The metal width at the via location is greater than the via width. A via hole with the via width is formed at the via location in the second dielectric layer.

    摘要翻译： 一种方法包括在第一介电层上限定光致抗蚀剂层。 第一介电层设置在蚀刻停止层上，并且蚀刻停止层设置在第二介电层上。 在光致抗蚀剂和第一介电层之上形成间隔层。 间隔层具有具有通孔宽度的开口。 开口设置在通孔位置的正上方。 在第一电介质层中形成具有金属宽度的金属沟槽。 通孔位置处的金属宽度大于通孔宽度。 具有通孔宽度的通孔形成在第二介电层中的通孔位置处。

    Lithography and mask for resolution enhancement
    6.
    发明授权
    Lithography and mask for resolution enhancement 有权
    平版印刷和掩模用于分辨率增强

    公开(公告)号：US09223197B2

    公开(公告)日：2015-12-29

    申请号：US14288698

    申请日：2014-05-28

    申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

    发明人： Shinn-Sheng Yu ,  Yen-Cheng Lu ,  Anthony Yen

    IPC分类号： G03F7/20 ,  G03F1/58 ,  G03F1/24 ,  G03F1/48 ,  B82Y10/00 ,  B82Y40/00

    CPC分类号： G03F1/24 ,  B82Y10/00 ,  B82Y40/00 ,  G03F1/48 ,  G03F1/58 ,  G03F7/7015 ,  G03F7/70191

    摘要： A lithography process in a lithography system includes loading a mask having multiple mask states and having a mask pattern consisting of a plurality of polygons and a field. Different mask states are assigned to adjacent polygons and the field. The lithography process further includes configuring an illuminator to generate an illumination pattern on an illumination pupil plane of the lithography system; configuring a pupil filter on a projection pupil plane of the lithography system with a filtering pattern determined according to the illumination pattern; and performing an exposure process to a target with the illuminator, the mask, and the pupil filter. The exposure process produces diffracted light and non-diffracted light behind the mask and the pupil filter removes most of the non-diffracted light.

    摘要翻译： 光刻系统中的光刻工艺包括加载具有多个掩模状态的掩模并且具有由多个多边形和场组成的掩模图案。 不同的掩码状态被分配给相邻的多边形和字段。 光刻工艺还包括配置照明器以在光刻系统的照明光瞳平面上产生照明图案; 在光刻系统的投影光瞳平面上用根据照明图案确定的滤光图案配置光瞳滤光器; 并且利用照明器，掩模和瞳孔滤光器对目标进行曝光处理。 曝光过程在掩模后面产生衍射光和非衍射光，瞳孔滤光器去除大部分非衍射光。

    Extreme Ultraviolet Light (EUV) Photomasks and Fabrication Methods Thereof
    7.
    发明申请
    Extreme Ultraviolet Light (EUV) Photomasks and Fabrication Methods Thereof 审中-公开
    极紫外光（EUV）光掩模及其制作方法

    公开(公告)号：US20150331307A1

    公开(公告)日：2015-11-19

    申请号：US14810197

    申请日：2015-07-27

    申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

    发明人： Yen-Cheng Lu ,  Chih-Tsung Shih ,  Shinn-Sheng Yu ,  Jeng-Horng Chen ,  Anthony Yen

    IPC分类号： G03F1/22 ,  G03F1/80

    CPC分类号： G03F1/80 ,  G03F1/22 ,  G03F1/24 ,  G03F1/52

    摘要： Embodiments of EUV photomasks and methods for forming a EUV photomask are provided. The method comprises providing a substrate, a reflective layer, a capping layer, a hard mask layer, and forming an opening therein. An absorber layer is then filled in the opening and over the top surface of the hard mask layer. A removing process is provided to form an absorber with a top surface lower than a top surface of the capping layer.

    摘要翻译： 提供EUV光掩模的实施例和形成EUV光掩模的方法。 该方法包括提供衬底，反射层，覆盖层，硬掩模层，以及在其中形成开口。 然后将吸收层填充在硬掩模层的开口中和上表面上。 提供去除方法以形成具有比顶盖表面的顶表面低的顶表面的吸收体。

    Extreme Ultraviolet Lithography Process
    10.
    发明申请
    Extreme Ultraviolet Lithography Process 有权
    极紫外光刻工艺

    公开(公告)号：US20140218713A1

    公开(公告)日：2014-08-07

    申请号：US13757210

    申请日：2013-02-01

    申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

    发明人： Yen-Cheng Lu ,  Shinn-Sheng Yu ,  Anthony Yen

    IPC分类号： G03F7/20

    CPC分类号： G03F7/70325 ,  G03F1/24 ,  G03F7/70033 ,  G03F7/70091 ,  G03F7/70125 ,  G03F7/70191 ,  G03F7/702 ,  G03F7/70308 ,  G03F7/70316 ,  G03F7/70408 ,  G21K1/062

    摘要： A process of an extreme ultraviolet lithography is disclosed. The process includes receiving an extreme ultraviolet (EUV) mask, an EUV radiation source and an illuminator. The process also includes exposing the EUV mask by a radiation, originating from the EUV radiation source and directed by the illuminator, with a less-than-three-degree chief ray angle of incidence at the object side (CRAO). The process further includes removing most of the non-diffracted light and collecting and directing the diffracted light and the not removed non-diffracted light by a projection optics box (POB) to expose a target.

    摘要翻译： 公开了一种极紫外光刻技术。 该方法包括接收极紫外（EUV）掩模，EUV辐射源和照明器。 该方法还包括通过来自EUV辐射源并由照明器引导的辐射暴露EUV掩模，在物体侧具有小于三度的主射线入射角（CRAO）。 该方法还包括去除大部分非衍射光并且通过投影光学盒（POB）收集和引导衍射光和未被去除的非衍射光以暴露靶。