公开(公告)号：US11901237B2

公开(公告)日：2024-02-13

申请号：US17872103

申请日：2022-07-25

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chang-Yun Chang ,  Bone-Fong Wu ,  Ming-Chang Wen ,  Ya-Hsiu Lin

IPC: H01L21/8234 ,  H01L21/311 ,  H01L29/08 ,  H01L21/02 ,  H01L27/088 ,  H01L29/06 ,  H01L29/66 ,  H01L21/324 ,  H01L21/762 ,  H01L21/3105 ,  H01L21/027 ,  H01L21/265

CPC classification number: H01L21/823431 ,  H01L21/0217 ,  H01L21/02156 ,  H01L21/31111 ,  H01L21/823418 ,  H01L21/823437 ,  H01L21/823481 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/0847 ,  H01L29/66545 ,  H01L21/0274 ,  H01L21/26513 ,  H01L21/31053 ,  H01L21/324 ,  H01L21/76224 ,  H01L29/6656

Abstract: A device includes a semiconductor fin, a gate structure, gate spacers, and a dielectric feature. The semiconductor fin is over a substrate. The gate structure is over the semiconductor fin and includes a gate dielectric layer over the semiconductor fin and a gate metal covering the gate dielectric layer. The gate spacers are on opposite sides of the gate structure. The dielectric feature is over the substrate. The dielectric feature is in contact with the gate metal, the gate dielectric layer, and the gate spacers, and an interface between the gate metal and the dielectric feature is substantially aligned with an interface between the dielectric feature and one of the gate spacers.

公开(公告)号：US20200058650A1

公开(公告)日：2020-02-20

申请号：US16663858

申请日：2019-10-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ming-Chang Wen ,  Chang-Yun Chang ,  Hsien-Chin Lin ,  Bone-Fong Wu ,  Ya-Hsiu Lin

IPC: H01L27/088 ,  H01L21/8234 ,  H01L29/423 ,  H01L21/28 ,  H01L29/49 ,  H01L21/027 ,  H01L29/66 ,  H01L21/3213 ,  H01L29/06 ,  H01L27/02

Abstract: A semiconductor device includes first and second transistors each having a high-k metal gate disposed over a respective channel region of the transistors. The semiconductor device further includes first and second dielectric features in physical contact with an end of the respective high-k metal gates. The first and second transistors are of a same conductivity type. The two high-k metal gates have a same number of material layers. The first transistor's threshold voltage is different from the second transistor's threshold voltage, and at least one of following is true: the two high-k metal gates have different widths, the first and second dielectric features have different distances from respective channel regions of the two transistors, and the first and second dielectric features have different dimensions.

公开(公告)号：US10461078B2

公开(公告)日：2019-10-29

申请号：US15904585

申请日：2018-02-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ming-Chang Wen ,  Chang-Yun Chang ,  Hsien-Chin Lin ,  Bone-Fong Wu ,  Ya-Hsiu Lin

IPC: H01L27/088 ,  H01L27/02 ,  H01L29/49 ,  H01L21/8234 ,  H01L29/06 ,  H01L21/3213 ,  H01L29/66 ,  H01L21/027 ,  H01L21/28 ,  H01L29/423

Abstract: A semiconductor device includes first and second transistors each having a high-k metal gate disposed over a respective channel region of the transistors. The semiconductor device further includes first and second dielectric features in physical contact with an end of the respective high-k metal gates. The first and second transistors are of a same conductivity type. The two high-k metal gates have a same number of material layers. The first transistor's threshold voltage is different from the second transistor's threshold voltage, and at least one of following is true: the two high-k metal gates have different widths, the first and second dielectric features have different distances from respective channel regions of the two transistors, and the first and second dielectric features have different dimensions.

公开(公告)号：US11437278B2

公开(公告)日：2022-09-06

申请号：US16985174

申请日：2020-08-04

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chang-Yun Chang ,  Bone-Fong Wu ,  Ming-Chang Wen ,  Ya-Hsiu Lin

IPC: H01L21/8234 ,  H01L21/311 ,  H01L29/08 ,  H01L21/02 ,  H01L27/088 ,  H01L29/06 ,  H01L29/66 ,  H01L21/324 ,  H01L21/762 ,  H01L21/3105 ,  H01L21/027 ,  H01L21/265

Abstract: A method of forming a semiconductor device includes forming a gate structure over first and second fins over a substrate; forming an interlayer dielectric layer surrounding first and second fins; etching a first trench in the interlayer dielectric layer between the first and second fins uncovered by the gate structure; forming a helmet layer lining the first trench; and forming a dielectric feature in the first trench.

公开(公告)号：US10741450B2

公开(公告)日：2020-08-11

申请号：US15892593

申请日：2018-02-09

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chang-Yun Chang ,  Bone-Fong Wu ,  Ming-Chang Wen ,  Ya-Hsiu Lin

IPC: H01L21/8234 ,  H01L21/311 ,  H01L29/08 ,  H01L21/02 ,  H01L27/088 ,  H01L29/06 ,  H01L29/66 ,  H01L21/324 ,  H01L21/762 ,  H01L21/3105 ,  H01L21/027 ,  H01L21/265

Abstract: A method of forming a semiconductor device includes forming a gate structure over first and second fins over a substrate; forming an interlayer dielectric layer surrounding first and second fins; etching a first trench in the interlayer dielectric layer between the first and second fins uncovered by the gate structure; forming a helmet layer in the first trench; and filling the first trench with a dielectric feature.

公开(公告)号：US20190267372A1

公开(公告)日：2019-08-29

申请号：US15904585

申请日：2018-02-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ming-Chang Wen ,  Chang-Yun Chang ,  Hsien-Chin Lin ,  Bone-Fong Wu ,  Ya-Hsiu Lin

IPC: H01L27/088 ,  H01L29/423 ,  H01L27/02 ,  H01L29/49 ,  H01L21/8234 ,  H01L29/06 ,  H01L21/3213 ,  H01L29/66 ,  H01L21/027 ,  H01L21/28

Abstract: A semiconductor device includes first and second transistors each having a high-k metal gate disposed over a respective channel region of the transistors. The semiconductor device further includes first and second dielectric features in physical contact with an end of the respective high-k metal gates. The first and second transistors are of a same conductivity type. The two high-k metal gates have a same number of material layers. The first transistor's threshold voltage is different from the second transistor's threshold voltage, and at least one of following is true: the two high-k metal gates have different widths, the first and second dielectric features have different distances from respective channel regions of the two transistors, and the first and second dielectric features have different dimensions.