公开(公告)号：US20220367200A1

公开(公告)日：2022-11-17

申请号：US17844563

申请日：2022-06-20

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Che-Lun Chang ,  Pin-Chuan Su ,  Hsin-Chieh Huang ,  Ming-Yuan Wu ,  Tzu kai Lin ,  Yu-Wen Wang ,  Che-Yuan Hsu

IPC: H01L21/306 ,  H01L21/308 ,  H01L21/311 ,  H01L21/3065 ,  H01L21/02

Abstract: A method of forming a semiconductor device includes forming a first epitaxial layer over a substrate to form a wafer, depositing a dielectric layer over the first epitaxial layer, patterning the dielectric layer to form an opening, etching the first epitaxial layer through the opening to form a recess, forming a second epitaxial layer in the recess, etching the dielectric layer to expose a top surface of the first epitaxial layer, and planarizing the exposed top surface of the first epitaxial layer and a top surface of the second epitaxial layer.

公开(公告)号：US20240371649A1

公开(公告)日：2024-11-07

申请号：US18775109

申请日：2024-07-17

Applicant: Taiwan Semiconductor Manufacturing Co, Ltd.

Inventor： Che-Lun Chang ,  Pin-Chuan Su ,  Hsin-Chieh Huang ,  Ming-Yuan Wu ,  Tzu kai Lin ,  Yu-Wen Wang ,  Che-Yuan Hsu

IPC: H01L21/306 ,  H01L21/02 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/311 ,  H01L29/66

Abstract: A method of forming a semiconductor device includes forming a first epitaxial layer over a substrate to form a wafer, depositing a dielectric layer over the first epitaxial layer, patterning the dielectric layer to form an opening, etching the first epitaxial layer through the opening to form a recess, forming a second epitaxial layer in the recess, etching the dielectric layer to expose a top surface of the first epitaxial layer, and planarizing the exposed top surface of the first epitaxial layer and a top surface of the second epitaxial layer.

公开(公告)号：US11616133B2

公开(公告)日：2023-03-28

申请号：US17728633

申请日：2022-04-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Che-Lun Chang ,  Shiao-Shin Cheng ,  Ji-Yin Tsai ,  Yu-Lin Tsai ,  Hsin-Chieh Huang ,  Ming-Yuan Wu ,  Jiun-Ming Kuo ,  Ming-Jie Huang ,  Yu-Wen Wang ,  Che-Yuan Hsu

IPC: H01L29/66 ,  H01L21/02 ,  H01L29/78 ,  H01L29/165 ,  H01L29/08

Abstract: A method includes forming a doped region on a top portion of a substrate, forming a first epitaxial layer over the substrate, forming a recess in the first epitaxial layer, the recess being aligned to the doped region, performing a surface clean treatment in the recess, the surface clean treatment includes: oxidizing surfaces of the recess to form an oxide layer in the recess, and removing the oxide layer from the surfaces of the recess, and forming a second epitaxial layer in the recess.

公开(公告)号：US11387109B1

公开(公告)日：2022-07-12

申请号：US17193693

申请日：2021-03-05

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Che-Lun Chang ,  Pin-Chuan Su ,  Hsin-Chieh Huang ,  Ming-Yuan Wu ,  Tzu kai Lin ,  Yu-Wen Wang ,  Che-Yuan Hsu, deseased

IPC: H01L21/306 ,  H01L21/02 ,  H01L29/66 ,  H01L21/311 ,  H01L21/308

Abstract: A method of forming a semiconductor device includes forming a first epitaxial layer over a substrate to form a wafer, depositing a dielectric layer over the first epitaxial layer, patterning the dielectric layer to form an opening, etching the first epitaxial layer through the opening to form a recess, forming a second epitaxial layer in the recess, etching the dielectric layer to expose a top surface of the first epitaxial layer, and planarizing the exposed top surface of the first epitaxial layer and a top surface of the second epitaxial layer.

公开(公告)号：US12131911B2

公开(公告)日：2024-10-29

申请号：US17844563

申请日：2022-06-20

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Che-Lun Chang ,  Pin-Chuan Su ,  Hsin-Chieh Huang ,  Ming-Yuan Wu ,  Tzu kai Lin ,  Yu-Wen Wang ,  Che-Yuan Hsu

IPC: H01L21/306 ,  H01L21/02 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/311 ,  H01L29/66

CPC classification number: H01L21/30625 ,  H01L21/02447 ,  H01L21/02532 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/31111 ,  H01L21/31116 ,  H01L29/66636

Abstract: A method of forming a semiconductor device includes forming a first epitaxial layer over a substrate to form a wafer, depositing a dielectric layer over the first epitaxial layer, patterning the dielectric layer to form an opening, etching the first epitaxial layer through the opening to form a recess, forming a second epitaxial layer in the recess, etching the dielectric layer to expose a top surface of the first epitaxial layer, and planarizing the exposed top surface of the first epitaxial layer and a top surface of the second epitaxial layer.

公开(公告)号：US20220262926A1

公开(公告)日：2022-08-18

申请号：US17728633

申请日：2022-04-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Che-Lun Chang ,  Shiao-Shin Cheng ,  Ji-Yin Tsai ,  Yu-Lin Tsai ,  Hsin-Chieh Huang ,  Ming-Yuan Wu ,  Jiun-Ming Kuo ,  Ming-Jie Huang ,  Yu-Wen Wang ,  Che-Yuan Hsu

IPC: H01L29/66 ,  H01L21/02 ,  H01L29/78 ,  H01L29/165 ,  H01L29/08

Abstract: A method includes forming a doped region on a top portion of a substrate, forming a first epitaxial layer over the substrate, forming a recess in the first epitaxial layer, the recess being aligned to the doped region, performing a surface clean treatment in the recess, the surface clean treatment includes: oxidizing surfaces of the recess to form an oxide layer in the recess, and removing the oxide layer from the surfaces of the recess, and forming a second epitaxial layer in the recess.