公开(公告)号：US20220181202A1

公开(公告)日：2022-06-09

申请号：US17682234

申请日：2022-02-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Meng-Yu LIN ,  Chun-Fu CHENG ,  Chung-Wei WU ,  Zhiqiang WU

IPC: H01L21/768 ,  H01L21/02

Abstract: The present disclosure describes a method of fabricating a semiconductor structure that includes forming a dummy gate structure over a substrate, forming a first spacer on a sidewall of the dummy gate structure and a second spacer on the first spacer, forming a source/drain structure on the substrate, removing the second spacer, forming a dielectric structure over the source/drain structure, replacing the dummy gate structure with a metal gate structure and a capping structure on the metal gate structure, and forming an opening in the dielectric structure. The opening exposes the source/drain structure. The method further includes forming a dummy spacer on a sidewall of the opening, forming a contact structure in the opening, and removing the dummy spacer to form an air gap between the contact structure and the metal gate structure. The contact structure is in contact with the source/drain structure in the opening.

公开(公告)号：US20210125858A1

公开(公告)日：2021-04-29

申请号：US16823943

申请日：2020-03-19

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd

Inventor： Meng-Yu LIN ,  Chun-Fu CHENG ,  Chung-Wei WU ,  Zhiqiang WU

IPC: H01L21/768 ,  H01L21/02

Abstract: The present disclosure describes a method of fabricating a semiconductor structure that includes forming a dummy gate structure over a substrate, forming a first spacer on a sidewall of the dummy gate structure and a second spacer on the first spacer, forming a source/drain structure on the substrate, removing the second spacer, forming a dielectric structure over the source/drain structure, replacing the dummy gate structure with a metal gate structure and a capping structure on the metal gate structure, and forming an opening in the dielectric structure. The opening exposes the source/drain structure. The method further includes forming a dummy spacer on a sidewall of the opening, forming a contact structure in the opening, and removing the dummy spacer to form an air gap between the contact structure and the metal gate structure. The contact structure is in contact with the source/drain structure in the opening.

公开(公告)号：US20230307456A1

公开(公告)日：2023-09-28

申请号：US17888261

申请日：2022-08-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Meng-Yu LIN ,  Yi-Han WANG ,  Chun-Fu CHENG ,  Cheng-Yin WANG ,  Yi-Bo LIAO ,  Szuya LIAO

IPC: H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/08 ,  H01L29/786 ,  H01L29/775 ,  H01L29/66 ,  H01L21/8238

CPC classification number: H01L27/0924 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/0847 ,  H01L29/78696 ,  H01L29/775 ,  H01L29/66439 ,  H01L21/823807 ,  H01L21/823814

Abstract: An integrated circuit includes a complimentary field effect transistor (CFET). The CFET includes a first transistor having a first semiconductor nanostructure corresponding to a channel region of the first semiconductor nanostructure and a first gate metal surrounding the second semiconductor nanostructure. The CFET includes a transistor including a second semiconductor nanostructure above the first semiconductor nanostructure and a second gate metal surrounding the second semiconductor nanostructure. The CFET includes an isolation structure between the first and second semiconductor nanostructures.